untested BH1750 i2c lux sensor implementation

README.md

@@ -7,7 +7,9 @@
 The firmware of this project is licensed as GPLv3.
 A copy of the license can be found in `COPYING`.
 
-It uses [V-USB](https://github.com/obdev/v-usb), and is based on their example code.
+It uses [V-USB](https://github.com/obdev/v-usb) and is based on their example code.
+
+Also includes the I2C Master implementation from the Atmel AVR310 AppNote.
 
     This program is free software: you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by

client/fetch.py

@@ -7,7 +7,6 @@ import time
 CUSTOM_RQ_ECHO = 0 # send back wValue and wIndex, for testing comms reliability
 CUSTOM_RQ_RESET = 1 # reset to bootloader
 CUSTOM_RQ_GET = 2 # get ldr value
-CUSTOM_RQ_RAW = 3 # get ldr value
 
 max_comm_retries = 5;
 
@@ -43,10 +42,4 @@ if read_val(CUSTOM_RQ_ECHO, 4, 42, 23) != (42 | (23 << 16)):
 while True:
     v = read_val(CUSTOM_RQ_GET, 2)
     print(time.time(), ";", v, flush=True)
-
-    #r = read_val(CUSTOM_RQ_RAW, 2)
-    #print(time.time(), ";", r, flush=True)
-
-    #print(time.time(), ";", v, ";", r, flush=True)
-
     time.sleep(0.25)

sensor/Makefile

@@ -80,7 +80,8 @@ OBJDIR = build
 
 # List C source files here. (C dependencies are automatically generated.)
 SRC = v-usb/usbdrv/usbdrv.c v-usb/usbdrv/oddebug.c
-SRC += src/main.c src/adc.c src/usb.c
+SRC += extern/USI_TWI_Master.c
+SRC += src/main.c src/lux.c src/twi.c src/usb.c
 
 
 # List C++ source files here. (C dependencies are automatically generated.)
@@ -114,7 +115,7 @@ DEBUG = dwarf-2
 #     Each directory must be seperated by a space.
 #     Use forward slashes for directory separators.
 #     For a directory that has spaces, enclose it in quotes.
-EXTRAINCDIRS = include v-usb/usbdrv v-usb/libs-device
+EXTRAINCDIRS = include extern v-usb/usbdrv v-usb/libs-device
 
 
 # Compiler flag to set the C Standard level.
@@ -613,6 +614,7 @@ clean_list :
 # Create object files directory
 $(shell mkdir -p $(OBJDIR) 2>/dev/null)
 $(shell mkdir -p $(OBJDIR)/src 2>/dev/null) # TODO not nice
+$(shell mkdir -p $(OBJDIR)/extern 2>/dev/null) # TODO not nice
 $(shell mkdir -p $(OBJDIR)/v-usb/usbdrv 2>/dev/null) # TODO not nice
 
 

sensor/extern/USI_TWI_Master.c

@@ -0,0 +1,255 @@
+/*****************************************************************************
+ *
+ * Atmel Corporation
+ *
+ * File              : USI_TWI_Master.c
+ * Date              : $Date: 2016-7-15 $
+ * Updated by        : $Author: Atmel $
+ *
+ * Support mail      : avr@atmel.com
+ *
+ * Supported devices : All device with USI module can be used.
+ *                     The example is written for the ATmega169, ATtiny26 and ATtiny2313
+ *
+ * AppNote           : AVR310 - Using the USI module as a TWI Master
+ *
+ * Description       : This is an implementation of an TWI master using
+ *                     the USI module as basis. The implementation assumes the AVR to
+ *                     be the only TWI master in the system and can therefore not be
+ *                     used in a multi-master system.
+ * Usage             : Initialize the USI module by calling the USI_TWI_Master_Initialise()
+ *                     function. Hence messages/data are transceived on the bus using
+ *                     the USI_TWI_Transceive() function. The transceive function
+ *                     returns a status byte, which can be used to evaluate the
+ *                     success of the transmission.
+ *
+ ****************************************************************************/
+#if __GNUC__
+#include <avr/io.h>
+#else
+#include <inavr.h>
+#include <ioavr.h>
+#endif
+#include "USI_TWI_Master.h"
+
+unsigned char USI_TWI_Master_Transfer(unsigned char);
+unsigned char USI_TWI_Master_Stop(void);
+
+union USI_TWI_state {
+	unsigned char errorState; // Can reuse the TWI_state for error states due to that it will not be need if there
+	                          // exists an error.
+	struct {
+		unsigned char addressMode : 1;
+		unsigned char masterWriteDataMode : 1;
+		unsigned char unused : 6;
+	};
+} USI_TWI_state;
+
+/*---------------------------------------------------------------
+ USI TWI single master initialization function
+---------------------------------------------------------------*/
+void USI_TWI_Master_Initialise(void)
+{
+	PORT_USI |= (1 << PIN_USI_SDA); // Enable pullup on SDA, to set high as released state.
+	PORT_USI |= (1 << PIN_USI_SCL); // Enable pullup on SCL, to set high as released state.
+
+	DDR_USI |= (1 << PIN_USI_SCL); // Enable SCL as output.
+	DDR_USI |= (1 << PIN_USI_SDA); // Enable SDA as output.
+
+	USIDR = 0xFF;                                           // Preload dataregister with "released level" data.
+	USICR = (0 << USISIE) | (0 << USIOIE) |                 // Disable Interrupts.
+	        (1 << USIWM1) | (0 << USIWM0) |                 // Set USI in Two-wire mode.
+	        (1 << USICS1) | (0 << USICS0) | (1 << USICLK) | // Software stobe as counter clock source
+	        (0 << USITC);
+	USISR = (1 << USISIF) | (1 << USIOIF) | (1 << USIPF) | (1 << USIDC) | // Clear flags,
+	        (0x0 << USICNT0);                                             // and reset counter.
+}
+
+/*---------------------------------------------------------------
+Use this function to get hold of the error message from the last transmission
+---------------------------------------------------------------*/
+unsigned char USI_TWI_Get_State_Info(void)
+{
+	return (USI_TWI_state.errorState); // Return error state.
+}
+
+/*---------------------------------------------------------------
+ USI Transmit and receive function. LSB of first byte in data
+ indicates if a read or write cycles is performed. If set a read
+ operation is performed.
+
+ Function generates (Repeated) Start Condition, sends address and
+ R/W, Reads/Writes Data, and verifies/sends ACK.
+
+ Success or error code is returned. Error codes are defined in
+ USI_TWI_Master.h
+---------------------------------------------------------------*/
+#ifndef __GNUC__
+__x // AVR compiler
+#endif
+    unsigned char
+    USI_TWI_Start_Transceiver_With_Data(unsigned char *msg, unsigned char msgSize)
+{
+	unsigned char tempUSISR_8bit = (1 << USISIF) | (1 << USIOIF) | (1 << USIPF) | (1 << USIDC)
+	                               |                 // Prepare register value to: Clear flags, and
+	                               (0x0 << USICNT0); // set USI to shift 8 bits i.e. count 16 clock edges.
+	unsigned char tempUSISR_1bit = (1 << USISIF) | (1 << USIOIF) | (1 << USIPF) | (1 << USIDC)
+	                               |                 // Prepare register value to: Clear flags, and
+	                               (0xE << USICNT0); // set USI to shift 1 bit i.e. count 2 clock edges.
+
+	USI_TWI_state.errorState  = 0;
+	USI_TWI_state.addressMode = TRUE;
+
+#ifdef PARAM_VERIFICATION
+	if (msg > (unsigned char *)RAMEND) // Test if address is outside SRAM space
+	{
+		USI_TWI_state.errorState = USI_TWI_DATA_OUT_OF_BOUND;
+		return (FALSE);
+	}
+	if (msgSize <= 1) // Test if the transmission buffer is empty
+	{
+		USI_TWI_state.errorState = USI_TWI_NO_DATA;
+		return (FALSE);
+	}
+#endif
+
+#ifdef NOISE_TESTING // Test if any unexpected conditions have arrived prior to this execution.
+	if (USISR & (1 << USISIF)) {
+		USI_TWI_state.errorState = USI_TWI_UE_START_CON;
+		return (FALSE);
+	}
+	if (USISR & (1 << USIPF)) {
+		USI_TWI_state.errorState = USI_TWI_UE_STOP_CON;
+		return (FALSE);
+	}
+	if (USISR & (1 << USIDC)) {
+		USI_TWI_state.errorState = USI_TWI_UE_DATA_COL;
+		return (FALSE);
+	}
+#endif
+
+	if (!(*msg
+	      & (1 << TWI_READ_BIT))) // The LSB in the address byte determines if is a masterRead or masterWrite operation.
+	{
+		USI_TWI_state.masterWriteDataMode = TRUE;
+	}
+
+	/* Release SCL to ensure that (repeated) Start can be performed */
+	PORT_USI |= (1 << PIN_USI_SCL); // Release SCL.
+	while (!(PIN_USI & (1 << PIN_USI_SCL)))
+		; // Verify that SCL becomes high.
+#ifdef TWI_FAST_MODE
+	DELAY_T4TWI; // Delay for T4TWI if TWI_FAST_MODE
+#else
+	DELAY_T2TWI; // Delay for T2TWI if TWI_STANDARD_MODE
+#endif
+
+	/* Generate Start Condition */
+	PORT_USI &= ~(1 << PIN_USI_SDA); // Force SDA LOW.
+	DELAY_T4TWI;
+	PORT_USI &= ~(1 << PIN_USI_SCL); // Pull SCL LOW.
+	PORT_USI |= (1 << PIN_USI_SDA);  // Release SDA.
+
+#ifdef SIGNAL_VERIFY
+	if (!(USISR & (1 << USISIF))) {
+		USI_TWI_state.errorState = USI_TWI_MISSING_START_CON;
+		return (FALSE);
+	}
+#endif
+
+	/*Write address and Read/Write data */
+	do {
+		/* If masterWrite cycle (or inital address tranmission)*/
+		if (USI_TWI_state.addressMode || USI_TWI_state.masterWriteDataMode) {
+			/* Write a byte */
+			PORT_USI &= ~(1 << PIN_USI_SCL);         // Pull SCL LOW.
+			USIDR = *(msg++);                        // Setup data.
+			USI_TWI_Master_Transfer(tempUSISR_8bit); // Send 8 bits on bus.
+
+			/* Clock and verify (N)ACK from slave */
+			DDR_USI &= ~(1 << PIN_USI_SDA); // Enable SDA as input.
+			if (USI_TWI_Master_Transfer(tempUSISR_1bit) & (1 << TWI_NACK_BIT)) {
+				if (USI_TWI_state.addressMode)
+					USI_TWI_state.errorState = USI_TWI_NO_ACK_ON_ADDRESS;
+				else
+					USI_TWI_state.errorState = USI_TWI_NO_ACK_ON_DATA;
+				return (FALSE);
+			}
+			USI_TWI_state.addressMode = FALSE; // Only perform address transmission once.
+		}
+		/* Else masterRead cycle*/
+		else {
+			/* Read a data byte */
+			DDR_USI &= ~(1 << PIN_USI_SDA); // Enable SDA as input.
+			*(msg++) = USI_TWI_Master_Transfer(tempUSISR_8bit);
+
+			/* Prepare to generate ACK (or NACK in case of End Of Transmission) */
+			if (msgSize == 1) // If transmission of last byte was performed.
+			{
+				USIDR = 0xFF; // Load NACK to confirm End Of Transmission.
+			} else {
+				USIDR = 0x00; // Load ACK. Set data register bit 7 (output for SDA) low.
+			}
+			USI_TWI_Master_Transfer(tempUSISR_1bit); // Generate ACK/NACK.
+		}
+	} while (--msgSize); // Until all data sent/received.
+
+	USI_TWI_Master_Stop(); // Send a STOP condition on the TWI bus.
+
+	/* Transmission successfully completed*/
+	return (TRUE);
+}
+
+/*---------------------------------------------------------------
+ Core function for shifting data in and out from the USI.
+ Data to be sent has to be placed into the USIDR prior to calling
+ this function. Data read, will be return'ed from the function.
+---------------------------------------------------------------*/
+unsigned char USI_TWI_Master_Transfer(unsigned char temp)
+{
+	USISR = temp;                                          // Set USISR according to temp.
+	                                                       // Prepare clocking.
+	temp = (0 << USISIE) | (0 << USIOIE) |                 // Interrupts disabled
+	       (1 << USIWM1) | (0 << USIWM0) |                 // Set USI in Two-wire mode.
+	       (1 << USICS1) | (0 << USICS0) | (1 << USICLK) | // Software clock strobe as source.
+	       (1 << USITC);                                   // Toggle Clock Port.
+	do {
+		DELAY_T2TWI;
+		USICR = temp; // Generate positve SCL edge.
+		while (!(PIN_USI & (1 << PIN_USI_SCL)))
+			; // Wait for SCL to go high.
+		DELAY_T4TWI;
+		USICR = temp;                   // Generate negative SCL edge.
+	} while (!(USISR & (1 << USIOIF))); // Check for transfer complete.
+
+	DELAY_T2TWI;
+	temp  = USIDR;                 // Read out data.
+	USIDR = 0xFF;                  // Release SDA.
+	DDR_USI |= (1 << PIN_USI_SDA); // Enable SDA as output.
+
+	return temp; // Return the data from the USIDR
+}
+
+/*---------------------------------------------------------------
+ Function for generating a TWI Stop Condition. Used to release
+ the TWI bus.
+---------------------------------------------------------------*/
+unsigned char USI_TWI_Master_Stop(void)
+{
+	PORT_USI &= ~(1 << PIN_USI_SDA); // Pull SDA low.
+	PORT_USI |= (1 << PIN_USI_SCL);  // Release SCL.
+	while (!(PIN_USI & (1 << PIN_USI_SCL)))
+		; // Wait for SCL to go high.
+	DELAY_T4TWI;
+	PORT_USI |= (1 << PIN_USI_SDA); // Release SDA.
+	DELAY_T2TWI;
+
+#ifdef SIGNAL_VERIFY
+	if (!(USISR & (1 << USIPF))) {
+		USI_TWI_state.errorState = USI_TWI_MISSING_STOP_CON;
+		return (FALSE);
+	}
+#endif
+
+	return (TRUE);
+}

sensor/extern/USI_TWI_Master.h

@@ -0,0 +1,162 @@
+/*****************************************************************************
+ *
+ * Atmel Corporation
+ *
+ * File              : USI_TWI_Master.h
+ * Date              : $Date: 2016-7-15 $
+ * Updated by        : $Author: Atmel $
+ *
+ * Support mail      : avr@atmel.com
+ *
+ * Supported devices : All device with USI module can be used.
+ *                     The example is written for the ATmega169, ATtiny26 and ATtiny2313
+ *
+ * AppNote           : AVR310 - Using the USI module as a TWI Master
+ *
+ * Description       : This is an implementation of an TWI master using
+ *                     the USI module as basis. The implementation assumes the AVR to
+ *                     be the only TWI master in the system and can therefore not be
+ *                     used in a multi-master system.
+ * Usage             : Initialize the USI module by calling the USI_TWI_Master_Initialise()
+ *                     function. Hence messages/data are transceived on the bus using
+ *                     the USI_TWI_Start_Transceiver_With_Data() function. If the transceiver
+ *                     returns with a fail, then use USI_TWI_Get_Status_Info to evaluate the
+ *                     couse of the failure.
+ *
+ ****************************************************************************/
+#if __GNUC__
+#ifndef F_CPU
+#define F_CPU 16500000
+#endif
+#include <avr/io.h>
+#include <util/delay.h>
+#endif
+//********** Defines **********//
+// Defines controlling timing limits
+#define TWI_FAST_MODE
+
+#define SYS_CLK (F_CPU / 1000.0) // [kHz]
+
+#ifdef TWI_FAST_MODE                            // TWI FAST mode timing limits. SCL = 100-400kHz
+#define T2_TWI ((SYS_CLK * 1300) / 1000000) + 1 // >1,3us
+#define T4_TWI ((SYS_CLK * 600) / 1000000) + 1  // >0,6us
+
+#else                                           // TWI STANDARD mode timing limits. SCL <= 100kHz
+#define T2_TWI ((SYS_CLK * 4700) / 1000000) + 1 // >4,7us
+#define T4_TWI ((SYS_CLK * 4000) / 1000000) + 1 // >4,0us
+#endif
+
+// Defines controling code generating
+//#define PARAM_VERIFICATION
+//#define NOISE_TESTING
+//#define SIGNAL_VERIFY
+
+// USI_TWI messages and flags and bit masks
+//#define SUCCESS   7
+//#define MSG       0
+/****************************************************************************
+  Bit and byte definitions
+****************************************************************************/
+#define TWI_READ_BIT 0 // Bit position for R/W bit in "address byte".
+#define TWI_ADR_BITS 1 // Bit position for LSB of the slave address bits in the init byte.
+#define TWI_NACK_BIT 0 // Bit position for (N)ACK bit.
+
+#define USI_TWI_NO_DATA 0x00           // Transmission buffer is empty
+#define USI_TWI_DATA_OUT_OF_BOUND 0x01 // Transmission buffer is outside SRAM space
+#define USI_TWI_UE_START_CON 0x02      // Unexpected Start Condition
+#define USI_TWI_UE_STOP_CON 0x03       // Unexpected Stop Condition
+#define USI_TWI_UE_DATA_COL 0x04       // Unexpected Data Collision (arbitration)
+#define USI_TWI_NO_ACK_ON_DATA 0x05    // The slave did not acknowledge  all data
+#define USI_TWI_NO_ACK_ON_ADDRESS 0x06 // The slave did not acknowledge  the address
+#define USI_TWI_MISSING_START_CON 0x07 // Generated Start Condition not detected on bus
+#define USI_TWI_MISSING_STOP_CON 0x08  // Generated Stop Condition not detected on bus
+
+// Device dependant defines
+#if __GNUC__
+#if defined(__AVR_AT90Mega169__) || defined(__AVR_ATmega169PA__) || defined(__AVR_AT90Mega165__)                       \
+    || defined(__AVR_ATmega165__) || defined(__AVR_ATmega325__) || defined(__AVR_ATmega3250__)                         \
+    || defined(__AVR_ATmega645__) || defined(__AVR_ATmega6450__) || defined(__AVR_ATmega329__)                         \
+    || defined(__AVR_ATmega3290__) || defined(__AVR_ATmega649__) || defined(__AVR_ATmega6490__)
+#define DDR_USI DDRE
+#define PORT_USI PORTE
+#define PIN_USI PINE
+#define PORT_USI_SDA PORTE5
+#define PORT_USI_SCL PORTE4
+#define PIN_USI_SDA PINE5
+#define PIN_USI_SCL PINE4
+#endif
+#if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__) || defined(__AVR_AT90Tiny26__) \
+    || defined(__AVR_ATtiny26__)
+#define DDR_USI DDRB
+#define PORT_USI PORTB
+#define PIN_USI PINB
+#define PORT_USI_SDA PORTB0
+#define PORT_USI_SCL PORTB2
+#define PIN_USI_SDA PINB0
+#define PIN_USI_SCL PINB2
+#endif
+#if defined(__AVR_AT90Tiny2313__) || defined(__AVR_ATtiny2313__)
+#define DDR_USI DDRB
+#define PORT_USI PORTB
+#define PIN_USI PINB
+#define PORT_USI_SDA PORTB5
+#define PORT_USI_SCL PORTB7
+#define PIN_USI_SDA PINB5
+#define PIN_USI_SCL PINB7
+#endif
+#else //__GNUC__
+#if defined(__AT90Mega169__) || defined(__ATmega169__) || defined(__AT90Mega165__) || defined(__ATmega165__)           \
+    || defined(__ATmega325__) || defined(__ATmega3250__) || defined(__ATmega645__) || defined(__ATmega6450__)          \
+    || defined(__ATmega329__) || defined(__ATmega3290__) || defined(__ATmega649__) || defined(__ATmega6490__)
+#define DDR_USI DDRE
+#define PORT_USI PORTE
+#define PIN_USI PINE
+#define PORT_USI_SDA PORTE5
+#define PORT_USI_SCL PORTE4
+#define PIN_USI_SDA PINE5
+#define PIN_USI_SCL PINE4
+#endif
+
+#if defined(__ATtiny25__) || defined(__ATtiny45__) || defined(__ATtiny85__) || defined(__AT90Tiny26__)                 \
+    || defined(__ATtiny26__)
+#define DDR_USI DDRB
+#define PORT_USI PORTB
+#define PIN_USI PINB
+#define PORT_USI_SDA PORTB0
+#define PORT_USI_SCL PORTB2
+#define PIN_USI_SDA PINB0
+#define PIN_USI_SCL PINB2
+#endif
+
+#if defined(__AT90Tiny2313__) || defined(__ATtiny2313__)
+#define DDR_USI DDRB
+#define PORT_USI PORTB
+#define PIN_USI PINB
+#define PORT_USI_SDA PORTB5
+#define PORT_USI_SCL PORTB7
+#define PIN_USI_SDA PINB5
+#define PIN_USI_SCL PINB7
+#endif
+#endif //__GNUC__
+
+// General defines
+#define TRUE 1
+#define FALSE 0
+
+#if __GNUC__
+#define DELAY_T2TWI (_delay_us(T2_TWI / 4))
+#define DELAY_T4TWI (_delay_us(T4_TWI / 4))
+#else
+#define DELAY_T2TWI (__delay_cycles(T2_TWI))
+#define DELAY_T4TWI (__delay_cycles(T4_TWI))
+#endif
+//********** Prototypes **********//
+
+void USI_TWI_Master_Initialise(void);
+#ifndef __GNUC__
+__x // AVR compiler
+#endif
+    unsigned char
+    USI_TWI_Start_Transceiver_With_Data(unsigned char *, unsigned char);
+
+unsigned char USI_TWI_Get_State_Info(void);

sensor/include/adc.h → sensor/include/lux.h

@@ -1,5 +1,5 @@
 /*
- * adc.h
+ * lux.h
  *
  * Copyright (c) 2024 Thomas Buck (thomas@xythobuz.de)
  *
@@ -16,13 +16,12 @@
  * See <http://www.gnu.org/licenses/>.
  */
 
-#ifndef __ADC_H__
-#define __ADC_H__
+#ifndef __LUX_H__
+#define __LUX_H__
 
 #include <stdint.h>
 
-void adcInit(void);
-uint16_t adcGet(void);
-uint16_t adcRaw(void);
+void luxInit(void);
+uint16_t luxGet(void);
 
-#endif // __ADC_H__
+#endif // __LUX_H__

sensor/include/twi.h

@@ -0,0 +1,28 @@
+/*
+ * twi.h
+ *
+ * Copyright (c) 2024 Thomas Buck (thomas@xythobuz.de)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * See <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __TWI_H__
+#define __TWI_H__
+
+#include <stdint.h>
+
+void twiInit(void);
+void twiWrite(uint8_t addr, uint8_t op);
+uint16_t twiRead(uint8_t addr);
+
+#endif // __TWI_H__

sensor/src/adc.c

@@ -1,66 +0,0 @@
-/*
- * adc.c
- *
- * Copyright (c) 2024 Thomas Buck (thomas@xythobuz.de)
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * See <http://www.gnu.org/licenses/>.
- */
-
-#include <avr/io.h>
-#include <avr/interrupt.h>
-#include <util/atomic.h>
-
-#include "adc.h"
-
-static int32_t adc_filter = 0;
-static uint16_t adc_prev = 0;
-
-void adcInit(void) {
-    ADMUX = (1 << MUX0); // Vcc reference, ADC1 / PB2 in
-    ADCSRA = (1 << ADEN) | (1 << ADIE) // adc and interrupt enabled
-            | (1 << ADPS2) | (1 << ADPS1) | (1 << ADPS0) // prescaler 128
-            | (1 << ADSC); // start first conversion
-}
-
-static inline void adcFilter(uint16_t val) {
-    adc_prev = val;
-
-    int32_t input = val;
-    input <<= 16; // 10bit val --> 26bit input
-
-    adc_filter = adc_filter + ((input - adc_filter) >> 5);
-}
-
-ISR(ADC_vect) {
-    // add this value to our filtered average
-    adcFilter(ADC);
-
-    // start next conversion
-    ADCSRA |= (1 << ADSC);
-}
-
-uint16_t adcGet(void) {
-    uint16_t val;
-    ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
-        val = (adc_filter >> 16) + ((adc_filter & 0x00008000) >> 15);
-    }
-    return val;
-}
-
-uint16_t adcRaw(void) {
-    uint16_t val;
-    ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
-        val = adc_prev;
-    }
-    return val;
-}

sensor/src/lux.c

@@ -0,0 +1,45 @@
+/*
+ * lux.c
+ *
+ * Copyright (c) 2024 Thomas Buck (thomas@xythobuz.de)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * See <http://www.gnu.org/licenses/>.
+ */
+
+#include <avr/io.h>
+
+#include "twi.h"
+#include "lux.h"
+
+#define LUX_ADDR 0x5C
+
+#define OP_POWER_ON 0x01
+#define OP_RESET 0x07
+
+#define OP_CONT_1X 0x10
+#define OP_CONT_0_5X 0x11
+#define OP_CONT_4X 0x13
+
+#define OP_ONCE_1X 0x20
+#define OP_ONCE_0_5X 0x21
+#define OP_ONCE_4X 0x23
+
+void luxInit(void) {
+    twiWrite(LUX_ADDR, OP_POWER_ON);
+    twiWrite(LUX_ADDR, OP_CONT_1X);
+}
+
+uint16_t luxGet(void) {
+    uint16_t val = twiRead(LUX_ADDR);
+    return val;
+}

sensor/src/main.c

@@ -21,13 +21,15 @@
 #include <avr/wdt.h>
 #include <util/delay.h>
 
-#include "adc.h"
+#include "lux.h"
+#include "twi.h"
 #include "usbdrv.h"
 #include "main.h"
 
 bool keep_feeding = true;
 
-int __attribute__((noreturn)) main(void) {
+__attribute__((noreturn))
+int main(void) {
     wdt_enable(WDTO_1S);
     wdt_reset();
 
@@ -35,18 +37,24 @@ int __attribute__((noreturn)) main(void) {
     DDRB |= (1 << DDB1); // output
     PORTB |= (1 << PB1); // turn on
 
-    adcInit();
+    twiInit();
+    luxInit();
     usbInit();
 
     usbDeviceDisconnect(); // enforce re-enumeration, do this while interrupts are disabled!
+
     wdt_reset();
+    // TODO perform lux sensor init in this time
     _delay_ms(255); // fake USB disconnect for > 250 ms
+
     usbDeviceConnect();
 
     PORTB &= ~(1 << PB1); // turn status LED off
 
-    // enable interrupts and enter main loop for USB polling
+    // enable interrupts
     sei();
+
+    // enter main loop for USB polling
     while (1) {
         if (keep_feeding) {
             wdt_reset();

sensor/src/twi.c

@@ -0,0 +1,48 @@
+/*
+ * twi.c
+ *
+ * Copyright (c) 2024 Thomas Buck (thomas@xythobuz.de)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * See <http://www.gnu.org/licenses/>.
+ */
+
+#include <avr/io.h>
+
+#include "USI_TWI_Master.h"
+#include "twi.h"
+
+void twiInit(void) {
+    USI_TWI_Master_Initialise();
+}
+
+void twiWrite(uint8_t addr, uint8_t op) {
+    uint8_t msg[] = {
+        addr << TWI_ADR_BITS,
+        op
+    };
+
+    USI_TWI_Start_Transceiver_With_Data(msg, sizeof(msg));
+}
+
+uint16_t twiRead(uint8_t addr) {
+    uint8_t msg[] = {
+        (addr << TWI_ADR_BITS) | (1 << TWI_READ_BIT),
+        0, 0 // space for received data
+    };
+
+    do {
+        USI_TWI_Start_Transceiver_With_Data(msg, sizeof(msg));
+    } while (USI_TWI_Get_State_Info() == USI_TWI_NO_ACK_ON_ADDRESS);
+
+    return (msg[1] << 8) | msg[2];
+}

sensor/src/usb.c

@@ -21,13 +21,12 @@
 #include "usbdrv.h"
 #include "osccal.c" // missing usbdrv include, so include here
 
-#include "adc.h"
+#include "lux.h"
 #include "main.h"
 
 #define CUSTOM_RQ_ECHO 0 // send back wValue and wIndex, for testing comms reliability
 #define CUSTOM_RQ_RESET 1 // reset to bootloader
 #define CUSTOM_RQ_GET 2 // get ldr value, filtered
-#define CUSTOM_RQ_RAW 3 // get raw ldr value
 
 usbMsgLen_t usbFunctionSetup(uchar data[8]) {
     usbRequest_t *rq = (void *)data;
@@ -53,13 +52,8 @@ usbMsgLen_t usbFunctionSetup(uchar data[8]) {
             dataBuffer[0] = 0; // error code
         }
         return 1;
-    } else if ((rq->bRequest == CUSTOM_RQ_GET) || (rq->bRequest == CUSTOM_RQ_RAW)) {
-        uint16_t ldr_value;
-        if (rq->bRequest == CUSTOM_RQ_GET) {
-            ldr_value = adcGet();
-        } else {
-            ldr_value = adcRaw();
-        }
+    } else if (rq->bRequest == CUSTOM_RQ_GET) {
+        uint16_t ldr_value = luxGet();
         dataBuffer[0] = (ldr_value & 0x00FF) >> 0;
         dataBuffer[1] = (ldr_value & 0xFF00) >> 8;