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dispensy.kicad_pro 11KB

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  8. "copper_text_italic": false,
  9. "copper_text_size_h": 1.5,
  10. "copper_text_size_v": 1.5,
  11. "copper_text_thickness": 0.3,
  12. "copper_text_upright": false,
  13. "courtyard_line_width": 0.049999999999999996,
  14. "dimension_precision": 4,
  15. "dimension_units": 3,
  16. "dimensions": {
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  25. "fab_text_italic": false,
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  36. "pads": {
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  70. "diff_pair_uncoupled_length_too_long": "error",
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  74. "footprint": "error",
  75. "footprint_type_mismatch": "ignore",
  76. "hole_clearance": "error",
  77. "hole_near_hole": "error",
  78. "invalid_outline": "error",
  79. "isolated_copper": "warning",
  80. "item_on_disabled_layer": "error",
  81. "items_not_allowed": "error",
  82. "length_out_of_range": "error",
  83. "lib_footprint_issues": "warning",
  84. "lib_footprint_mismatch": "warning",
  85. "malformed_courtyard": "error",
  86. "microvia_drill_out_of_range": "error",
  87. "missing_courtyard": "ignore",
  88. "missing_footprint": "warning",
  89. "net_conflict": "warning",
  90. "npth_inside_courtyard": "ignore",
  91. "padstack": "warning",
  92. "pth_inside_courtyard": "ignore",
  93. "shorting_items": "error",
  94. "silk_edge_clearance": "warning",
  95. "silk_over_copper": "warning",
  96. "silk_overlap": "warning",
  97. "skew_out_of_range": "error",
  98. "solder_mask_bridge": "error",
  99. "starved_thermal": "error",
  100. "text_height": "warning",
  101. "text_thickness": "warning",
  102. "through_hole_pad_without_hole": "error",
  103. "too_many_vias": "error",
  104. "track_dangling": "warning",
  105. "track_width": "error",
  106. "tracks_crossing": "error",
  107. "unconnected_items": "error",
  108. "unresolved_variable": "error",
  109. "via_dangling": "warning",
  110. "zones_intersect": "error"
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  173. ],
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  176. 0.2,
  177. 0.25,
  178. 0.5,
  179. 1.0,
  180. 1.27,
  181. 2.0
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  183. "via_dimensions": [
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  186. "drill": 0.0
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  188. {
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  190. "drill": 0.2
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  192. {
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  197. "zones_allow_external_fillets": false
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  199. "layer_presets": [],
  200. "viewports": []
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  202. "boards": [],
  203. "cvpcb": {
  204. "equivalence_files": []
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  206. "erc": {
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  381. "rule_severities": {
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  383. "bus_entry_needed": "error",
  384. "bus_to_bus_conflict": "error",
  385. "bus_to_net_conflict": "error",
  386. "conflicting_netclasses": "error",
  387. "different_unit_footprint": "error",
  388. "different_unit_net": "error",
  389. "duplicate_reference": "error",
  390. "duplicate_sheet_names": "error",
  391. "endpoint_off_grid": "warning",
  392. "extra_units": "error",
  393. "global_label_dangling": "warning",
  394. "hier_label_mismatch": "error",
  395. "label_dangling": "error",
  396. "lib_symbol_issues": "warning",
  397. "missing_bidi_pin": "warning",
  398. "missing_input_pin": "warning",
  399. "missing_power_pin": "error",
  400. "missing_unit": "warning",
  401. "multiple_net_names": "warning",
  402. "net_not_bus_member": "warning",
  403. "no_connect_connected": "warning",
  404. "no_connect_dangling": "warning",
  405. "pin_not_connected": "error",
  406. "pin_not_driven": "error",
  407. "pin_to_pin": "error",
  408. "power_pin_not_driven": "error",
  409. "similar_labels": "warning",
  410. "simulation_model_issue": "error",
  411. "unannotated": "error",
  412. "unit_value_mismatch": "error",
  413. "unresolved_variable": "error",
  414. "wire_dangling": "error"
  415. }
  416. },
  417. "libraries": {
  418. "pinned_footprint_libs": [],
  419. "pinned_symbol_libs": []
  420. },
  421. "meta": {
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  423. "version": 1
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  425. "net_settings": {
  426. "classes": [
  427. {
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  429. "clearance": 0.2,
  430. "diff_pair_gap": 0.25,
  431. "diff_pair_via_gap": 0.25,
  432. "diff_pair_width": 0.2,
  433. "line_style": 0,
  434. "microvia_diameter": 0.3,
  435. "microvia_drill": 0.1,
  436. "name": "Default",
  437. "pcb_color": "rgba(0, 0, 0, 0.000)",
  438. "schematic_color": "rgba(0, 0, 0, 0.000)",
  439. "track_width": 0.25,
  440. "via_diameter": 0.8,
  441. "via_drill": 0.4,
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  445. "meta": {
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  450. "netclass_patterns": []
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  455. "idf": "",
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  458. "step": "",
  459. "vrml": ""
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  463. "schematic": {
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  465. "drawing": {
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  470. "field_names": [],
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  474. "intersheets_ref_show": true,
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  476. "junction_size_choice": 3,
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  478. "pin_symbol_size": 25.0,
  479. "text_offset_ratio": 0.15
  480. },
  481. "legacy_lib_dir": "",
  482. "legacy_lib_list": [],
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  488. "plot_directory": "./",
  489. "spice_current_sheet_as_root": false,
  490. "spice_external_command": "spice \"%I\"",
  491. "spice_model_current_sheet_as_root": true,
  492. "spice_save_all_currents": false,
  493. "spice_save_all_voltages": false,
  494. "subpart_first_id": 65,
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  497. "sheets": [
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