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dispensy.kicad_pro 11KB

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  4. "design_settings": {
  5. "defaults": {
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  8. "copper_text_italic": false,
  9. "copper_text_size_h": 1.5,
  10. "copper_text_size_v": 1.5,
  11. "copper_text_thickness": 0.3,
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  13. "courtyard_line_width": 0.049999999999999996,
  14. "dimension_precision": 4,
  15. "dimension_units": 3,
  16. "dimensions": {
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  31. "other_text_italic": false,
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  59. "connection_width": "warning",
  60. "copper_edge_clearance": "error",
  61. "copper_sliver": "warning",
  62. "courtyards_overlap": "error",
  63. "diff_pair_gap_out_of_range": "error",
  64. "diff_pair_uncoupled_length_too_long": "error",
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  68. "footprint": "error",
  69. "footprint_type_mismatch": "ignore",
  70. "hole_clearance": "error",
  71. "hole_near_hole": "error",
  72. "invalid_outline": "error",
  73. "isolated_copper": "warning",
  74. "item_on_disabled_layer": "error",
  75. "items_not_allowed": "error",
  76. "length_out_of_range": "error",
  77. "lib_footprint_issues": "warning",
  78. "lib_footprint_mismatch": "warning",
  79. "malformed_courtyard": "error",
  80. "microvia_drill_out_of_range": "error",
  81. "missing_courtyard": "ignore",
  82. "missing_footprint": "warning",
  83. "net_conflict": "warning",
  84. "npth_inside_courtyard": "ignore",
  85. "padstack": "warning",
  86. "pth_inside_courtyard": "ignore",
  87. "shorting_items": "error",
  88. "silk_edge_clearance": "warning",
  89. "silk_over_copper": "warning",
  90. "silk_overlap": "warning",
  91. "skew_out_of_range": "error",
  92. "solder_mask_bridge": "error",
  93. "starved_thermal": "error",
  94. "text_height": "warning",
  95. "text_thickness": "warning",
  96. "through_hole_pad_without_hole": "error",
  97. "too_many_vias": "error",
  98. "track_dangling": "warning",
  99. "track_width": "error",
  100. "tracks_crossing": "error",
  101. "unconnected_items": "error",
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  103. "via_dangling": "warning",
  104. "zones_intersect": "error"
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  125. "solder_mask_to_copper_clearance": 0.0,
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  158. {
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  164. "td_target_name": "td_track_end",
  165. "td_width_to_size_filter_ratio": 0.9
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  167. ],
  168. "track_widths": [],
  169. "via_dimensions": [],
  170. "zones_allow_external_fillets": false
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  172. "layer_presets": [],
  173. "viewports": []
  174. },
  175. "boards": [],
  176. "cvpcb": {
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  178. },
  179. "erc": {
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  181. "meta": {
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  354. "rule_severities": {
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  356. "bus_entry_needed": "error",
  357. "bus_to_bus_conflict": "error",
  358. "bus_to_net_conflict": "error",
  359. "conflicting_netclasses": "error",
  360. "different_unit_footprint": "error",
  361. "different_unit_net": "error",
  362. "duplicate_reference": "error",
  363. "duplicate_sheet_names": "error",
  364. "endpoint_off_grid": "warning",
  365. "extra_units": "error",
  366. "global_label_dangling": "warning",
  367. "hier_label_mismatch": "error",
  368. "label_dangling": "error",
  369. "lib_symbol_issues": "warning",
  370. "missing_bidi_pin": "warning",
  371. "missing_input_pin": "warning",
  372. "missing_power_pin": "error",
  373. "missing_unit": "warning",
  374. "multiple_net_names": "warning",
  375. "net_not_bus_member": "warning",
  376. "no_connect_connected": "warning",
  377. "no_connect_dangling": "warning",
  378. "pin_not_connected": "error",
  379. "pin_not_driven": "error",
  380. "pin_to_pin": "error",
  381. "power_pin_not_driven": "error",
  382. "similar_labels": "warning",
  383. "simulation_model_issue": "error",
  384. "unannotated": "error",
  385. "unit_value_mismatch": "error",
  386. "unresolved_variable": "error",
  387. "wire_dangling": "error"
  388. }
  389. },
  390. "libraries": {
  391. "pinned_footprint_libs": [],
  392. "pinned_symbol_libs": []
  393. },
  394. "meta": {
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  396. "version": 1
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  398. "net_settings": {
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  402. "clearance": 0.2,
  403. "diff_pair_gap": 0.25,
  404. "diff_pair_via_gap": 0.25,
  405. "diff_pair_width": 0.2,
  406. "line_style": 0,
  407. "microvia_diameter": 0.3,
  408. "microvia_drill": 0.1,
  409. "name": "Default",
  410. "pcb_color": "rgba(0, 0, 0, 0.000)",
  411. "schematic_color": "rgba(0, 0, 0, 0.000)",
  412. "track_width": 0.25,
  413. "via_diameter": 0.8,
  414. "via_drill": 0.4,
  415. "wire_width": 6
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  417. ],
  418. "meta": {
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  422. "netclass_assignments": null,
  423. "netclass_patterns": []
  424. },
  425. "pcbnew": {
  426. "last_paths": {
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  428. "idf": "",
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  430. "specctra_dsn": "",
  431. "step": "",
  432. "vrml": ""
  433. },
  434. "page_layout_descr_file": ""
  435. },
  436. "schematic": {
  437. "annotate_start_num": 0,
  438. "drawing": {
  439. "dashed_lines_dash_length_ratio": 12.0,
  440. "dashed_lines_gap_length_ratio": 3.0,
  441. "default_line_thickness": 6.0,
  442. "default_text_size": 50.0,
  443. "field_names": [],
  444. "intersheets_ref_own_page": false,
  445. "intersheets_ref_prefix": "",
  446. "intersheets_ref_short": false,
  447. "intersheets_ref_show": true,
  448. "intersheets_ref_suffix": "",
  449. "junction_size_choice": 3,
  450. "label_size_ratio": 0.375,
  451. "pin_symbol_size": 25.0,
  452. "text_offset_ratio": 0.15
  453. },
  454. "legacy_lib_dir": "",
  455. "legacy_lib_list": [],
  456. "meta": {
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  459. "net_format_name": "",
  460. "page_layout_descr_file": "",
  461. "plot_directory": "",
  462. "spice_current_sheet_as_root": false,
  463. "spice_external_command": "spice \"%I\"",
  464. "spice_model_current_sheet_as_root": true,
  465. "spice_save_all_currents": false,
  466. "spice_save_all_voltages": false,
  467. "subpart_first_id": 65,
  468. "subpart_id_separator": 0
  469. },
  470. "sheets": [
  471. [
  472. "a50b51f9-900f-4bbb-8934-4acbc429c37b",
  473. ""
  474. ],
  475. [
  476. "635c7f01-c861-45f9-bb15-e53673572e1d",
  477. "External PSU"
  478. ],
  479. [
  480. "f8ce2893-59d6-4502-b3c7-412c7467c1ef",
  481. "RP2040"
  482. ],
  483. [
  484. "2c5a08e6-462b-42d7-a36a-f09062d79876",
  485. "5V PSU"
  486. ]
  487. ],
  488. "text_variables": {}
  489. }