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@@ -26,7 +26,7 @@
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* Communication interface for FSMC
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*/
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-#if defined(STM32F1) || defined(STM32F1xx)
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+#if (defined(STM32F1) || defined(STM32F1xx)) && (defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY))
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#include "../../inc/MarlinConfig.h"
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@@ -108,36 +108,43 @@ __attribute__((always_inline)) __STATIC_INLINE void __DSB(void) {
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}
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#define FSMC_CS_NE1 PD7
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-#define FSMC_CS_NE2 PG9
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-#define FSMC_CS_NE3 PG10
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-#define FSMC_CS_NE4 PG12
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-
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-#define FSMC_RS_A0 PF0
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-#define FSMC_RS_A1 PF1
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-#define FSMC_RS_A2 PF2
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-#define FSMC_RS_A3 PF3
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-#define FSMC_RS_A4 PF4
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-#define FSMC_RS_A5 PF5
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-#define FSMC_RS_A6 PF12
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-#define FSMC_RS_A7 PF13
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-#define FSMC_RS_A8 PF14
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-#define FSMC_RS_A9 PF15
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-#define FSMC_RS_A10 PG0
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-#define FSMC_RS_A11 PG1
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-#define FSMC_RS_A12 PG2
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-#define FSMC_RS_A13 PG3
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-#define FSMC_RS_A14 PG4
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-#define FSMC_RS_A15 PG5
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-#define FSMC_RS_A16 PD11
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-#define FSMC_RS_A17 PD12
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-#define FSMC_RS_A18 PD13
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-#define FSMC_RS_A19 PE3
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-#define FSMC_RS_A20 PE4
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-#define FSMC_RS_A21 PE5
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-#define FSMC_RS_A22 PE6
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-#define FSMC_RS_A23 PE2
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-#define FSMC_RS_A24 PG13
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-#define FSMC_RS_A25 PG14
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+
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+#ifdef STM32_XL_DENSITY
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+ #define FSMC_CS_NE2 PG9
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+ #define FSMC_CS_NE3 PG10
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+ #define FSMC_CS_NE4 PG12
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+
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+ #define FSMC_RS_A0 PF0
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+ #define FSMC_RS_A1 PF1
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+ #define FSMC_RS_A2 PF2
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+ #define FSMC_RS_A3 PF3
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+ #define FSMC_RS_A4 PF4
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+ #define FSMC_RS_A5 PF5
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+ #define FSMC_RS_A6 PF12
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+ #define FSMC_RS_A7 PF13
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+ #define FSMC_RS_A8 PF14
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+ #define FSMC_RS_A9 PF15
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+ #define FSMC_RS_A10 PG0
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+ #define FSMC_RS_A11 PG1
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+ #define FSMC_RS_A12 PG2
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+ #define FSMC_RS_A13 PG3
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+ #define FSMC_RS_A14 PG4
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+ #define FSMC_RS_A15 PG5
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+#endif
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+
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+#define FSMC_RS_A16 PD11
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+#define FSMC_RS_A17 PD12
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+#define FSMC_RS_A18 PD13
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+#define FSMC_RS_A19 PE3
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+#define FSMC_RS_A20 PE4
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+#define FSMC_RS_A21 PE5
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+#define FSMC_RS_A22 PE6
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+#define FSMC_RS_A23 PE2
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+
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+#ifdef STM32_XL_DENSITY
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+ #define FSMC_RS_A24 PG13
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+ #define FSMC_RS_A25 PG14
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+#endif
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static uint8_t fsmcInit = 0;
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@@ -156,31 +163,35 @@ void LCD_IO_Init(uint8_t cs, uint8_t rs) {
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switch (cs) {
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case FSMC_CS_NE1: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION1; break;
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- case FSMC_CS_NE2: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION2; break;
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- case FSMC_CS_NE3: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION3; break;
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- case FSMC_CS_NE4: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION4; break;
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+ #ifdef STM32_XL_DENSITY
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+ case FSMC_CS_NE2: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION2; break;
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+ case FSMC_CS_NE3: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION3; break;
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+ case FSMC_CS_NE4: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION4; break;
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+ #endif
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default: return;
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}
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#define _ORADDR(N) controllerAddress |= (_BV32(N) - 2)
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switch (rs) {
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- case FSMC_RS_A0: _ORADDR( 1); break;
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- case FSMC_RS_A1: _ORADDR( 2); break;
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- case FSMC_RS_A2: _ORADDR( 3); break;
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- case FSMC_RS_A3: _ORADDR( 4); break;
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- case FSMC_RS_A4: _ORADDR( 5); break;
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- case FSMC_RS_A5: _ORADDR( 6); break;
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- case FSMC_RS_A6: _ORADDR( 7); break;
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- case FSMC_RS_A7: _ORADDR( 8); break;
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- case FSMC_RS_A8: _ORADDR( 9); break;
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- case FSMC_RS_A9: _ORADDR(10); break;
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- case FSMC_RS_A10: _ORADDR(11); break;
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- case FSMC_RS_A11: _ORADDR(12); break;
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- case FSMC_RS_A12: _ORADDR(13); break;
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- case FSMC_RS_A13: _ORADDR(14); break;
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- case FSMC_RS_A14: _ORADDR(15); break;
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- case FSMC_RS_A15: _ORADDR(16); break;
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+ #ifdef STM32_XL_DENSITY
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+ case FSMC_RS_A0: _ORADDR( 1); break;
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+ case FSMC_RS_A1: _ORADDR( 2); break;
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+ case FSMC_RS_A2: _ORADDR( 3); break;
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+ case FSMC_RS_A3: _ORADDR( 4); break;
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+ case FSMC_RS_A4: _ORADDR( 5); break;
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+ case FSMC_RS_A5: _ORADDR( 6); break;
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+ case FSMC_RS_A6: _ORADDR( 7); break;
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+ case FSMC_RS_A7: _ORADDR( 8); break;
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+ case FSMC_RS_A8: _ORADDR( 9); break;
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+ case FSMC_RS_A9: _ORADDR(10); break;
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+ case FSMC_RS_A10: _ORADDR(11); break;
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+ case FSMC_RS_A11: _ORADDR(12); break;
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+ case FSMC_RS_A12: _ORADDR(13); break;
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+ case FSMC_RS_A13: _ORADDR(14); break;
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+ case FSMC_RS_A14: _ORADDR(15); break;
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+ case FSMC_RS_A15: _ORADDR(16); break;
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+ #endif
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case FSMC_RS_A16: _ORADDR(17); break;
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case FSMC_RS_A17: _ORADDR(18); break;
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case FSMC_RS_A18: _ORADDR(19); break;
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@@ -189,8 +200,10 @@ void LCD_IO_Init(uint8_t cs, uint8_t rs) {
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case FSMC_RS_A21: _ORADDR(22); break;
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case FSMC_RS_A22: _ORADDR(23); break;
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case FSMC_RS_A23: _ORADDR(24); break;
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- case FSMC_RS_A24: _ORADDR(25); break;
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- case FSMC_RS_A25: _ORADDR(26); break;
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+ #ifdef STM32_XL_DENSITY
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+ case FSMC_RS_A24: _ORADDR(25); break;
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+ case FSMC_RS_A25: _ORADDR(26); break;
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+ #endif
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default: return;
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}
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@@ -254,4 +267,4 @@ uint32_t LCD_IO_ReadData(uint16_t RegValue, uint8_t ReadSize) {
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#endif // HAS_GRAPHICAL_LCD
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-#endif // STM32F1 || STM32F1xx
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+#endif // (STM32F1 || STM32F1xx) && (STM32_HIGH_DENSITY || STM32_XL_DENSITY)
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