|
|
|
|
178
|
// FIXME [0.1.0] remove this once you have an interrupt based driver
|
178
|
// FIXME [0.1.0] remove this once you have an interrupt based driver
|
179
|
volatile uint16_t rx __attribute__((unused)) = spi_rx_reg(_currentSetting->spi_d);
|
179
|
volatile uint16_t rx __attribute__((unused)) = spi_rx_reg(_currentSetting->spi_d);
|
180
|
}
|
180
|
}
|
181
|
- while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ }
|
|
|
182
|
- while (spi_is_busy(_currentSetting->spi_d)) { /* nada */ }
|
|
|
|
|
181
|
+ waitSpiTxEnd(_currentSetting->spi_d);
|
183
|
|
182
|
|
184
|
spi_peripheral_disable(_currentSetting->spi_d);
|
183
|
spi_peripheral_disable(_currentSetting->spi_d);
|
185
|
// added for DMA callbacks.
|
184
|
// added for DMA callbacks.
|
|
|
|
|
297
|
* This almost doubles the speed of this function.
|
296
|
* This almost doubles the speed of this function.
|
298
|
*/
|
297
|
*/
|
299
|
spi_tx_reg(_currentSetting->spi_d, data); // write the data to be transmitted into the SPI_DR register (this clears the TXE flag)
|
298
|
spi_tx_reg(_currentSetting->spi_d, data); // write the data to be transmitted into the SPI_DR register (this clears the TXE flag)
|
300
|
- while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ } // "5. Wait until TXE=1 ..."
|
|
|
301
|
- while (spi_is_busy(_currentSetting->spi_d)) { /* nada */ } // "... and then wait until BSY=0 before disabling the SPI."
|
|
|
|
|
299
|
+ waitSpiTxEnd(_currentSetting->spi_d);
|
302
|
}
|
300
|
}
|
303
|
|
301
|
|
304
|
void SPIClass::write16(uint16_t data) {
|
302
|
void SPIClass::write16(uint16_t data) {
|
|
|
|
|
306
|
spi_tx_reg(_currentSetting->spi_d, data>>8); // write high byte
|
304
|
spi_tx_reg(_currentSetting->spi_d, data>>8); // write high byte
|
307
|
while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ } // Wait until TXE=1
|
305
|
while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ } // Wait until TXE=1
|
308
|
spi_tx_reg(_currentSetting->spi_d, data); // write low byte
|
306
|
spi_tx_reg(_currentSetting->spi_d, data); // write low byte
|
309
|
- while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ } // Wait until TXE=1
|
|
|
310
|
- while (spi_is_busy(_currentSetting->spi_d)) { /* nada */ } // wait until BSY=0
|
|
|
|
|
307
|
+ waitSpiTxEnd(_currentSetting->spi_d);
|
311
|
}
|
308
|
}
|
312
|
|
309
|
|
313
|
void SPIClass::write(uint16_t data, uint32_t n) {
|
310
|
void SPIClass::write(uint16_t data, uint32_t n) {
|
|
|
|
|
323
|
void SPIClass::write(const void *data, uint32_t length) {
|
320
|
void SPIClass::write(const void *data, uint32_t length) {
|
324
|
spi_dev * spi_d = _currentSetting->spi_d;
|
321
|
spi_dev * spi_d = _currentSetting->spi_d;
|
325
|
spi_tx(spi_d, data, length); // data can be array of bytes or words
|
322
|
spi_tx(spi_d, data, length); // data can be array of bytes or words
|
326
|
- while (!spi_is_tx_empty(spi_d)) { /* nada */ } // "5. Wait until TXE=1 ..."
|
|
|
327
|
- while (spi_is_busy(spi_d)) { /* nada */ } // "... and then wait until BSY=0 before disabling the SPI."
|
|
|
|
|
323
|
+ waitSpiTxEnd(spi_d);
|
328
|
}
|
324
|
}
|
329
|
|
325
|
|
330
|
uint8_t SPIClass::transfer(uint8_t byte) const {
|
326
|
uint8_t SPIClass::transfer(uint8_t byte) const {
|
331
|
spi_dev * spi_d = _currentSetting->spi_d;
|
327
|
spi_dev * spi_d = _currentSetting->spi_d;
|
332
|
spi_rx_reg(spi_d); // read any previous data
|
328
|
spi_rx_reg(spi_d); // read any previous data
|
333
|
spi_tx_reg(spi_d, byte); // Write the data item to be transmitted into the SPI_DR register
|
329
|
spi_tx_reg(spi_d, byte); // Write the data item to be transmitted into the SPI_DR register
|
334
|
- while (!spi_is_tx_empty(spi_d)) { /* nada */ } // "5. Wait until TXE=1 ..."
|
|
|
335
|
- while (spi_is_busy(spi_d)) { /* nada */ } // "... and then wait until BSY=0 before disabling the SPI."
|
|
|
|
|
330
|
+ waitSpiTxEnd(spi_d);
|
336
|
return (uint8)spi_rx_reg(spi_d); // "... and read the last received data."
|
331
|
return (uint8)spi_rx_reg(spi_d); // "... and read the last received data."
|
337
|
}
|
332
|
}
|
338
|
|
333
|
|
|
|
|
|
342
|
spi_dev * spi_d = _currentSetting->spi_d;
|
337
|
spi_dev * spi_d = _currentSetting->spi_d;
|
343
|
spi_rx_reg(spi_d); // read any previous data
|
338
|
spi_rx_reg(spi_d); // read any previous data
|
344
|
spi_tx_reg(spi_d, data>>8); // write high byte
|
339
|
spi_tx_reg(spi_d, data>>8); // write high byte
|
345
|
- while (!spi_is_tx_empty(spi_d)) { /* nada */ } // wait until TXE=1
|
|
|
346
|
- while (spi_is_busy(spi_d)) { /* nada */ } // wait until BSY=0
|
|
|
|
|
340
|
+ waitSpiTxEnd(spi_d); // wait until TXE=1 and then wait until BSY=0
|
347
|
uint16_t ret = spi_rx_reg(spi_d)<<8; // read and shift high byte
|
341
|
uint16_t ret = spi_rx_reg(spi_d)<<8; // read and shift high byte
|
348
|
spi_tx_reg(spi_d, data); // write low byte
|
342
|
spi_tx_reg(spi_d, data); // write low byte
|
349
|
- while (!spi_is_tx_empty(spi_d)) { /* nada */ } // wait until TXE=1
|
|
|
350
|
- while (spi_is_busy(spi_d)) { /* nada */ } // wait until BSY=0
|
|
|
|
|
343
|
+ waitSpiTxEnd(spi_d); // wait until TXE=1 and then wait until BSY=0
|
351
|
ret += spi_rx_reg(spi_d); // read low byte
|
344
|
ret += spi_rx_reg(spi_d); // read low byte
|
352
|
return ret;
|
345
|
return ret;
|
353
|
}
|
346
|
}
|
|
|
|
|
400
|
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
|
393
|
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
|
401
|
}
|
394
|
}
|
402
|
|
395
|
|
403
|
- while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ } // "5. Wait until TXE=1 ..."
|
|
|
404
|
- while (spi_is_busy(_currentSetting->spi_d)) { /* nada */ } // "... and then wait until BSY=0 before disabling the SPI."
|
|
|
|
|
396
|
+ waitSpiTxEnd(_currentSetting->spi_d); // until TXE=1 and BSY=0
|
405
|
spi_tx_dma_disable(_currentSetting->spi_d);
|
397
|
spi_tx_dma_disable(_currentSetting->spi_d);
|
406
|
spi_rx_dma_disable(_currentSetting->spi_d);
|
398
|
spi_rx_dma_disable(_currentSetting->spi_d);
|
407
|
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
399
|
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
|
|
|
|
456
|
// Avoid interrupts and just loop waiting for the flag to be set.
|
448
|
// Avoid interrupts and just loop waiting for the flag to be set.
|
457
|
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
|
449
|
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
|
458
|
}
|
450
|
}
|
459
|
- while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ } // "5. Wait until TXE=1 ..."
|
|
|
460
|
- while (spi_is_busy(_currentSetting->spi_d)) { /* nada */ } // "... and then wait until BSY=0 before disabling the SPI."
|
|
|
|
|
451
|
+ waitSpiTxEnd(_currentSetting->spi_d); // until TXE=1 and BSY=0
|
461
|
spi_tx_dma_disable(_currentSetting->spi_d);
|
452
|
spi_tx_dma_disable(_currentSetting->spi_d);
|
462
|
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
453
|
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
463
|
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
454
|
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
|
|
|
|
480
|
//delayMicroseconds(10);
|
471
|
//delayMicroseconds(10);
|
481
|
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
|
472
|
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
|
482
|
}
|
473
|
}
|
483
|
-
|
|
|
484
|
- while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ } // "5. Wait until TXE=1 ..."
|
|
|
485
|
- while (spi_is_busy(_currentSetting->spi_d)) { /* nada */ } // "... and then wait until BSY=0 before disabling the SPI."
|
|
|
|
|
474
|
+ waitSpiTxEnd(_currentSetting->spi_d); // until TXE=1 and BSY=0
|
486
|
spi_tx_dma_disable(_currentSetting->spi_d);
|
475
|
spi_tx_dma_disable(_currentSetting->spi_d);
|
487
|
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
476
|
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
488
|
_currentSetting->state = SPI_STATE_READY;
|
477
|
_currentSetting->state = SPI_STATE_READY;
|
|
|
|
|
572
|
* during the initial setup and only set the callback to EventCallback if they are set.
|
561
|
* during the initial setup and only set the callback to EventCallback if they are set.
|
573
|
*/
|
562
|
*/
|
574
|
void SPIClass::EventCallback() {
|
563
|
void SPIClass::EventCallback() {
|
575
|
- while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ } // "5. Wait until TXE=1 ..."
|
|
|
576
|
- while (spi_is_busy(_currentSetting->spi_d)) { /* nada */ } // "... and then wait until BSY=0"
|
|
|
|
|
564
|
+ waitSpiTxEnd(_currentSetting->spi_d);
|
577
|
switch (_currentSetting->state) {
|
565
|
switch (_currentSetting->state) {
|
578
|
case SPI_STATE_TRANSFER:
|
566
|
case SPI_STATE_TRANSFER:
|
579
|
while (spi_is_rx_nonempty(_currentSetting->spi_d)) { /* nada */ }
|
567
|
while (spi_is_rx_nonempty(_currentSetting->spi_d)) { /* nada */ }
|