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@@ -190,12 +190,12 @@ WEAK void SystemClock_Config(void)
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/* Enable Power Control clock */
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__HAL_RCC_PWR_CLK_ENABLE();
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-
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- /* The voltage scaling allows optimizing the power consumption when the device is
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- clocked below the maximum system frequency, to update the voltage scaling value
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+
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+ /* The voltage scaling allows optimizing the power consumption when the device is
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+ clocked below the maximum system frequency, to update the voltage scaling value
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regarding system frequency refer to product datasheet. */
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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+
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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@@ -209,19 +209,19 @@ WEAK void SystemClock_Config(void)
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{
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/* Initialization Error */
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}
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-
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+
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if(HAL_PWREx_EnableOverDrive() != HAL_OK)
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{
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/* Initialization Error */
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}
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-
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- /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
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+
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+ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
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clocks dividers */
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
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{
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/* Initialization Error */
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