Browse Source

restore PR 9661 files & V1 fix

Bob-the-Kuhn 6 years ago
parent
commit
0d8c15c01f

+ 1
- 9
Marlin/src/HAL/HAL_DUE/HAL_Due.h View File

@@ -41,15 +41,7 @@
41 41
 // Defines
42 42
 //
43 43
 #define NUM_SERIAL 1
44
-
45
-//#undef SERIAL_PORT
46
-//#define SERIAL_PORT -1
47
-
48
-#if SERIAL_PORT == -1
49
-  #define MYSERIAL0 SerialUSB
50
-#else
51
-  #define MYSERIAL0 customizedSerial
52
-#endif
44
+#define MYSERIAL0 customizedSerial
53 45
 
54 46
 // We need the previous define before the include, or compilation bombs...
55 47
 #include "MarlinSerial_Due.h"

+ 321
- 200
Marlin/src/HAL/HAL_DUE/HAL_spi_Due.cpp View File

@@ -53,6 +53,7 @@
53 53
 // --------------------------------------------------------------------------
54 54
 
55 55
 #if ENABLED(SOFTWARE_SPI)
56
+
56 57
   // --------------------------------------------------------------------------
57 58
   // software SPI
58 59
   // --------------------------------------------------------------------------
@@ -493,44 +494,77 @@
493 494
   static pfnSpiTxBlock spiTxBlock = spiTxBlockX;
494 495
   static pfnSpiRxBlock spiRxBlock = spiRxBlockX;
495 496
 
496
-  void spiBegin() {
497
-    SET_OUTPUT(SS_PIN);
498
-    WRITE(SS_PIN, HIGH);
499
-    SET_OUTPUT(SCK_PIN);
500
-    SET_INPUT(MISO_PIN);
501
-    SET_OUTPUT(MOSI_PIN);
502
-  }
497
+  #if MB(ALLIGATOR)  // control SDSS pin
498
+    void spiBegin() {
499
+      SET_OUTPUT(SS_PIN);
500
+      WRITE(SS_PIN, HIGH);
501
+      SET_OUTPUT(SCK_PIN);
502
+      SET_INPUT(MISO_PIN);
503
+      SET_OUTPUT(MOSI_PIN);
504
+    }
503 505
 
504
-  uint8_t spiRec() {
505
-    WRITE(SS_PIN, LOW);
506
-    WRITE(MOSI_PIN, 1); /* Output 1s 1*/
507
-    uint8_t b = spiTransferRx(0xFF);
508
-    WRITE(SS_PIN, HIGH);
509
-    return b;
510
-  }
506
+    uint8_t spiRec() {
507
+      WRITE(SS_PIN, LOW);
508
+      WRITE(MOSI_PIN, 1); /* Output 1s 1*/
509
+      uint8_t b = spiTransferRx(0xFF);
510
+      WRITE(SS_PIN, HIGH);
511
+      return b;
512
+    }
511 513
 
512
-  void spiRead(uint8_t* buf, uint16_t nbyte) {
513
-    uint32_t todo = nbyte;
514
-    if (todo == 0) return;
514
+    void spiRead(uint8_t* buf, uint16_t nbyte) {
515
+      uint32_t todo = nbyte;
516
+      if (todo == 0) return;
515 517
 
516
-    WRITE(SS_PIN, LOW);
517
-    WRITE(MOSI_PIN, 1); /* Output 1s 1*/
518
-    spiRxBlock(buf,nbyte);
519
-    WRITE(SS_PIN, HIGH);
520
-  }
518
+      WRITE(SS_PIN, LOW);
519
+      WRITE(MOSI_PIN, 1); /* Output 1s 1*/
520
+      spiRxBlock(buf,nbyte);
521
+      WRITE(SS_PIN, HIGH);
522
+    }
521 523
 
522
-  void spiSend(uint8_t b) {
523
-    WRITE(SS_PIN, LOW);
524
-    (void) spiTransferTx(b);
525
-    WRITE(SS_PIN, HIGH);
526
-  }
524
+    void spiSend(uint8_t b) {
525
+      WRITE(SS_PIN, LOW);
526
+      (void) spiTransferTx(b);
527
+      WRITE(SS_PIN, HIGH);
528
+    }
527 529
 
528
-  void spiSendBlock(uint8_t token, const uint8_t* buf) {
530
+    void spiSendBlock(uint8_t token, const uint8_t* buf) {
531
+      WRITE(SS_PIN, LOW);
532
+      (void) spiTransferTx(token);
533
+      spiTxBlock(buf,512);
534
+      WRITE(SS_PIN, HIGH);
535
+      
536
+  #else   // let calling routine control SDSS
537
+    void spiBegin() {
538
+      SET_OUTPUT(SS_PIN);
539
+      SET_OUTPUT(SCK_PIN);
540
+      SET_INPUT(MISO_PIN);
541
+      SET_OUTPUT(MOSI_PIN);
542
+    }
529 543
 
530
-    WRITE(SS_PIN, LOW);
531
-    (void) spiTransferTx(token);
532
-    spiTxBlock(buf,512);
533
-    WRITE(SS_PIN, HIGH);
544
+    uint8_t spiRec() {
545
+      WRITE(MOSI_PIN, 1); /* Output 1s 1*/
546
+      uint8_t b = spiTransferRx(0xFF);
547
+      return b;
548
+    }
549
+
550
+    void spiRead(uint8_t* buf, uint16_t nbyte) {
551
+      uint32_t todo = nbyte;
552
+      if (todo == 0) return;
553
+
554
+      WRITE(MOSI_PIN, 1); /* Output 1s 1*/
555
+      spiRxBlock(buf,nbyte);
556
+    }
557
+
558
+    void spiSend(uint8_t b) {
559
+      (void) spiTransferTx(b);
560
+    }
561
+
562
+    void spiSendBlock(uint8_t token, const uint8_t* buf) {
563
+      (void) spiTransferTx(token);
564
+      spiTxBlock(buf,512);
565
+
566
+    #endif
567
+  
534 568
   }
535 569
 
536 570
   /**
@@ -566,7 +600,9 @@
566 600
         break;
567 601
     }
568 602
 
569
-    WRITE(SS_PIN, HIGH);
603
+    #if MB(ALLIGATOR)
604
+      WRITE(SS_PIN, HIGH);
605
+    #endif  
570 606
     WRITE(MOSI_PIN, HIGH);
571 607
     WRITE(SCK_PIN, LOW);
572 608
   }
@@ -574,211 +610,296 @@
574 610
   /** Begin SPI transaction, set clock, bit order, data mode */
575 611
   void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
576 612
     // TODO: to be implemented
577
-
578 613
   }
579 614
 
580 615
   #pragma GCC reset_options
581 616
 
582 617
 #else
583
-  // --------------------------------------------------------------------------
584
-  // hardware SPI
585
-  // --------------------------------------------------------------------------
586
-  // 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
587
-  int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
588
-  bool spiInitMaded = false;
589
-
590
-  void spiBegin() {
591
-    if(spiInitMaded == false) {
592
-      // Configure SPI pins
593
-      PIO_Configure(
594
-         g_APinDescription[SCK_PIN].pPort,
595
-         g_APinDescription[SCK_PIN].ulPinType,
596
-         g_APinDescription[SCK_PIN].ulPin,
597
-         g_APinDescription[SCK_PIN].ulPinConfiguration);
598
-      PIO_Configure(
599
-         g_APinDescription[MOSI_PIN].pPort,
600
-         g_APinDescription[MOSI_PIN].ulPinType,
601
-         g_APinDescription[MOSI_PIN].ulPin,
602
-         g_APinDescription[MOSI_PIN].ulPinConfiguration);
603
-      PIO_Configure(
604
-         g_APinDescription[MISO_PIN].pPort,
605
-         g_APinDescription[MISO_PIN].ulPinType,
606
-         g_APinDescription[MISO_PIN].ulPin,
607
-         g_APinDescription[MISO_PIN].ulPinConfiguration);
608
-
609
-      // set master mode, peripheral select, fault detection
610
-      SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PS);
611
-      SPI_Enable(SPI0);
612
-
613
-      #if MB(ALLIGATOR)
614
-        SET_OUTPUT(DAC0_SYNC);
615
-        #if EXTRUDERS > 1
616
-          SET_OUTPUT(DAC1_SYNC);
617
-          WRITE(DAC1_SYNC, HIGH);
618
-        #endif
619
-        SET_OUTPUT(SPI_EEPROM1_CS);
620
-        SET_OUTPUT(SPI_EEPROM2_CS);
621
-        SET_OUTPUT(SPI_FLASH_CS);
622
-        WRITE(DAC0_SYNC, HIGH);
623
-        WRITE(SPI_EEPROM1_CS, HIGH );
624
-        WRITE(SPI_EEPROM2_CS, HIGH );
625
-        WRITE(SPI_FLASH_CS, HIGH );
626
-        WRITE(SS_PIN, HIGH );
627
-      #endif // MB(ALLIGATOR)
628
-
629
-      PIO_Configure(
630
-        g_APinDescription[SPI_PIN].pPort,
631
-        g_APinDescription[SPI_PIN].ulPinType,
632
-        g_APinDescription[SPI_PIN].ulPin,
633
-        g_APinDescription[SPI_PIN].ulPinConfiguration);
634
-      spiInit(1);
635
-      spiInitMaded = true;
618
+
619
+  #if MB(ALLIGATOR)  
620
+    
621
+    // slave selects controlled by SPI controller
622
+    // doesn't support changing SPI speeds for SD card
623
+      
624
+    // --------------------------------------------------------------------------
625
+    // hardware SPI
626
+    // --------------------------------------------------------------------------
627
+    // 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
628
+    int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
629
+    bool spiInitMaded = false;
630
+
631
+    void spiBegin() {
632
+      if(spiInitMaded == false) {
633
+        // Configure SPI pins
634
+        PIO_Configure(
635
+           g_APinDescription[SCK_PIN].pPort,
636
+           g_APinDescription[SCK_PIN].ulPinType,
637
+           g_APinDescription[SCK_PIN].ulPin,
638
+           g_APinDescription[SCK_PIN].ulPinConfiguration);
639
+        PIO_Configure(
640
+           g_APinDescription[MOSI_PIN].pPort,
641
+           g_APinDescription[MOSI_PIN].ulPinType,
642
+           g_APinDescription[MOSI_PIN].ulPin,
643
+           g_APinDescription[MOSI_PIN].ulPinConfiguration);
644
+        PIO_Configure(
645
+           g_APinDescription[MISO_PIN].pPort,
646
+           g_APinDescription[MISO_PIN].ulPinType,
647
+           g_APinDescription[MISO_PIN].ulPin,
648
+           g_APinDescription[MISO_PIN].ulPinConfiguration);
649
+
650
+        // set master mode, peripheral select, fault detection
651
+        SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PS);
652
+        SPI_Enable(SPI0);
653
+
654
+        #if MB(ALLIGATOR)
655
+          SET_OUTPUT(DAC0_SYNC);
656
+          #if EXTRUDERS > 1
657
+            SET_OUTPUT(DAC1_SYNC);
658
+            WRITE(DAC1_SYNC, HIGH);
659
+          #endif
660
+          SET_OUTPUT(SPI_EEPROM1_CS);
661
+          SET_OUTPUT(SPI_EEPROM2_CS);
662
+          SET_OUTPUT(SPI_FLASH_CS);
663
+          WRITE(DAC0_SYNC, HIGH);
664
+          WRITE(SPI_EEPROM1_CS, HIGH );
665
+          WRITE(SPI_EEPROM2_CS, HIGH );
666
+          WRITE(SPI_FLASH_CS, HIGH );
667
+          WRITE(SS_PIN, HIGH );
668
+        #endif // MB(ALLIGATOR)
669
+        
670
+        OUT_WRITE(SDSS,0);
671
+  
672
+        PIO_Configure(
673
+          g_APinDescription[SPI_PIN].pPort,
674
+          g_APinDescription[SPI_PIN].ulPinType,
675
+          g_APinDescription[SPI_PIN].ulPin,
676
+          g_APinDescription[SPI_PIN].ulPinConfiguration);
677
+         
678
+        spiInit(1);
679
+        spiInitMaded = true;
680
+      }
636 681
     }
637
-  }
638 682
 
639
-  void spiInit(uint8_t spiRate) {
640
-    if(spiInitMaded == false) {
641
-      if(spiRate > 6) spiRate = 1;
683
+    void spiInit(uint8_t spiRate) {
684
+      if(spiInitMaded == false) {
685
+        if(spiRate > 6) spiRate = 1;
686
+
687
+        #if MB(ALLIGATOR)
688
+          // Set SPI mode 1, clock, select not active after transfer, with delay between transfers
689
+          SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
690
+                            SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
691
+                            SPI_CSR_DLYBCT(1));
692
+          // Set SPI mode 0, clock, select not active after transfer, with delay between transfers
693
+          SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
694
+                            SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
695
+                            SPI_CSR_DLYBCT(1));
696
+        #endif//MB(ALLIGATOR)
642 697
 
643
-      #if MB(ALLIGATOR)
644
-        // Set SPI mode 1, clock, select not active after transfer, with delay between transfers
645
-        SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
646
-                          SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
647
-                          SPI_CSR_DLYBCT(1));
648 698
         // Set SPI mode 0, clock, select not active after transfer, with delay between transfers
649
-        SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
699
+        SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
650 700
                           SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
651 701
                           SPI_CSR_DLYBCT(1));
652
-      #endif//MB(ALLIGATOR)
653
-
654
-      // Set SPI mode 0, clock, select not active after transfer, with delay between transfers
655
-      SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
656
-                        SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
657
-                        SPI_CSR_DLYBCT(1));
658
-      SPI_Enable(SPI0);
659
-      spiInitMaded = true;
702
+        SPI_Enable(SPI0);
703
+        spiInitMaded = true;
704
+      }
660 705
     }
661
-  }
662 706
 
663
-  // Write single byte to SPI
664
-  void spiSend(byte b) {
665
-    // write byte with address and end transmission flag
666
-    SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
667
-    // wait for transmit register empty
668
-    while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
669
-    // wait for receive register
670
-    while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
671
-    // clear status
672
-    SPI0->SPI_RDR;
673
-    //delayMicroseconds(1U);
674
-  }
675
-
676
-  void spiSend(const uint8_t* buf, size_t n) {
677
-    if (n == 0) return;
678
-    for (size_t i = 0; i < n - 1; i++) {
679
-      SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
707
+    // Write single byte to SPI
708
+    void spiSend(byte b) {
709
+      // write byte with address and end transmission flag
710
+      SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
711
+      // wait for transmit register empty
680 712
       while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
713
+      // wait for receive register
681 714
       while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
715
+      // clear status
682 716
       SPI0->SPI_RDR;
683 717
       //delayMicroseconds(1U);
684 718
     }
685
-    spiSend(buf[n - 1]);
686
-  }
687 719
 
688
-  void spiSend(uint32_t chan, byte b) {
689
-    uint8_t dummy_read = 0;
690
-    // wait for transmit register empty
691
-    while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
692
-    // write byte with address and end transmission flag
693
-    SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER;
694
-    // wait for receive register
695
-    while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
696
-    // clear status
697
-    while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
698
-      dummy_read = SPI0->SPI_RDR;
699
-    UNUSED(dummy_read);
700
-  }
720
+    void spiSend(const uint8_t* buf, size_t n) {
721
+      if (n == 0) return;
722
+      for (size_t i = 0; i < n - 1; i++) {
723
+        SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
724
+        while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
725
+        while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
726
+        SPI0->SPI_RDR;
727
+        //delayMicroseconds(1U);
728
+      }
729
+      spiSend(buf[n - 1]);
730
+    }
701 731
 
702
-  void spiSend(uint32_t chan, const uint8_t* buf, size_t n) {
703
-    uint8_t dummy_read = 0;
704
-    if (n == 0) return;
705
-    for (int i = 0; i < (int)n - 1; i++) {
732
+    void spiSend(uint32_t chan, byte b) {
733
+      uint8_t dummy_read = 0;
734
+      // wait for transmit register empty
706 735
       while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
707
-      SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan);
736
+      // write byte with address and end transmission flag
737
+      SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER;
738
+      // wait for receive register
708 739
       while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
740
+      // clear status
709 741
       while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
710 742
         dummy_read = SPI0->SPI_RDR;
711 743
       UNUSED(dummy_read);
712 744
     }
713
-    spiSend(chan, buf[n - 1]);
714
-  }
715
-
716
-  // Read single byte from SPI
717
-  uint8_t spiRec() {
718
-    // write dummy byte with address and end transmission flag
719
-    SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
720
-    // wait for transmit register empty
721
-    while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
722
-
723
-    // wait for receive register
724
-    while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
725
-    // get byte from receive register
726
-    //delayMicroseconds(1U);
727
-    return SPI0->SPI_RDR;
728
-  }
729 745
 
730
-  uint8_t spiRec(uint32_t chan) {
731
-    uint8_t spirec_tmp;
732
-    // wait for transmit register empty
733
-    while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
734
-    while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
735
-      spirec_tmp =  SPI0->SPI_RDR;
736
-      UNUSED(spirec_tmp);
737
-
738
-    // write dummy byte with address and end transmission flag
739
-    SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
740
-
741
-    // wait for receive register
742
-    while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
743
-    // get byte from receive register
744
-    return SPI0->SPI_RDR;
745
-  }
746
+    void spiSend(uint32_t chan, const uint8_t* buf, size_t n) {
747
+      uint8_t dummy_read = 0;
748
+      if (n == 0) return;
749
+      for (int i = 0; i < (int)n - 1; i++) {
750
+        while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
751
+        SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan);
752
+        while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
753
+        while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
754
+          dummy_read = SPI0->SPI_RDR;
755
+        UNUSED(dummy_read);
756
+      }
757
+      spiSend(chan, buf[n - 1]);
758
+    }
746 759
 
747
-  // Read from SPI into buffer
748
-  void spiRead(uint8_t*buf, uint16_t nbyte) {
749
-    if (nbyte-- == 0) return;
760
+    // Read single byte from SPI
761
+    uint8_t spiRec() {
762
+      // write dummy byte with address and end transmission flag
763
+      SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
764
+      // wait for transmit register empty
765
+      while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
750 766
 
751
-    for (int i = 0; i < nbyte; i++) {
752
-      //while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
753
-      SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
767
+      // wait for receive register
754 768
       while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
755
-      buf[i] = SPI0->SPI_RDR;
769
+      // get byte from receive register
756 770
       //delayMicroseconds(1U);
771
+      return SPI0->SPI_RDR;
757 772
     }
758
-    buf[nbyte] = spiRec();
759
-  }
760 773
 
761
-  // Write from buffer to SPI
762
-  void spiSendBlock(uint8_t token, const uint8_t* buf) {
763
-    SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
764
-    while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
765
-    //while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
766
-    //SPI0->SPI_RDR;
767
-    for (int i = 0; i < 511; i++) {
768
-      SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
774
+    uint8_t spiRec(uint32_t chan) {
775
+      uint8_t spirec_tmp;
776
+      // wait for transmit register empty
769 777
       while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
778
+      while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
779
+        spirec_tmp =  SPI0->SPI_RDR;
780
+        UNUSED(spirec_tmp);
781
+
782
+      // write dummy byte with address and end transmission flag
783
+      SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
784
+
785
+      // wait for receive register
770 786
       while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
771
-      SPI0->SPI_RDR;
772
-      //delayMicroseconds(1U);
787
+      // get byte from receive register
788
+      return SPI0->SPI_RDR;
773 789
     }
774
-    spiSend(buf[511]);
775
-  }
776 790
 
777
-  /** Begin SPI transaction, set clock, bit order, data mode */
778
-  void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
779
-    // TODO: to be implemented
780
-  }
791
+    // Read from SPI into buffer
792
+    void spiRead(uint8_t*buf, uint16_t nbyte) {
793
+      if (nbyte-- == 0) return;
794
+
795
+      for (int i = 0; i < nbyte; i++) {
796
+        //while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
797
+        SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
798
+        while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
799
+        buf[i] = SPI0->SPI_RDR;
800
+        //delayMicroseconds(1U);
801
+      }
802
+      buf[nbyte] = spiRec();
803
+    }
804
+
805
+    // Write from buffer to SPI
806
+    void spiSendBlock(uint8_t token, const uint8_t* buf) {
807
+      SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
808
+      while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
809
+      //while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
810
+      //SPI0->SPI_RDR;
811
+      for (int i = 0; i < 511; i++) {
812
+        SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
813
+        while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
814
+        while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
815
+        SPI0->SPI_RDR;
816
+        //delayMicroseconds(1U);
817
+      }
818
+      spiSend(buf[511]);
819
+    }
820
+
821
+    /** Begin SPI transaction, set clock, bit order, data mode */
822
+    void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
823
+      // TODO: to be implemented
824
+    }
825
+
826
+  #else  // U8G compatible hardware SPI
827
+ 
828
+    void spiInit(uint8_t spiRate = 6 ) {  // default to slowest rate if not specified)
829
+      // 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
830
+      int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
831
+      if(spiRate > 6) spiRate = 1;
832
+
833
+          /* enable PIOA and SPI0 */
834
+      REG_PMC_PCER0 = (1UL << ID_PIOA) | (1UL << ID_SPI0);
835
+
836
+      /* disable PIO on A26 and A27 */
837
+      REG_PIOA_PDR = 0x0c000000;
838
+      OUT_WRITE(SDSS, 1);
839
+
840
+      /* reset SPI0 (from sam lib) */
841
+      SPI0->SPI_CR = SPI_CR_SPIDIS;
842
+      SPI0->SPI_CR = SPI_CR_SWRST;
843
+      SPI0->SPI_CR = SPI_CR_SWRST;
844
+      SPI0->SPI_CR = SPI_CR_SPIEN;
845
+
846
+
847
+      /* master mode, no fault detection, chip select 0 */
848
+      SPI0->SPI_MR = SPI_MR_MSTR | SPI_MR_PCSDEC | SPI_MR_MODFDIS;
849
+
850
+      /* SPI mode 0, 8 Bit data transfer, baud rate */
851
+      SPI0->SPI_CSR[0] = SPI_CSR_SCBR(spiDueDividors[spiRate]) | 1;
852
+    }     
853
+
854
+    static uint8_t spiTransfer(uint8_t data) {
855
+
856
+      /* wait until tx register is empty */
857
+      while( (SPI0->SPI_SR & SPI_SR_TDRE) == 0 );
858
+      /* send data */
859
+      SPI0->SPI_TDR = (uint32_t)data; // | SPI_PCS(0xF);
860
+
861
+      // wait for transmit register empty
862
+      while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
863
+
864
+      // wait for receive register
865
+      while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
866
+      // get byte from receive register
867
+      return SPI0->SPI_RDR;
868
+    }
869
+
870
+    void spiBegin() {
871
+      spiInit();
872
+    }
873
+
874
+    uint8_t spiRec() {
875
+      uint8_t data = spiTransfer(0xff);
876
+      return data;
877
+    }
878
+
879
+    void spiRead(uint8_t*buf, uint16_t nbyte) {
880
+      if (nbyte == 0) return;
881
+      for (int i = 0; i < nbyte; i++) {
882
+        buf[i] = spiTransfer(0xff);
883
+      }
884
+    }
885
+
886
+    void spiSend(uint8_t data) {
887
+      spiTransfer(data);
888
+    }
889
+
890
+    void spiSend(const uint8_t* buf, size_t n) {
891
+      if (n == 0) return;
892
+      for (uint16_t i = 0; i < n; i++)
893
+        spiTransfer(buf[i]);
894
+    }
781 895
 
896
+    void spiSendBlock(uint8_t token, const uint8_t* buf) {
897
+      spiTransfer(token);
898
+      for (uint16_t i = 0; i < 512; i++)
899
+        spiTransfer(buf[i]);
900
+    }  
901
+      
902
+  #endif  //MB(ALLIGATOR)
782 903
 #endif // ENABLED(SOFTWARE_SPI)
783 904
 
784 905
 #endif // ARDUINO_ARCH_SAM

+ 163
- 0
Marlin/src/HAL/HAL_DUE/u8g_com_HAL_DUE_shared_hw_spi.cpp View File

@@ -0,0 +1,163 @@
1
+/**
2
+ * Marlin 3D Printer Firmware
3
+ * Copyright (C) 2016, 2017, 2018 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
4
+ *
5
+ * Based on Sprinter and grbl.
6
+ * Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
7
+ *
8
+ * This program is free software: you can redistribute it and/or modify
9
+ * it under the terms of the GNU General Public License as published by
10
+ * the Free Software Foundation, either version 3 of the License, or
11
+ * (at your option) any later version.
12
+ *
13
+ * This program is distributed in the hope that it will be useful,
14
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
15
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
+ * GNU General Public License for more details.
17
+ *
18
+ * You should have received a copy of the GNU General Public License
19
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20
+ *
21
+ */
22
+
23
+
24
+/*
25
+
26
+  based on u8g_com_msp430_hw_spi.c
27
+
28
+  Universal 8bit Graphics Library
29
+
30
+  Copyright (c) 2012, olikraus@gmail.com
31
+  All rights reserved.
32
+
33
+  Redistribution and use in source and binary forms, with or without modification,
34
+  are permitted provided that the following conditions are met:
35
+
36
+  * Redistributions of source code must retain the above copyright notice, this list
37
+  of conditions and the following disclaimer.
38
+
39
+  * Redistributions in binary form must reproduce the above copyright notice, this
40
+  list of conditions and the following disclaimer in the documentation and/or other
41
+  materials provided with the distribution.
42
+
43
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
44
+  CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
45
+  INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
46
+  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
47
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
48
+  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
50
+  NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
51
+  LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
52
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
53
+  STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
54
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
55
+  ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56
+
57
+*/
58
+
59
+
60
+#ifdef __SAM3X8E__
61
+
62
+//  #include <inttypes.h>
63
+
64
+//  #include "src/core/macros.h"
65
+//  #include "Configuration.h"
66
+#include "../../Marlin.h"
67
+#include "../../inc/MarlinConfig.h"
68
+
69
+  #include <U8glib.h>
70
+
71
+  #define SPI_FULL_SPEED 0
72
+  #define SPI_HALF_SPEED 1
73
+  #define SPI_QUARTER_SPEED 2
74
+  #define SPI_EIGHTH_SPEED 3
75
+  #define SPI_SIXTEENTH_SPEED 4
76
+  #define SPI_SPEED_5 5
77
+  #define SPI_SPEED_6 6
78
+
79
+  void spiBegin();
80
+  void spiInit(uint8_t spiRate);
81
+  void spiSend(uint8_t b);
82
+  void spiSend(const uint8_t* buf, size_t n);
83
+
84
+  #include <Arduino.h>
85
+  #include "../../core/macros.h"
86
+  #include "fastio_Due.h"
87
+
88
+
89
+  void u8g_SetPIOutput_DUE_hw_spi(u8g_t *u8g, uint8_t pin_index) {
90
+     PIO_Configure(g_APinDescription[u8g->pin_list[pin_index]].pPort, PIO_OUTPUT_1,
91
+       g_APinDescription[u8g->pin_list[pin_index]].ulPin, g_APinDescription[u8g->pin_list[pin_index]].ulPinConfiguration);  // OUTPUT
92
+  }
93
+
94
+  void u8g_SetPILevel_DUE_hw_spi(u8g_t *u8g, uint8_t pin_index, uint8_t level) {
95
+    volatile Pio* port = g_APinDescription[u8g->pin_list[pin_index]].pPort;
96
+    uint32_t mask = g_APinDescription[u8g->pin_list[pin_index]].ulPin;
97
+    if (level) port->PIO_SODR = mask;
98
+    else port->PIO_CODR = mask;
99
+  }
100
+
101
+  uint8_t u8g_com_HAL_DUE_shared_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
102
+  {
103
+    switch(msg)
104
+    {
105
+      case U8G_COM_MSG_STOP:
106
+        break;
107
+
108
+      case U8G_COM_MSG_INIT:
109
+        u8g_SetPILevel_DUE_hw_spi(u8g, U8G_PI_CS, 1);
110
+        u8g_SetPILevel_DUE_hw_spi(u8g, U8G_PI_A0, 1);
111
+
112
+        u8g_SetPIOutput_DUE_hw_spi(u8g, U8G_PI_CS);
113
+        u8g_SetPIOutput_DUE_hw_spi(u8g, U8G_PI_A0);
114
+
115
+        u8g_Delay(5);
116
+
117
+        spiBegin();
118
+
119
+        #ifndef SPI_SPEED
120
+          #define SPI_SPEED SPI_FULL_SPEED  // use same SPI speed as SD card
121
+        #endif
122
+        spiInit(2);
123
+
124
+        break;
125
+
126
+      case U8G_COM_MSG_ADDRESS:                     /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
127
+        u8g_SetPILevel_DUE_hw_spi(u8g, U8G_PI_A0, arg_val);
128
+        break;
129
+
130
+      case U8G_COM_MSG_CHIP_SELECT:
131
+        u8g_SetPILevel_DUE_hw_spi(u8g, U8G_PI_CS, (arg_val ? 0 : 1));
132
+        break;
133
+
134
+      case U8G_COM_MSG_RESET:
135
+        break;
136
+
137
+      case U8G_COM_MSG_WRITE_BYTE:
138
+
139
+        spiSend((uint8_t)arg_val);
140
+        break;
141
+
142
+      case U8G_COM_MSG_WRITE_SEQ: {
143
+          uint8_t *ptr = (uint8_t*) arg_ptr;
144
+          while (arg_val > 0) {
145
+            spiSend(*ptr++);
146
+            arg_val--;
147
+          }
148
+        }
149
+        break;
150
+
151
+      case U8G_COM_MSG_WRITE_SEQ_P: {
152
+          uint8_t *ptr = (uint8_t*) arg_ptr;
153
+          while (arg_val > 0) {
154
+            spiSend(*ptr++);
155
+            arg_val--;
156
+          }
157
+        }
158
+        break;
159
+    }
160
+    return 1;
161
+  }
162
+
163
+#endif  //__SAM3X8E__

+ 2
- 2
Marlin/src/config/examples/MakerParts/Configuration.h View File

@@ -125,7 +125,7 @@
125 125
  *
126 126
  * :[-1, 0, 1, 2, 3, 4, 5, 6, 7]
127 127
  */
128
-#define SERIAL_PORT 0
128
+#define SERIAL_PORT -1
129 129
 
130 130
 /**
131 131
  * Select a secondary serial port on the board to use for communication with the host.
@@ -134,7 +134,7 @@
134 134
  *
135 135
  * :[-1, 0, 1, 2, 3, 4, 5, 6, 7]
136 136
  */
137
-#define SERIAL_PORT_2 -1
137
+#define SERIAL_PORT_2 0
138 138
 
139 139
 /**
140 140
  * This setting determines the communication speed of the printer.

+ 2
- 2
Marlin/src/gcode/queue.cpp View File

@@ -517,7 +517,7 @@ void advance_command_queue() {
517 517
         card.closefile();
518 518
         SERIAL_PROTOCOLLNPGM(MSG_FILE_SAVED);
519 519
 
520
-        #ifndef USBCON
520
+        #if !defined(__AVR__) || !defined(USBCON)
521 521
           #if ENABLED(SERIAL_STATS_DROPPED_RX)
522 522
             SERIAL_ECHOLNPAIR("Dropped bytes: ", customizedSerial.dropped());
523 523
           #endif
@@ -525,7 +525,7 @@ void advance_command_queue() {
525 525
           #if ENABLED(SERIAL_STATS_MAX_RX_QUEUED)
526 526
             SERIAL_ECHOLNPAIR("Max RX Queue Size: ", customizedSerial.rxMaxEnqueued());
527 527
           #endif
528
-        #endif // !USBCON
528
+        #endif //  !defined(__AVR__) || !defined(USBCON)
529 529
 
530 530
         ok_to_send();
531 531
       }

+ 1
- 1
Marlin/src/inc/Conditionals_adv.h View File

@@ -28,7 +28,7 @@
28 28
 #ifndef CONDITIONALS_ADV_H
29 29
 #define CONDITIONALS_ADV_H
30 30
 
31
-  #ifndef USBCON
31
+  #if !defined(__AVR__) || !defined(USBCON)
32 32
     // Define constants and variables for buffering serial data.
33 33
     // Use only 0 or powers of 2 greater than 1
34 34
     // : [0, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, ...]

+ 2
- 2
Marlin/src/inc/SanityCheck.h View File

@@ -275,7 +275,7 @@
275 275
 /**
276 276
  * Serial
277 277
  */
278
-#ifndef USBCON
278
+#if !defined(__AVR__) || !defined(USBCON)
279 279
   #if ENABLED(SERIAL_XON_XOFF) && RX_BUFFER_SIZE < 1024
280 280
     #error "SERIAL_XON_XOFF requires RX_BUFFER_SIZE >= 1024 for reliable transfers without drops."
281 281
   #elif RX_BUFFER_SIZE && (RX_BUFFER_SIZE < 2 || !IS_POWER_OF_2(RX_BUFFER_SIZE))
@@ -1308,7 +1308,7 @@ static_assert(1 >= 0
1308 1308
 /**
1309 1309
  * emergency-command parser
1310 1310
  */
1311
-#if ENABLED(EMERGENCY_PARSER) && defined(USBCON)
1311
+#if ENABLED(EMERGENCY_PARSER) && defined(__AVR__) && defined(USBCON)
1312 1312
   #error "EMERGENCY_PARSER does not work on boards with AT90USB processors (USBCON)."
1313 1313
 #endif
1314 1314
 

+ 189
- 0
Marlin/src/lcd/dogm/u8g_dev_uc1701_mini12864_HAL.cpp View File

@@ -0,0 +1,189 @@
1
+/**
2
+ * Marlin 3D Printer Firmware
3
+ * Copyright (C) 2016, 2017, 2018 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
4
+ *
5
+ * Based on Sprinter and grbl.
6
+ * Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
7
+ *
8
+ * This program is free software: you can redistribute it and/or modify
9
+ * it under the terms of the GNU General Public License as published by
10
+ * the Free Software Foundation, either version 3 of the License, or
11
+ * (at your option) any later version.
12
+ *
13
+ * This program is distributed in the hope that it will be useful,
14
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
15
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
+ * GNU General Public License for more details.
17
+ *
18
+ * You should have received a copy of the GNU General Public License
19
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20
+ *
21
+ */
22
+
23
+
24
+/*
25
+
26
+  based on u8g_dev_uc1701_mini12864_HAL.c (dealextreme)
27
+
28
+  Universal 8bit Graphics Library
29
+
30
+  Copyright (c) 2011, olikraus@gmail.com
31
+  All rights reserved.
32
+
33
+  Redistribution and use in source and binary forms, with or without modification,
34
+  are permitted provided that the following conditions are met:
35
+
36
+  * Redistributions of source code must retain the above copyright notice, this list
37
+    of conditions and the following disclaimer.
38
+
39
+  * Redistributions in binary form must reproduce the above copyright notice, this
40
+    list of conditions and the following disclaimer in the documentation and/or other
41
+    materials provided with the distribution.
42
+
43
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
44
+  CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
45
+  INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
46
+  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
47
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
48
+  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
50
+  NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
51
+  LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
52
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
53
+  STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
54
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
55
+  ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56
+
57
+
58
+*/
59
+
60
+#include "../../inc/MarlinConfig.h"
61
+
62
+#if ENABLED(DOGLCD)
63
+
64
+#include <U8glib.h>
65
+
66
+#include "HAL_LCD_com_defines.h"
67
+
68
+#define WIDTH 128
69
+#define HEIGHT 64
70
+#define PAGE_HEIGHT 8
71
+
72
+static const uint8_t u8g_dev_uc1701_mini12864_HAL_init_seq[] PROGMEM = {
73
+  U8G_ESC_CS(0),             /* disable chip */
74
+  U8G_ESC_ADR(0),           /* instruction mode */
75
+  U8G_ESC_RST(1),           /* do reset low pulse with (1*16)+2 milliseconds */
76
+  U8G_ESC_CS(1),             /* enable chip */
77
+
78
+  0x0e2,            /* soft reset */
79
+  0x040,    /* set display start line to 0 */
80
+  0x0a0,    /* ADC set to reverse */
81
+  0x0c8,    /* common output mode */
82
+  0x0a6,    /* display normal, bit val 0: LCD pixel off. */
83
+  0x0a2,    /* LCD bias 1/9 */
84
+  0x02f,    /* all power  control circuits on */
85
+  0x0f8,    /* set booster ratio to */
86
+  0x000,    /* 4x */
87
+  0x023,    /* set V0 voltage resistor ratio to large */
88
+  0x081,    /* set contrast */
89
+  0x027,    /* contrast value */
90
+  0x0ac,    /* indicator */
91
+  0x000,    /* disable */
92
+  0x0af,    /* display on */
93
+
94
+  U8G_ESC_DLY(100),       /* delay 100 ms */
95
+  0x0a5,                    /* display all points, ST7565 */
96
+  U8G_ESC_DLY(100),       /* delay 100 ms */
97
+  U8G_ESC_DLY(100),       /* delay 100 ms */
98
+  0x0a4,                    /* normal display */
99
+  U8G_ESC_CS(0),             /* disable chip */
100
+  U8G_ESC_END                /* end of sequence */
101
+};
102
+
103
+static const uint8_t u8g_dev_uc1701_mini12864_HAL_data_start[] PROGMEM = {
104
+  U8G_ESC_ADR(0),           /* instruction mode */
105
+  U8G_ESC_CS(1),             /* enable chip */
106
+  0x010,    /* set upper 4 bit of the col adr to 0 */
107
+  0x000,    /* set lower 4 bit of the col adr to 4  */
108
+  U8G_ESC_END                /* end of sequence */
109
+};
110
+
111
+uint8_t u8g_dev_uc1701_mini12864_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
112
+{
113
+  switch(msg)
114
+  {
115
+    case U8G_DEV_MSG_INIT:
116
+      u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
117
+      u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_init_seq);
118
+      break;
119
+    case U8G_DEV_MSG_STOP:
120
+      break;
121
+    case U8G_DEV_MSG_PAGE_NEXT:
122
+      {
123
+        u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
124
+        u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_data_start);
125
+        u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page */
126
+        u8g_SetAddress(u8g, dev, 1);           /* data mode */
127
+        if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
128
+          return 0;
129
+        u8g_SetChipSelect(u8g, dev, 0);
130
+      }
131
+      break;
132
+    case U8G_DEV_MSG_CONTRAST:
133
+      u8g_SetChipSelect(u8g, dev, 1);
134
+      u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
135
+      u8g_WriteByte(u8g, dev, 0x081);
136
+      u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
137
+      u8g_SetChipSelect(u8g, dev, 0);
138
+      return 1;
139
+  }
140
+  return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
141
+}
142
+
143
+uint8_t u8g_dev_uc1701_mini12864_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
144
+{
145
+  switch(msg)
146
+  {
147
+    case U8G_DEV_MSG_INIT:
148
+      u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
149
+      u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_init_seq);
150
+      break;
151
+    case U8G_DEV_MSG_STOP:
152
+      break;
153
+    case U8G_DEV_MSG_PAGE_NEXT:
154
+      {
155
+        u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
156
+
157
+        u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_data_start);
158
+        u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page */
159
+        u8g_SetAddress(u8g, dev, 1);           /* data mode */
160
+  u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)pb->buf);
161
+        u8g_SetChipSelect(u8g, dev, 0);
162
+
163
+        u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_data_start);
164
+        u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page */
165
+        u8g_SetAddress(u8g, dev, 1);           /* data mode */
166
+  u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
167
+        u8g_SetChipSelect(u8g, dev, 0);
168
+      }
169
+      break;
170
+    case U8G_DEV_MSG_CONTRAST:
171
+      u8g_SetChipSelect(u8g, dev, 1);
172
+      u8g_SetAddress(u8g, dev, 0);          /* instruction mode */
173
+      u8g_WriteByte(u8g, dev, 0x081);
174
+      u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
175
+      u8g_SetChipSelect(u8g, dev, 0);
176
+      return 1;
177
+  }
178
+  return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
179
+}
180
+
181
+U8G_PB_DEV(u8g_dev_uc1701_mini12864_HAL_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1701_mini12864_HAL_fn, U8G_COM_HAL_SW_SPI_FN);
182
+U8G_PB_DEV(u8g_dev_uc1701_mini12864_HAL_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1701_mini12864_HAL_fn, U8G_COM_HAL_HW_SPI_FN);
183
+
184
+uint8_t u8g_dev_uc1701_mini12864_HAL_2x_buf[WIDTH*2] U8G_NOCOMMON ;
185
+u8g_pb_t u8g_dev_uc1701_mini12864_HAL_2x_pb = { {16, HEIGHT, 0, 0, 0},  WIDTH, u8g_dev_uc1701_mini12864_HAL_2x_buf};
186
+u8g_dev_t u8g_dev_uc1701_mini12864_HAL_2x_sw_spi = { u8g_dev_uc1701_mini12864_HAL_2x_fn, &u8g_dev_uc1701_mini12864_HAL_2x_pb, U8G_COM_HAL_SW_SPI_FN };
187
+u8g_dev_t u8g_dev_uc1701_mini12864_HAL_2x_hw_spi = { u8g_dev_uc1701_mini12864_HAL_2x_fn, &u8g_dev_uc1701_mini12864_HAL_2x_pb, U8G_COM_HAL_HW_SPI_FN };
188
+
189
+#endif // DOGLCD

+ 11
- 0
Marlin/src/pins/pins_DUE3DOM_MINI.h View File

@@ -156,5 +156,16 @@
156 156
     #define BTN_ENC         37
157 157
 
158 158
     #define BEEPER_PIN      -1
159
+    
160
+   #elif ENABLED(MINIPANEL)
161
+    #define BTN_EN1         52
162
+    #define BTN_EN2         50
163
+    #define BTN_ENC         48
164
+    #define LCD_SDSS        4
165
+    #define SD_DETECT_PIN   14
166
+    #define BEEPER_PIN      41
167
+    #define DOGLCD_A0       46
168
+    #define DOGLCD_CS       45
169
+    
159 170
   #endif // SPARK_FULL_GRAPHICS
160 171
 #endif // ULTRA_LCD

+ 46
- 11
Marlin/src/pins/pins_RAMPS_FD_V1.h View File

@@ -125,7 +125,7 @@
125 125
 #define HEATER_0_PIN        9
126 126
 #define HEATER_1_PIN       10
127 127
 #define HEATER_2_PIN       11
128
-#define HEATER_BED_PIN      8 // BED
128
+#define HEATER_BED_PIN      8
129 129
 
130 130
 #define FAN_PIN            12
131 131
 #define CONTROLLER_FAN_PIN -1
@@ -140,23 +140,58 @@
140 140
 // LCD / Controller
141 141
 //
142 142
 #if ENABLED(ULTRA_LCD)
143
+  // ramps-fd lcd adaptor
144
+  
145
+  
146
+  #define BEEPER_PIN          37
147
+  #define BTN_EN1             33
148
+  #define BTN_EN2             31
149
+  #define BTN_ENC             35
150
+  #define SD_DETECT_PIN       49
151
+
152
+  
143 153
   #if ENABLED(NEWPANEL)
144
-    // ramps-fd lcd adaptor
145 154
     #define LCD_PINS_RS         16
146 155
     #define LCD_PINS_ENABLE     17
147 156
     #define LCD_PINS_D4         23
148 157
     #define LCD_PINS_D5         25
149 158
     #define LCD_PINS_D6         27
150 159
     #define LCD_PINS_D7         29
160
+  #endif
161
+  
162
+  #if ENABLED(MINIPANEL)
163
+    #define DOGLCD_CS           25
164
+    #define DOGLCD_A0           27
165
+  #endif  
166
+#endif // ULTRA_LCD
151 167
 
152
-    #if ENABLED(REPRAP_DISCOUNT_SMART_CONTROLLER)
153
-      #define BEEPER_PIN        37
154
-
155
-      #define BTN_EN1           33
156
-      #define BTN_EN2           31
157
-      #define BTN_ENC           35
168
+#if ENABLED(HAVE_TMC2208)
169
+  /**
170
+   * TMC2208 stepper drivers
171
+   *
172
+   * Hardware serial communication ports.
173
+   * If undefined software serial is used according to the pins below
174
+   */
175
+  //#define X_HARDWARE_SERIAL  Serial1
176
+  //#define X2_HARDWARE_SERIAL Serial1
177
+  //#define Y_HARDWARE_SERIAL  Serial1
178
+  //#define Y2_HARDWARE_SERIAL Serial1
179
+  //#define Z_HARDWARE_SERIAL  Serial1
180
+  //#define Z2_HARDWARE_SERIAL Serial1
181
+  //#define E0_HARDWARE_SERIAL Serial1
182
+  //#define E1_HARDWARE_SERIAL Serial1
183
+  //#define E2_HARDWARE_SERIAL Serial1
184
+  //#define E3_HARDWARE_SERIAL Serial1
185
+  //#define E4_HARDWARE_SERIAL Serial1
186
+#endif
158 187
 
159
-      #define SD_DETECT_PIN     49
160
-    #endif
188
+//
189
+// M3/M4/M5 - Spindle/Laser Control
190
+//
191
+#if ENABLED(SPINDLE_LASER_ENABLE) && !PIN_EXISTS(SPINDLE_LASER_ENABLE)
192
+  #if HOTENDS < 3
193
+    #define SPINDLE_LASER_ENABLE_PIN  45  // Use E2 ENA
194
+    #define SPINDLE_LASER_PWM_PIN     12  // MUST BE HARDWARE PWM
195
+    #define SPINDLE_DIR_PIN           47 // Use E2 DIR
161 196
   #endif
162
-#endif // ULTRA_LCD
197
+#endif

+ 8
- 0
Marlin/src/pins/pins_RAMPS_FD_V2.h View File

@@ -36,3 +36,11 @@
36 36
 #undef INVERTED_FAN_PINS
37 37
 
38 38
 #define I2C_EEPROM
39
+
40
+#ifndef PS_ON_PIN
41
+  #define PS_ON_PIN        12
42
+#endif
43
+
44
+#ifndef FILWIDTH_PIN
45
+  #define FILWIDTH_PIN      5   // Analog Input on AUX2
46
+#endif

Loading…
Cancel
Save