Browse Source

Support for MEEB 3DP board (#18138)

cccc 4 years ago
parent
commit
2bf63e29c6
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33 changed files with 1864 additions and 9 deletions
  1. 1
    0
      Marlin/src/core/boards.h
  2. 2
    0
      Marlin/src/pins/pins.h
  3. 173
    0
      Marlin/src/pins/stm32f1/pins_CCROBOT_MEEB_3DP.h
  4. 53
    0
      buildroot/share/PlatformIO/boards/MEEB_3DP.json
  5. 14
    0
      buildroot/share/PlatformIO/ldscripts/STM32F103RC_MEEB_3DP.ld
  6. 61
    0
      buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py
  7. 34
    0
      buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP_create_variant.py
  8. 162
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/board.cpp
  9. 125
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/board/board.h
  10. 18
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/bootloader.ld
  11. 220
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/common.inc
  12. 7
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/extra_libs.inc
  13. 26
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/flash.ld
  14. 31
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/jtag.ld
  15. 5
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/mem-flash.inc
  16. 5
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/mem-jtag.inc
  17. 5
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/mem-ram.inc
  18. 25
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/ram.ld
  19. 18
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103rb.ld
  20. 17
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103rb_bootloader.ld
  21. 18
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103rc.ld
  22. 18
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103rc_bootloader.ld
  23. 18
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103re.ld
  24. 78
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/ld/vector_symbols.inc
  25. 2
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/pins_arduino.h
  26. 20
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/variant.h
  27. 225
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/boards.cpp
  28. 106
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/boards_setup.cpp
  29. 57
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/start.S
  30. 95
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/start_c.c
  31. 176
    0
      buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/syscalls.c
  32. 23
    0
      buildroot/share/tests/STM32F103RC_cc_meeb_3dp-tests
  33. 26
    9
      platformio.ini

+ 1
- 0
Marlin/src/core/boards.h View File

@@ -305,6 +305,7 @@
305 305
 #define BOARD_MKS_ROBIN_E3D           4026  // MKS Robin E3D (STM32F103RCT6)
306 306
 #define BOARD_MKS_ROBIN_E3            4027  // MKS Robin E3 (STM32F103RCT6)
307 307
 #define BOARD_MALYAN_M300             4028  // STM32F070-based delta
308
+#define BOARD_CCROBOT_MEEB_3DP        4029  // ccrobot-online.com MEEB_3DP (STM32F103RC)
308 309
 
309 310
 //
310 311
 // ARM Cortex-M4F

+ 2
- 0
Marlin/src/pins/pins.h View File

@@ -534,6 +534,8 @@
534 534
   #include "stm32f1/pins_MKS_ROBIN_E3D.h"       // STM32F1                                env:mks_robin_e3
535 535
 #elif MB(MKS_ROBIN_E3)
536 536
   #include "stm32f1/pins_MKS_ROBIN_E3.h"        // STM32F1                                env:mks_robin_e3
537
+#elif MB(CCROBOT_MEEB_3DP)
538
+  #include "stm32f1/pins_CCROBOT_MEEB_3DP.h"    // STM32F1                                env:STM32F103RC_cc_meeb_3dp
537 539
 
538 540
 //
539 541
 // ARM Cortex-M4F

+ 173
- 0
Marlin/src/pins/stm32f1/pins_CCROBOT_MEEB_3DP.h View File

@@ -0,0 +1,173 @@
1
+/**
2
+ * Marlin 3D Printer Firmware
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+ * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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+ *
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+ * Based on Sprinter and grbl.
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+ * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
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+ *
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+ * This program is free software: you can redistribute it and/or modify
9
+ * it under the terms of the GNU General Public License as published by
10
+ * the Free Software Foundation, either version 3 of the License, or
11
+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
14
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
19
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20
+ *
21
+ */
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+#pragma once
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+
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+#ifndef TARGET_STM32F1
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+  #error "Oops! Select an STM32F1 board in 'Tools > Board.'"
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+#elif HOTENDS > 1 || E_STEPPERS > 1
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+  #error "CCROBOT-ONLINE MEEB_3DP only supports 1 hotend / E-stepper. Comment out this line to continue."
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+#endif
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+
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+// https://github.com/ccrobot-online/MEEB_3DP
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+// Pin assignments for 32-bit MEEB_3DP
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+#define BOARD_INFO_NAME "CCROBOT-ONLINE MEEB_3DP"
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+#define DEFAULT_MACHINE_NAME "STM32F103RCT6"
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+#define BOARD_WEBSITE_URL "ccrobot-online.com"
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+
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+//
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+// Release PB4 from JTAG NRST role
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+//
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+#define DISABLE_JTAG
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+
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+//
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+// EEPROM
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+//
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+#if EITHER(NO_EEPROM_SELECTED, FLASH_EEPROM_EMULATION)
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+  #define FLASH_EEPROM_EMULATION
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+  #define EEPROM_PAGE_SIZE     0x800U             // 2KB
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+  #define EEPROM_START_ADDRESS (0x8000000UL + (STM32_FLASH_SIZE) * 1024UL - (EEPROM_PAGE_SIZE) * 2UL)
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+  #define MARLIN_EEPROM_SIZE   0x1000             // 4KB
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+#endif
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+
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+//
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+// Servos
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+//
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+#define SERVO0_PIN                          PA1
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+
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+//
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+// Limit Switches
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+//
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+#define X_STOP_PIN                          PC0
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+#define Y_STOP_PIN                          PC1
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+#define Z_STOP_PIN                          PC2
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+
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+//
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+// Z Probe must be this pin
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+//
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+#define Z_MIN_PROBE_PIN                     PC15  // "PROBE"
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+
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+//
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+// TMC2208 stepper drivers
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+//
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+#define X_ENABLE_PIN                        PB4
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+#define X_STEP_PIN                          PC12
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+#define X_DIR_PIN                           PC11
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+
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+#define Y_ENABLE_PIN                        PC10
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+#define Y_STEP_PIN                          PB14
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+#define Y_DIR_PIN                           PB13
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+
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+#define Z_ENABLE_PIN                        PB12
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+#define Z_STEP_PIN                          PB2
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+#define Z_DIR_PIN                           PB1
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+
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+#define E0_ENABLE_PIN                       PB0
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+#define E0_STEP_PIN                         PA6
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+#define E0_DIR_PIN                          PA5
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+
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+// Stepper drivers Serial UART
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+#define X_SERIAL_TX_PIN                     PB3
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+#define X_SERIAL_RX_PIN                     PD2
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+#define Y_SERIAL_TX_PIN                     PA15
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+#define Y_SERIAL_RX_PIN                     PC6
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+#define Z_SERIAL_TX_PIN                     PB11
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+#define Z_SERIAL_RX_PIN                     PB10
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+#define E0_SERIAL_TX_PIN                    PC5
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+#define E0_SERIAL_RX_PIN                    PC4
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+
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+// Reduce baud rate to improve software serial reliability
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+#define TMC_BAUD_RATE 19200
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+
100
+//
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+// Temperature Sensors
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+//
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+#define TEMP_0_PIN                          PA0   // TH0
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+#define TEMP_BED_PIN                        PC3   // THB
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+
106
+//
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+// Heaters / Fans
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+//
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+#define HEATER_0_PIN                        PC8   // HEATER0
110
+#define HEATER_BED_PIN                      PC9   // HOT BED
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+
112
+#define FAN_PIN                             PA7   // FAN  (fan2 on board) model cool fan
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+#define FAN1_PIN                            PA8   // FAN  (fan0 on board) e0 cool fan
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+#define FAN2_PIN                            PB9   // FAN  (fan1 on board) controller cool fan
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+
116
+// One neopixel onboard and a connector for other neopixels
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+#define NEOPIXEL_PIN                        PC7   // The NEOPIXEL LED driving pin
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+
119
+/**
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+ *     1 _____ 2
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+ *  PB5 | · · | PB6
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+ *  PA2 | · · | RESET
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+ *  PA3 | · · | PB8
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+ *  PB7 | · · | PA4
125
+ *  GND | · · | VCC5
126
+ *     9 ----- 10
127
+ *      LCD EXP
128
+ */
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+
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+//
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+// LCD / Controller
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+//
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+#if ENABLED(CR10_STOCKDISPLAY)
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+  #define BEEPER_PIN                        PB5
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+  #define BTN_EN1                           PA2
136
+  #define BTN_EN2                           PA3
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+  #define BTN_ENC                           PB6
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+
139
+  #define LCD_PINS_RS                       PB7   // CS -- SOFT SPI for ENDER3 LCD
140
+  #define LCD_PINS_D4                       PB8   // SCLK
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+  #define LCD_PINS_ENABLE                   PA4   // DATA MOSI
142
+#endif
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+
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+// Alter timing for graphical display
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+#if HAS_GRAPHICAL_LCD
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+  #define BOARD_ST7920_DELAY_1 DELAY_NS(125)
147
+  #define BOARD_ST7920_DELAY_2 DELAY_NS(125)
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+  #define BOARD_ST7920_DELAY_3 DELAY_NS(125)
149
+#endif
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+
151
+//
152
+// Camera
153
+//
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+#define CHDK_PIN                            PB15
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+
156
+#if 0
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+
158
+//
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+// SD-NAND
160
+//
161
+#if SD_CONNECTION_IS(ONBOARD)
162
+  #define ENABLE_SPI1
163
+  #define SD_DETECT_PIN                     -1
164
+  #define SCK_PIN                           PA5
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+  #define MISO_PIN                          PA6
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+  #define MOSI_PIN                          PA7
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+  #define SS_PIN                            PA4
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+#endif
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+
170
+#define ON_BOARD_SPI_DEVICE 1                     // SPI1
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+#define ONBOARD_SD_CS_PIN                   PA4   // Chip select for SD-NAND
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+
173
+#endif

+ 53
- 0
buildroot/share/PlatformIO/boards/MEEB_3DP.json View File

@@ -0,0 +1,53 @@
1
+{
2
+  "build": {
3
+    "core": "maple",
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+    "cpu": "cortex-m3",
5
+    "extra_flags": "-DSTM32F103xE -DSTM32F1",
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+    "f_cpu": "72000000L",
7
+    "hwids": [
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+      [
9
+        "0x1EAF",
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+        "0x0003"
11
+      ],
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+      [
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+        "0x1EAF",
14
+        "0x0004"
15
+      ]
16
+    ],
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+    "libopencm3": {
18
+      "ldscript": "stm32f103xc.ld"
19
+    },
20
+    "mcu": "stm32f103rct6",
21
+    "variant": "MEEB_3DP"
22
+  },
23
+  "debug": {
24
+    "jlink_device": "STM32F103RC",
25
+    "openocd_target": "stm32f1x",
26
+    "svd_path": "STM32F103xx.svd"
27
+  },
28
+  "frameworks": [
29
+    "arduino",
30
+    "cmsis",
31
+    "libopencm3",
32
+    "stm32cube"
33
+  ],
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+  "name": "3D Printer control board for MEEB with 512k flash/rs422 bus/tmc2208 drivers",
35
+  "upload": {
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+    "disable_flushing": false,
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+    "maximum_ram_size": 49152,
38
+    "maximum_size": 524288,
39
+    "protocol": "dfu",
40
+    "protocols": [
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+      "jlink",
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+      "stlink",
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+      "blackmagic",
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+      "serial",
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+      "dfu"
46
+    ],
47
+    "require_upload_port": true,
48
+    "use_1200bps_touch": false,
49
+    "wait_for_upload_port": false
50
+  },
51
+  "url": "https://github.com/ccrobot-online/MEEB_3DP",
52
+  "vendor": "CCROBOT-ONLINE"
53
+}

+ 14
- 0
buildroot/share/PlatformIO/ldscripts/STM32F103RC_MEEB_3DP.ld View File

@@ -0,0 +1,14 @@
1
+MEMORY
2
+{
3
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K - 40
4
+  rom (rx)  : ORIGIN = 0x08002000, LENGTH = 512K - 8K - 4K
5
+}
6
+
7
+/* Provide memory region aliases for common.inc */
8
+REGION_ALIAS("REGION_TEXT", rom);
9
+REGION_ALIAS("REGION_DATA", ram);
10
+REGION_ALIAS("REGION_BSS", ram);
11
+REGION_ALIAS("REGION_RODATA", rom);
12
+
13
+/* Let common.inc handle the real work. */
14
+INCLUDE common.inc

+ 61
- 0
buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py View File

@@ -0,0 +1,61 @@
1
+try:
2
+    import configparser
3
+except ImportError:
4
+    import ConfigParser as configparser
5
+
6
+import os
7
+Import("env", "projenv")
8
+# access to global build environment
9
+print(env)
10
+# access to project build environment (is used source files in "src" folder)
11
+print(projenv)
12
+
13
+config = configparser.ConfigParser()
14
+config.read("platformio.ini")
15
+
16
+#com_port = config.get("env:STM32F103RC_cc_meeb_3dp", "upload_port")
17
+#print('Use the {0:s} to reboot the board to dfu mode.'.format(com_port))
18
+
19
+#
20
+# Upload actions
21
+#
22
+
23
+def before_upload(source, target, env):
24
+    print("before_upload")
25
+    # do some actions
26
+    # use com_port
27
+    #
28
+    env.Execute("pwd")
29
+
30
+def after_upload(source, target, env):
31
+    print("after_upload")
32
+    # do some actions
33
+    #
34
+    #
35
+    env.Execute("pwd")
36
+
37
+print("Current build targets", map(str, BUILD_TARGETS))
38
+
39
+env.AddPreAction("upload", before_upload)
40
+env.AddPostAction("upload", after_upload)
41
+
42
+flash_size = 0
43
+vect_tab_addr = 0
44
+
45
+for define in env['CPPDEFINES']:
46
+    if define[0] == "VECT_TAB_ADDR":
47
+        vect_tab_addr = define[1]
48
+    if define[0] == "STM32_FLASH_SIZE":
49
+        flash_size = define[1]
50
+
51
+print('Use the {0:s} address as the marlin app entry point.'.format(vect_tab_addr))        
52
+print('Use the {0:d}KB flash version of stm32f103rct6 chip.'.format(flash_size))
53
+
54
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103RC_MEEB_3DP.ld")
55
+for i, flag in enumerate(env["LINKFLAGS"]):
56
+    if "-Wl,-T" in flag:
57
+        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
58
+    elif flag == "-T":
59
+        env["LINKFLAGS"][i + 1] = custom_ld_script
60
+        
61
+        

+ 34
- 0
buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP_create_variant.py View File

@@ -0,0 +1,34 @@
1
+import os,shutil
2
+from SCons.Script import DefaultEnvironment
3
+from platformio import util
4
+
5
+def copytree(src, dst, symlinks=False, ignore=None):
6
+    for item in os.listdir(src):
7
+        s = os.path.join(src, item)
8
+        d = os.path.join(dst, item)
9
+        if os.path.isdir(s):
10
+            shutil.copytree(s, d, symlinks, ignore)
11
+        else:
12
+            shutil.copy2(s, d)
13
+
14
+env = DefaultEnvironment()
15
+platform = env.PioPlatform()
16
+board = env.BoardConfig()
17
+
18
+FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32-maple")
19
+assert os.path.isdir(FRAMEWORK_DIR)
20
+assert os.path.isdir("buildroot/share/PlatformIO/variants")
21
+
22
+variant = board.get("build.variant")
23
+variant_dir = os.path.join(FRAMEWORK_DIR, "STM32F1", "variants", variant)
24
+
25
+source_dir = os.path.join("buildroot/share/PlatformIO/variants", variant)
26
+assert os.path.isdir(source_dir)
27
+
28
+if os.path.isdir(variant_dir):
29
+    shutil.rmtree(variant_dir)
30
+    
31
+if not os.path.isdir(variant_dir):
32
+    os.mkdir(variant_dir)
33
+
34
+copytree(source_dir, variant_dir)

+ 162
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/board.cpp View File

@@ -0,0 +1,162 @@
1
+/******************************************************************************
2
+ * The MIT License
3
+ *
4
+ * Copyright (c) 2011 LeafLabs, LLC.
5
+ *
6
+ * Permission is hereby granted, free of charge, to any person
7
+ * obtaining a copy of this software and associated documentation
8
+ * files (the "Software"), to deal in the Software without
9
+ * restriction, including without limitation the rights to use, copy,
10
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
11
+ * of the Software, and to permit persons to whom the Software is
12
+ * furnished to do so, subject to the following conditions:
13
+ *
14
+ * The above copyright notice and this permission notice shall be
15
+ * included in all copies or substantial portions of the Software.
16
+ *
17
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
21
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
22
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
23
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24
+ * SOFTWARE.
25
+ *****************************************************************************/
26
+
27
+/**
28
+ * @file   wirish/boards/maple/board.cpp
29
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
30
+ * @brief  Maple board file.
31
+ */
32
+
33
+#include <board/board.h>         // For this board's header file
34
+
35
+
36
+/* Roger Clark. Added next to includes for changes to Serial */
37
+#include <libmaple/usart.h>
38
+#include <HardwareSerial.h>
39
+
40
+#include <wirish_types.h> // For stm32_pin_info and its contents
41
+                                 // (these go into PIN_MAP).
42
+
43
+#include "boards_private.h"      // For PMAP_ROW(), which makes
44
+                                 // PIN_MAP easier to read.
45
+
46
+// boardInit(): nothing special to do for Maple.
47
+//
48
+// When defining your own board.cpp, you can put extra code in this
49
+// function if you have anything you want done on reset, before main()
50
+// or setup() are called.
51
+//
52
+// If there's nothing special you need done, feel free to leave this
53
+// function out, as we do here.
54
+
55
+void boardInit(void) {
56
+    // afio_remap(AFIO_REMAP_I2C1);
57
+}
58
+
59
+
60
+// Pin map: this lets the basic I/O functions (digitalWrite(),
61
+// analogRead(), pwmWrite()) translate from pin numbers to STM32
62
+// peripherals.
63
+//
64
+// PMAP_ROW() lets us specify a row (really a struct stm32_pin_info)
65
+// in the pin map. Its arguments are:
66
+//
67
+// - GPIO device for the pin (&gpioa, etc.)
68
+// - GPIO bit for the pin (0 through 15)
69
+// - Timer device, or NULL if none
70
+// - Timer channel (1 to 4, for PWM), or 0 if none
71
+// - ADC device, or NULL if none
72
+// - ADC channel, or ADCx if none
73
+
74
+extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
75
+/*
76
+    gpio_dev *gpio_device;      GPIO device 
77
+    timer_dev *timer_device;    Pin's timer device, if any.
78
+    const adc_dev *adc_device;  ADC device, if any. 
79
+    uint8 gpio_bit;             Pin's GPIO port bit. 
80
+    uint8 timer_channel;        Timer channel, or 0 if none. 
81
+    uint8 adc_channel;          Pin ADC channel, or ADCx if none. 
82
+*/
83
+
84
+    {&gpioa, &timer2, &adc1,  0, 1,    0}, /* PA0 */
85
+    {&gpioa, &timer2, &adc1,  1, 2,    1}, /* PA1 */
86
+	{&gpioa, &timer2, &adc1,  2, 3,    2}, /* PA2 */
87
+    {&gpioa, &timer2, &adc1,  3, 4,    3}, /* PA3 */
88
+	{&gpioa,   NULL, &adc1,  4, 0,    4}, /* PA4 */	
89
+    {&gpioa,   NULL, &adc1,  5, 0,    5}, /* PA5 */
90
+    {&gpioa, &timer3, &adc1,  6, 1,    6}, /* PA6 */
91
+    {&gpioa, &timer3, &adc1,  7, 2,    7}, /* PA7 */
92
+    {&gpioa, &timer1, NULL,  8, 1, ADCx}, /* PA8 */
93
+    {&gpioa, &timer1, NULL,  9, 2, ADCx}, /* PA9 */
94
+    {&gpioa, &timer1, NULL, 10, 3, ADCx}, /* PA10 */
95
+    {&gpioa,   NULL, NULL, 11, 0, ADCx}, /* PA11 */
96
+    {&gpioa,   NULL, NULL, 12, 0, ADCx}, /* PA12 */	
97
+    {&gpioa,   NULL, NULL, 13, 0, ADCx}, /* PA13 */
98
+    {&gpioa,   NULL, NULL, 14, 0, ADCx}, /* PA14 */
99
+    {&gpioa,   NULL, NULL, 15, 0, ADCx}, /* PA15 */
100
+	
101
+	{&gpiob, &timer3, &adc1,  0, 3,    8}, /* PB0 */
102
+	{&gpiob, &timer3, &adc1,  1, 4,    9}, /* PB1 */
103
+	{&gpiob,   NULL, NULL,  2, 0, ADCx}, /* PB2  */	
104
+	{&gpiob,   NULL, NULL,  3, 0, ADCx}, /* PB3  */
105
+    {&gpiob,   NULL, NULL,  4, 0, ADCx}, /* PB4  */
106
+    {&gpiob,   NULL, NULL,  5, 0, ADCx}, /* PB5 */
107
+    {&gpiob, &timer4, NULL,  6, 1, ADCx}, /* PB6 */
108
+    {&gpiob, &timer4, NULL,  7, 2, ADCx}, /* PB7 */
109
+    {&gpiob, &timer4, NULL,  8, 3, ADCx}, /* PB8 */
110
+	{&gpiob,   NULL, NULL,  9, 0, ADCx}, /* PB9 */
111
+    {&gpiob,   NULL, NULL, 10, 0, ADCx}, /* PB10 */
112
+    {&gpiob,   NULL, NULL, 11, 0, ADCx}, /* PB11 */
113
+    {&gpiob,   NULL, NULL, 12, 0, ADCx}, /* PB12 */
114
+    {&gpiob,   NULL, NULL, 13, 0, ADCx}, /* PB13 */
115
+    {&gpiob,   NULL, NULL, 14, 0, ADCx}, /* PB14 */
116
+    {&gpiob,   NULL, NULL, 15, 0, ADCx}, /* PB15 */
117
+
118
+
119
+    {&gpioc,   NULL, &adc1,  0, 0,   10}, /* PC0 */
120
+    {&gpioc,   NULL, &adc1,  1, 0,   11}, /* PC1 */
121
+    {&gpioc,   NULL, &adc1,  2, 0,   12}, /* PC2 */
122
+    {&gpioc,   NULL, &adc1,  3, 0,   13}, /* PC3 */
123
+    {&gpioc,   NULL, &adc1,  4, 0,   14}, /* PC4 */
124
+    {&gpioc,   NULL, &adc1,  5, 0,   15}, /* PC5 */
125
+    {&gpioc, &timer8, NULL,  6, 1, ADCx}, /* PC6 */	
126
+	{&gpioc, &timer8, NULL,  7, 2, ADCx}, /* PC7 */
127
+    {&gpioc, &timer8, NULL,  8, 3, ADCx}, /* PC8 */
128
+    {&gpioc, &timer8, NULL,  9, 4, ADCx}, /* PC9 */
129
+    {&gpioc,   NULL, NULL, 10, 0, ADCx}, /* PC10 UART4_TX/SDIO_D2 */
130
+    {&gpioc,   NULL, NULL, 11, 0, ADCx}, /* PC11 UART4_RX/SDIO_D3 */
131
+    {&gpioc,   NULL, NULL, 12, 0, ADCx}, /* PC12 UART5_TX/SDIO_CK */	
132
+    {&gpioc,   NULL, NULL, 13, 0, ADCx}, /* PC13 TAMPER-RTC */
133
+    {&gpioc,   NULL, NULL, 14, 0, ADCx}, /* PC14 OSC32_IN */
134
+    {&gpioc,   NULL, NULL, 15, 0, ADCx}, /* PC15 OSC32_OUT */
135
+
136
+	{&gpiod,   NULL, NULL,   0, 0, ADCx} , /* PD0 OSC_IN */
137
+	{&gpiod,   NULL, NULL,   1, 0, ADCx} , /* PD1  OSC_OUT */
138
+	{&gpiod,   NULL, NULL,   2, 0, ADCx} , /* PD2  TIM3_ETR/UART5_RX SDIO_CMD */
139
+};
140
+
141
+/*  Basically everything that is defined as having a timer us PWM */
142
+extern const uint8 boardPWMPins[BOARD_NR_PWM_PINS] __FLASH__ = {
143
+    PA0,PA1,PA2,PA3,PA6,PA7,PA8,PA9,PA10,PB0,PB1,PB6,PB7,PB8,PB9,PC6,PC7,PC8,PC9
144
+};
145
+
146
+/*  Basically everything that is defined having ADC */
147
+extern const uint8 boardADCPins[BOARD_NR_ADC_PINS] __FLASH__ = {
148
+    PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PB0,PB1,PC0,PC1,PC2,PC3,PC4,PC5
149
+};
150
+
151
+/* not sure what this us used for */
152
+extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = {
153
+    BOARD_JTMS_SWDIO_PIN,
154
+    BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN
155
+};
156
+
157
+DEFINE_HWSERIAL(Serial1, 1);
158
+DEFINE_HWSERIAL(Serial2, 2);
159
+DEFINE_HWSERIAL(Serial3, 3);
160
+DEFINE_HWSERIAL_UART(Serial4, 4);
161
+DEFINE_HWSERIAL_UART(Serial5, 5);
162
+

+ 125
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/board/board.h View File

@@ -0,0 +1,125 @@
1
+/******************************************************************************
2
+ * The MIT License
3
+ *
4
+ * Copyright (c) 2011 LeafLabs, LLC.
5
+ *
6
+ * Permission is hereby granted, free of charge, to any person
7
+ * obtaining a copy of this software and associated documentation
8
+ * files (the "Software"), to deal in the Software without
9
+ * restriction, including without limitation the rights to use, copy,
10
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
11
+ * of the Software, and to permit persons to whom the Software is
12
+ * furnished to do so, subject to the following conditions:
13
+ *
14
+ * The above copyright notice and this permission notice shall be
15
+ * included in all copies or substantial portions of the Software.
16
+ *
17
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
21
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
22
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
23
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24
+ * SOFTWARE.
25
+ *****************************************************************************/
26
+
27
+/**
28
+ * @file   maple_RET6.h
29
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
30
+ * @brief  Private include file for Maple RET6 Edition in boards.h
31
+ *
32
+ * See maple.h for more information on these definitions.
33
+ */
34
+
35
+#ifndef _BOARDS_GENERIC_STM32F103R_H_
36
+#define _BOARDS_GENERIC_STM32F103R_H_
37
+
38
+/* A few of these values will seem strange given that it's a
39
+ * high-density board. */
40
+
41
+#define CYCLES_PER_MICROSECOND  72
42
+#define SYSTICK_RELOAD_VAL     (F_CPU/1000) - 1 /* takes a cycle to reload */
43
+
44
+// USARTS
45
+#define BOARD_NR_USARTS         5
46
+#define BOARD_USART1_TX_PIN     PA9
47
+#define BOARD_USART1_RX_PIN     PA10
48
+
49
+#define BOARD_USART2_TX_PIN     PA2
50
+#define BOARD_USART2_RX_PIN     PA3
51
+
52
+#define BOARD_USART3_TX_PIN     PB10
53
+#define BOARD_USART3_RX_PIN     PB11
54
+
55
+#define BOARD_USART4_TX_PIN     PC10
56
+#define BOARD_USART4_RX_PIN     PC11
57
+
58
+#define BOARD_USART5_TX_PIN     PC12
59
+#define BOARD_USART5_RX_PIN     PD2
60
+
61
+/* Note:
62
+ *
63
+ * SPI3 is unusable due to pin 43 (PB4) and NRST tie-together :(, but
64
+ * leave the definitions so as not to clutter things up.  This is only
65
+ * OK since RET6 Ed. is specifically advertised as a beta board. */
66
+#define BOARD_NR_SPI            3
67
+#define BOARD_SPI1_NSS_PIN      PA4
68
+#define BOARD_SPI1_SCK_PIN      PA5
69
+#define BOARD_SPI1_MISO_PIN     PA6
70
+#define BOARD_SPI1_MOSI_PIN     PA7
71
+
72
+
73
+
74
+#define BOARD_SPI2_NSS_PIN      PB12
75
+#define BOARD_SPI2_SCK_PIN      PB13
76
+#define BOARD_SPI2_MISO_PIN     PB14
77
+#define BOARD_SPI2_MOSI_PIN     PB15
78
+
79
+
80
+#define BOARD_SPI3_NSS_PIN      PA15
81
+#define BOARD_SPI3_SCK_PIN      PB3
82
+#define BOARD_SPI3_MISO_PIN     PB4
83
+#define BOARD_SPI3_MOSI_PIN     PB5
84
+
85
+
86
+/* GPIO A to E = 5 * 16  - BOOT1 not used = 79*/
87
+#define BOARD_NR_GPIO_PINS      51
88
+/* Note: NOT 19. The missing one is D38 a.k.a. BOARD_BUTTON_PIN, which
89
+ * isn't broken out to a header and is thus unusable for PWM. */
90
+#define BOARD_NR_PWM_PINS       19
91
+#define BOARD_NR_ADC_PINS       16
92
+#define BOARD_NR_USED_PINS      7
93
+
94
+#define BOARD_JTMS_SWDIO_PIN    39
95
+#define BOARD_JTCK_SWCLK_PIN    40
96
+#define BOARD_JTDI_PIN          41
97
+#define BOARD_JTDO_PIN          42
98
+#define BOARD_NJTRST_PIN        43
99
+
100
+/* USB configuration.  BOARD_USB_DISC_DEV is the GPIO port containing
101
+ * the USB_DISC pin, and BOARD_USB_DISC_BIT is that pin's bit. */
102
+#define BOARD_USB_DISC_DEV      GPIOC
103
+#define BOARD_USB_DISC_BIT      12
104
+
105
+/*
106
+ * SDIO Pins
107
+ */
108
+#define BOARD_SDIO_D0 			PC8
109
+#define BOARD_SDIO_D1 			PC9
110
+#define BOARD_SDIO_D2 			PC10
111
+#define BOARD_SDIO_D3 			PC11
112
+#define BOARD_SDIO_CLK 			PC12
113
+#define BOARD_SDIO_CMD 			PD2
114
+
115
+/* Pin aliases: these give the GPIO port/bit for each pin as an
116
+ * enum. These are optional, but recommended. They make it easier to
117
+ * write code using low-level GPIO functionality. */
118
+enum {
119
+PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PA8,PA9,PA10,PA11,PA12,PA13,PA14,PA15,
120
+PB0,PB1,PB2,PB3,PB4,PB5,PB6,PB7,PB8,PB9,PB10,PB11,PB12,PB13,PB14,PB15,
121
+PC0,PC1,PC2,PC3,PC4,PC5,PC6,PC7,PC8,PC9,PC10,PC11,PC12,PC13,PC14,PC15,
122
+PD0,PD1,PD2
123
+};/* Note PB2 is skipped as this is Boot1 and is not going to be much use as its likely to be pulled permanently low */
124
+
125
+#endif

+ 18
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/bootloader.ld View File

@@ -0,0 +1,18 @@
1
+/*
2
+ * Linker script for Generic STM32F103RE boards, using the generic bootloader (which takes the lower 8k of memory)
3
+ */
4
+MEMORY
5
+{
6
+	ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
7
+	rom (rx) : ORIGIN = 0x08002000, LENGTH = 504K
8
+}
9
+
10
+
11
+/* Provide memory region aliases for common.inc */
12
+REGION_ALIAS("REGION_TEXT", rom);
13
+REGION_ALIAS("REGION_DATA", ram);
14
+REGION_ALIAS("REGION_BSS", ram);
15
+REGION_ALIAS("REGION_RODATA", rom);
16
+
17
+/* Let common.inc handle the real work. */
18
+INCLUDE common.inc

+ 220
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/common.inc View File

@@ -0,0 +1,220 @@
1
+/*
2
+ * Linker script for libmaple.
3
+ *
4
+ * Original author "lanchon" from ST forums, with modifications by LeafLabs.
5
+ */
6
+
7
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
8
+
9
+/*
10
+ * Configure other libraries we want in the link.
11
+ *
12
+ * libgcc, libc, and libm are common across supported toolchains.
13
+ * However, some toolchains require additional archives which aren't
14
+ * present everywhere (e.g. ARM's gcc-arm-embedded releases).
15
+ *
16
+ * To hack around this, we let the build system specify additional
17
+ * archives by putting the right extra_libs.inc (in a directory under
18
+ * toolchains/) in our search path.
19
+ */
20
+GROUP(libgcc.a libc.a libm.a)
21
+INCLUDE extra_libs.inc
22
+
23
+/*
24
+ * These force the linker to search for vector table symbols.
25
+ *
26
+ * These symbols vary by STM32 family (and also within families).
27
+ * It's up to the build system to configure the link's search path
28
+ * properly for the target MCU.
29
+ */
30
+INCLUDE vector_symbols.inc
31
+
32
+/* STM32 vector table. */
33
+EXTERN(__stm32_vector_table)
34
+
35
+/* C runtime initialization function. */
36
+EXTERN(start_c)
37
+
38
+/* main entry point */
39
+EXTERN(main)
40
+
41
+/* Initial stack pointer value. */
42
+EXTERN(__msp_init)
43
+PROVIDE(__msp_init = ORIGIN(ram) + LENGTH(ram));
44
+
45
+/* Reset vector and chip reset entry point */
46
+EXTERN(__start__)
47
+ENTRY(__start__)
48
+PROVIDE(__exc_reset = __start__);
49
+
50
+/* Heap boundaries, for libmaple */
51
+EXTERN(_lm_heap_start);
52
+EXTERN(_lm_heap_end);
53
+
54
+SECTIONS
55
+{
56
+    .text :
57
+      {
58
+        __text_start__ = .;
59
+        /*
60
+         * STM32 vector table.  Leave this here.  Yes, really.
61
+         */
62
+        *(.stm32.interrupt_vector)
63
+
64
+        /*
65
+         * Program code and vague linking
66
+         */
67
+        *(.text .text.* .gnu.linkonce.t.*)
68
+        *(.plt)
69
+        *(.gnu.warning)
70
+        *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
71
+
72
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
73
+        *(.gcc_except_table)
74
+        *(.eh_frame_hdr)
75
+        *(.eh_frame)
76
+
77
+        . = ALIGN(4);
78
+        KEEP(*(.init))
79
+
80
+        . = ALIGN(4);
81
+        __preinit_array_start = .;
82
+        KEEP (*(.preinit_array))
83
+        __preinit_array_end = .;
84
+
85
+        . = ALIGN(4);
86
+        __init_array_start = .;
87
+        KEEP (*(SORT(.init_array.*)))
88
+        KEEP (*(.init_array))
89
+        __init_array_end = .;
90
+
91
+        . = ALIGN(0x4);
92
+        KEEP (*crtbegin.o(.ctors))
93
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
94
+        KEEP (*(SORT(.ctors.*)))
95
+        KEEP (*crtend.o(.ctors))
96
+
97
+        . = ALIGN(4);
98
+        KEEP(*(.fini))
99
+
100
+        . = ALIGN(4);
101
+        __fini_array_start = .;
102
+        KEEP (*(.fini_array))
103
+        KEEP (*(SORT(.fini_array.*)))
104
+        __fini_array_end = .;
105
+
106
+        KEEP (*crtbegin.o(.dtors))
107
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
108
+        KEEP (*(SORT(.dtors.*)))
109
+        KEEP (*crtend.o(.dtors))
110
+      } > REGION_TEXT
111
+
112
+    /*
113
+     * End of text
114
+     */
115
+    .text.align :
116
+      {
117
+        . = ALIGN(8);
118
+        __text_end__ = .;
119
+      } > REGION_TEXT
120
+
121
+    /*
122
+     * .ARM.exidx exception unwinding; mandated by ARM's C++ ABI
123
+     */
124
+    __exidx_start = .;
125
+    .ARM.exidx :
126
+      {
127
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
128
+      } > REGION_RODATA
129
+    __exidx_end = .;
130
+
131
+    /*
132
+     * .data
133
+     */
134
+    .data :
135
+      {
136
+        __data_start__ = .;
137
+      	LONG(0)
138
+        . = ALIGN(8);
139
+
140
+        *(.got.plt) *(.got)
141
+        *(.data .data.* .gnu.linkonce.d.*)
142
+
143
+        . = ALIGN(8);
144
+        __data_end__ = .;
145
+      } > REGION_DATA AT> REGION_RODATA
146
+
147
+    /*
148
+     * Read-only data
149
+     */
150
+    .rodata :
151
+      {
152
+        *(.rodata .rodata.* .gnu.linkonce.r.*)
153
+        /* .USER_FLASH: We allow users to allocate into Flash here */
154
+        *(.USER_FLASH)
155
+        /* ROM image configuration; for C startup */
156
+        . = ALIGN(4);
157
+        _lm_rom_img_cfgp = .;
158
+        LONG(LOADADDR(.data));
159
+        /*
160
+         * Heap: Linker scripts may choose a custom heap by overriding
161
+         * _lm_heap_start and _lm_heap_end. Otherwise, the heap is in
162
+         * internal SRAM, beginning after .bss, and growing towards
163
+         * the stack.
164
+         *
165
+         * I'm shoving these here naively; there's probably a cleaner way
166
+         * to go about this. [mbolivar]
167
+         */
168
+        _lm_heap_start = DEFINED(_lm_heap_start) ? _lm_heap_start : _end;
169
+        _lm_heap_end   = DEFINED(_lm_heap_end) ? _lm_heap_end : __msp_init;
170
+      } > REGION_RODATA
171
+
172
+    /*
173
+     * .bss
174
+     */
175
+    .bss :
176
+      {
177
+        . = ALIGN(8);
178
+        __bss_start__ = .;
179
+        *(.bss .bss.* .gnu.linkonce.b.*)
180
+        *(COMMON)
181
+        . = ALIGN (8);
182
+        __bss_end__ = .;
183
+        _end = __bss_end__;
184
+      } > REGION_BSS
185
+
186
+    /*
187
+     * Debugging sections
188
+     */
189
+    .stab 0 (NOLOAD) : { *(.stab) }
190
+    .stabstr 0 (NOLOAD) : { *(.stabstr) }
191
+    /* DWARF debug sections.
192
+     * Symbols in the DWARF debugging sections are relative to the beginning
193
+     * of the section so we begin them at 0.  */
194
+    /* DWARF 1 */
195
+    .debug          0 : { *(.debug) }
196
+    .line           0 : { *(.line) }
197
+    /* GNU DWARF 1 extensions */
198
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
199
+    .debug_sfnames  0 : { *(.debug_sfnames) }
200
+    /* DWARF 1.1 and DWARF 2 */
201
+    .debug_aranges  0 : { *(.debug_aranges) }
202
+    .debug_pubnames 0 : { *(.debug_pubnames) }
203
+    /* DWARF 2 */
204
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
205
+    .debug_abbrev   0 : { *(.debug_abbrev) }
206
+    .debug_line     0 : { *(.debug_line) }
207
+    .debug_frame    0 : { *(.debug_frame) }
208
+    .debug_str      0 : { *(.debug_str) }
209
+    .debug_loc      0 : { *(.debug_loc) }
210
+    .debug_macinfo  0 : { *(.debug_macinfo) }
211
+    /* SGI/MIPS DWARF 2 extensions */
212
+    .debug_weaknames 0 : { *(.debug_weaknames) }
213
+    .debug_funcnames 0 : { *(.debug_funcnames) }
214
+    .debug_typenames 0 : { *(.debug_typenames) }
215
+    .debug_varnames  0 : { *(.debug_varnames) }
216
+
217
+    .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
218
+    .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
219
+    /DISCARD/ : { *(.note.GNU-stack) }
220
+}

+ 7
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/extra_libs.inc View File

@@ -0,0 +1,7 @@
1
+/*
2
+ * Extra archives needed by ARM's GCC ARM Embedded arm-none-eabi-
3
+ * releases (https://launchpad.net/gcc-arm-embedded/).
4
+ */
5
+
6
+/* This is for the provided newlib. */
7
+GROUP(libnosys.a)

+ 26
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/flash.ld View File

@@ -0,0 +1,26 @@
1
+/*
2
+ * libmaple linker script for "Flash" builds.
3
+ *
4
+ * A Flash build puts .text (and .rodata) in Flash, and
5
+ * .data/.bss/heap (of course) in SRAM, but offsets the sections by
6
+ * enough space to store the Maple bootloader, which lives in low
7
+ * Flash and uses low memory.
8
+ */
9
+
10
+/*
11
+ * This pulls in the appropriate MEMORY declaration from the right
12
+ * subdirectory of stm32/mem/ (the environment must call ld with the
13
+ * right include directory flags to make this happen). Boards can also
14
+ * use this file to use any of libmaple's memory-related hooks (like
15
+ * where the heap should live).
16
+ */
17
+INCLUDE mem-flash.inc
18
+
19
+/* Provide memory region aliases for common.inc */
20
+REGION_ALIAS("REGION_TEXT", rom);
21
+REGION_ALIAS("REGION_DATA", ram);
22
+REGION_ALIAS("REGION_BSS", ram);
23
+REGION_ALIAS("REGION_RODATA", rom);
24
+
25
+/* Let common.inc handle the real work. */
26
+INCLUDE common.inc

+ 31
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/jtag.ld View File

@@ -0,0 +1,31 @@
1
+/*
2
+ * libmaple linker script for "JTAG" builds.
3
+ *
4
+ * A "JTAG" build puts .text (and .rodata) in Flash, and
5
+ * .data/.bss/heap (of course) in SRAM, but links starting at the
6
+ * Flash and SRAM starting addresses (0x08000000 and 0x20000000
7
+ * respectively). This will wipe out a Maple bootloader if there's one
8
+ * on the board, so only use this if you know what you're doing.
9
+ *
10
+ * Of course, a "JTAG" build is perfectly usable for upload over SWD,
11
+ * the system memory bootloader, etc. The name is just a historical
12
+ * artifact.
13
+ */
14
+
15
+/*
16
+ * This pulls in the appropriate MEMORY declaration from the right
17
+ * subdirectory of stm32/mem/ (the environment must call ld with the
18
+ * right include directory flags to make this happen). Boards can also
19
+ * use this file to use any of libmaple's memory-related hooks (like
20
+ * where the heap should live).
21
+ */
22
+INCLUDE mem-jtag.inc
23
+
24
+/* Provide memory region aliases for common.inc */
25
+REGION_ALIAS("REGION_TEXT", rom);
26
+REGION_ALIAS("REGION_DATA", ram);
27
+REGION_ALIAS("REGION_BSS", ram);
28
+REGION_ALIAS("REGION_RODATA", rom);
29
+
30
+/* Let common.inc handle the real work. */
31
+INCLUDE common.inc

+ 5
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/mem-flash.inc View File

@@ -0,0 +1,5 @@
1
+MEMORY
2
+{
3
+  ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K
4
+  rom (rx)  : ORIGIN = 0x08005000, LENGTH = 492K
5
+}

+ 5
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/mem-jtag.inc View File

@@ -0,0 +1,5 @@
1
+MEMORY
2
+{
3
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
4
+  rom (rx)  : ORIGIN = 0x08000000, LENGTH = 512K
5
+}

+ 5
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/mem-ram.inc View File

@@ -0,0 +1,5 @@
1
+MEMORY
2
+{
3
+  ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K
4
+  rom (rx)  : ORIGIN = 0x08005000, LENGTH = 0K
5
+}

+ 25
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/ram.ld View File

@@ -0,0 +1,25 @@
1
+/*
2
+ * libmaple linker script for RAM builds.
3
+ *
4
+ * A Flash build puts .text, .rodata, and .data/.bss/heap (of course)
5
+ * in SRAM, but offsets the sections by enough space to store the
6
+ * Maple bootloader, which uses low memory.
7
+ */
8
+
9
+/*
10
+ * This pulls in the appropriate MEMORY declaration from the right
11
+ * subdirectory of stm32/mem/ (the environment must call ld with the
12
+ * right include directory flags to make this happen). Boards can also
13
+ * use this file to use any of libmaple's memory-related hooks (like
14
+ * where the heap should live).
15
+ */
16
+INCLUDE mem-ram.inc
17
+
18
+/* Provide memory region aliases for common.inc */
19
+REGION_ALIAS("REGION_TEXT", ram);
20
+REGION_ALIAS("REGION_DATA", ram);
21
+REGION_ALIAS("REGION_BSS", ram);
22
+REGION_ALIAS("REGION_RODATA", ram);
23
+
24
+/* Let common.inc handle the real work. */
25
+INCLUDE common.inc

+ 18
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103rb.ld View File

@@ -0,0 +1,18 @@
1
+/*
2
+ * Linker script for Generic STM32F103RB boards. 
3
+ */
4
+MEMORY
5
+{
6
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
7
+  rom (rx)  : ORIGIN = 0x08000000, LENGTH = 128K
8
+}
9
+
10
+
11
+/* Provide memory region aliases for common.inc */
12
+REGION_ALIAS("REGION_TEXT", rom);
13
+REGION_ALIAS("REGION_DATA", ram);
14
+REGION_ALIAS("REGION_BSS", ram);
15
+REGION_ALIAS("REGION_RODATA", rom);
16
+
17
+/* Let common.inc handle the real work. */
18
+INCLUDE common.inc

+ 17
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103rb_bootloader.ld View File

@@ -0,0 +1,17 @@
1
+/*
2
+ * Linker script for Generic STM32F103RB boards, using the generic bootloader (which takes the lower 8k of memory)
3
+ */
4
+MEMORY
5
+{
6
+	ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
7
+	rom (rx)  : ORIGIN = 0x08002000, LENGTH = 120K
8
+}
9
+
10
+/* Provide memory region aliases for common.inc */
11
+REGION_ALIAS("REGION_TEXT", rom);
12
+REGION_ALIAS("REGION_DATA", ram);
13
+REGION_ALIAS("REGION_BSS", ram);
14
+REGION_ALIAS("REGION_RODATA", rom);
15
+
16
+/* Let common.inc handle the real work. */
17
+INCLUDE common.inc

+ 18
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103rc.ld View File

@@ -0,0 +1,18 @@
1
+/*
2
+ * Linker script for Generic STM32F103RC boards. 
3
+ */
4
+MEMORY
5
+{
6
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K
7
+  rom (rx)  : ORIGIN = 0x08000000, LENGTH = 256K
8
+}
9
+
10
+
11
+/* Provide memory region aliases for common.inc */
12
+REGION_ALIAS("REGION_TEXT", rom);
13
+REGION_ALIAS("REGION_DATA", ram);
14
+REGION_ALIAS("REGION_BSS", ram);
15
+REGION_ALIAS("REGION_RODATA", rom);
16
+
17
+/* Let common.inc handle the real work. */
18
+INCLUDE common.inc

+ 18
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103rc_bootloader.ld View File

@@ -0,0 +1,18 @@
1
+/*
2
+ * Linker script for Generic STM32F103RC boards, using the generic bootloader (which takes the lower 8k of memory)
3
+ */
4
+
5
+MEMORY
6
+{
7
+	ram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K
8
+	rom (rx)  : ORIGIN = 0x08002000, LENGTH = 248K
9
+}
10
+
11
+/* Provide memory region aliases for common.inc */
12
+REGION_ALIAS("REGION_TEXT", rom);
13
+REGION_ALIAS("REGION_DATA", ram);
14
+REGION_ALIAS("REGION_BSS", ram);
15
+REGION_ALIAS("REGION_RODATA", rom);
16
+
17
+/* Let common.inc handle the real work. */
18
+INCLUDE common.inc

+ 18
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/stm32f103re.ld View File

@@ -0,0 +1,18 @@
1
+/*
2
+ * Linker script for Generic STM32F103RE boards. 
3
+ */
4
+MEMORY
5
+{
6
+  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
7
+  rom (rx)  : ORIGIN = 0x08000000, LENGTH = 512K
8
+}
9
+
10
+
11
+/* Provide memory region aliases for common.inc */
12
+REGION_ALIAS("REGION_TEXT", rom);
13
+REGION_ALIAS("REGION_DATA", ram);
14
+REGION_ALIAS("REGION_BSS", ram);
15
+REGION_ALIAS("REGION_RODATA", rom);
16
+
17
+/* Let common.inc handle the real work. */
18
+INCLUDE common.inc

+ 78
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/ld/vector_symbols.inc View File

@@ -0,0 +1,78 @@
1
+EXTERN(__msp_init)
2
+EXTERN(__exc_reset)
3
+EXTERN(__exc_nmi)
4
+EXTERN(__exc_hardfault)
5
+EXTERN(__exc_memmanage)
6
+EXTERN(__exc_busfault)
7
+EXTERN(__exc_usagefault)
8
+EXTERN(__stm32reservedexception7)
9
+EXTERN(__stm32reservedexception8)
10
+EXTERN(__stm32reservedexception9)
11
+EXTERN(__stm32reservedexception10)
12
+EXTERN(__exc_svc)
13
+EXTERN(__exc_debug_monitor)
14
+EXTERN(__stm32reservedexception13)
15
+EXTERN(__exc_pendsv)
16
+EXTERN(__exc_systick)
17
+
18
+EXTERN(__irq_wwdg)
19
+EXTERN(__irq_pvd)
20
+EXTERN(__irq_tamper)
21
+EXTERN(__irq_rtc)
22
+EXTERN(__irq_flash)
23
+EXTERN(__irq_rcc)
24
+EXTERN(__irq_exti0)
25
+EXTERN(__irq_exti1)
26
+EXTERN(__irq_exti2)
27
+EXTERN(__irq_exti3)
28
+EXTERN(__irq_exti4)
29
+EXTERN(__irq_dma1_channel1)
30
+EXTERN(__irq_dma1_channel2)
31
+EXTERN(__irq_dma1_channel3)
32
+EXTERN(__irq_dma1_channel4)
33
+EXTERN(__irq_dma1_channel5)
34
+EXTERN(__irq_dma1_channel6)
35
+EXTERN(__irq_dma1_channel7)
36
+EXTERN(__irq_adc)
37
+EXTERN(__irq_usb_hp_can_tx)
38
+EXTERN(__irq_usb_lp_can_rx0)
39
+EXTERN(__irq_can_rx1)
40
+EXTERN(__irq_can_sce)
41
+EXTERN(__irq_exti9_5)
42
+EXTERN(__irq_tim1_brk)
43
+EXTERN(__irq_tim1_up)
44
+EXTERN(__irq_tim1_trg_com)
45
+EXTERN(__irq_tim1_cc)
46
+EXTERN(__irq_tim2)
47
+EXTERN(__irq_tim3)
48
+EXTERN(__irq_tim4)
49
+EXTERN(__irq_i2c1_ev)
50
+EXTERN(__irq_i2c1_er)
51
+EXTERN(__irq_i2c2_ev)
52
+EXTERN(__irq_i2c2_er)
53
+EXTERN(__irq_spi1)
54
+EXTERN(__irq_spi2)
55
+EXTERN(__irq_usart1)
56
+EXTERN(__irq_usart2)
57
+EXTERN(__irq_usart3)
58
+EXTERN(__irq_exti15_10)
59
+EXTERN(__irq_rtcalarm)
60
+EXTERN(__irq_usbwakeup)
61
+
62
+EXTERN(__irq_tim8_brk)
63
+EXTERN(__irq_tim8_up)
64
+EXTERN(__irq_tim8_trg_com)
65
+EXTERN(__irq_tim8_cc)
66
+EXTERN(__irq_adc3)
67
+EXTERN(__irq_fsmc)
68
+EXTERN(__irq_sdio)
69
+EXTERN(__irq_tim5)
70
+EXTERN(__irq_spi3)
71
+EXTERN(__irq_uart4)
72
+EXTERN(__irq_uart5)
73
+EXTERN(__irq_tim6)
74
+EXTERN(__irq_tim7)
75
+EXTERN(__irq_dma2_channel1)
76
+EXTERN(__irq_dma2_channel2)
77
+EXTERN(__irq_dma2_channel3)
78
+EXTERN(__irq_dma2_channel4_5)

+ 2
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/pins_arduino.h View File

@@ -0,0 +1,2 @@
1
+// API compatibility
2
+#include "variant.h"

+ 20
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/variant.h View File

@@ -0,0 +1,20 @@
1
+#ifndef _VARIANT_ARDUINO_STM32_
2
+#define _VARIANT_ARDUINO_STM32_
3
+
4
+#define digitalPinToPort(P)        ( PIN_MAP[P].gpio_device )
5
+#define digitalPinToBitMask(P)     ( BIT(PIN_MAP[P].gpio_bit) )
6
+#define portOutputRegister(port)   ( &(port->regs->ODR) )
7
+#define portInputRegister(port)    ( &(port->regs->IDR) )
8
+
9
+#define portSetRegister(pin)		( &(PIN_MAP[pin].gpio_device->regs->BSRR) )
10
+#define portClearRegister(pin)		( &(PIN_MAP[pin].gpio_device->regs->BRR) )
11
+
12
+#define portConfigRegister(pin)		( &(PIN_MAP[pin].gpio_device->regs->CRL) )
13
+
14
+static const uint8_t SS   = BOARD_SPI1_NSS_PIN;
15
+static const uint8_t SS1  = BOARD_SPI2_NSS_PIN;
16
+static const uint8_t MOSI = BOARD_SPI1_MOSI_PIN;
17
+static const uint8_t MISO = BOARD_SPI1_MISO_PIN;
18
+static const uint8_t SCK  = BOARD_SPI1_SCK_PIN;
19
+
20
+#endif /* _VARIANT_ARDUINO_STM32_ */

+ 225
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/boards.cpp View File

@@ -0,0 +1,225 @@
1
+/******************************************************************************
2
+ * The MIT License
3
+ *
4
+ * Copyright (c) 2010 Perry Hung.
5
+ * Copyright (c) 2011, 2012 LeafLabs, LLC.
6
+ *
7
+ * Permission is hereby granted, free of charge, to any person
8
+ * obtaining a copy of this software and associated documentation
9
+ * files (the "Software"), to deal in the Software without
10
+ * restriction, including without limitation the rights to use, copy,
11
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
12
+ * of the Software, and to permit persons to whom the Software is
13
+ * furnished to do so, subject to the following conditions:
14
+ *
15
+ * The above copyright notice and this permission notice shall be
16
+ * included in all copies or substantial portions of the Software.
17
+ *
18
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
21
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
22
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
23
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
24
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25
+ * SOFTWARE.
26
+ *****************************************************************************/
27
+
28
+/**
29
+ * @file wirish/boards.cpp
30
+ * @brief init() and board routines.
31
+ *
32
+ * This file is mostly interesting for the init() function, which
33
+ * configures Flash, the core clocks, and a variety of other available
34
+ * peripherals on the board so the rest of Wirish doesn't have to turn
35
+ * things on before using them.
36
+ *
37
+ * Prior to returning, init() calls boardInit(), which allows boards
38
+ * to perform any initialization they need to. This file includes a
39
+ * weak no-op definition of boardInit(), so boards that don't need any
40
+ * special initialization don't have to define their own.
41
+ *
42
+ * How init() works is chip-specific. See the boards_setup.cpp files
43
+ * under e.g. wirish/stm32f1/, wirish/stmf32f2 for the details, but be
44
+ * advised: their contents are unstable, and can/will change without
45
+ * notice.
46
+ */
47
+
48
+#include <boards.h>
49
+#include <libmaple/libmaple_types.h>
50
+#include <libmaple/flash.h>
51
+#include <libmaple/nvic.h>
52
+#include <libmaple/systick.h>
53
+#include "boards_private.h"
54
+
55
+static void setup_flash(void);
56
+static void setup_clocks(void);
57
+static void setup_nvic(void);
58
+static void setup_adcs(void);
59
+static void setup_timers(void);
60
+
61
+/*
62
+ * Exported functions
63
+ */
64
+
65
+void init(void) {
66
+    setup_flash();
67
+    setup_clocks();
68
+    setup_nvic();
69
+    systick_init(SYSTICK_RELOAD_VAL);
70
+    wirish::priv::board_setup_gpio();
71
+    setup_adcs();
72
+    setup_timers();
73
+    wirish::priv::board_setup_usb();
74
+    wirish::priv::series_init();
75
+    boardInit();
76
+}
77
+
78
+/* Provide a default no-op boardInit(). */
79
+__weak void boardInit(void) {
80
+}
81
+
82
+/* You could farm this out to the files in boards/ if e.g. it takes
83
+ * too long to test on boards with lots of pins. */
84
+bool boardUsesPin(uint8 pin) {
85
+    for (int i = 0; i < BOARD_NR_USED_PINS; i++) {
86
+        if (pin == boardUsedPins[i]) {
87
+            return true;
88
+        }
89
+    }
90
+    return false;
91
+}
92
+
93
+/*
94
+ * Auxiliary routines
95
+ */
96
+
97
+static void setup_flash(void) {
98
+    // Turn on as many Flash "go faster" features as
99
+    // possible. flash_enable_features() just ignores any flags it
100
+    // can't support.
101
+    flash_enable_features(FLASH_PREFETCH | FLASH_ICACHE | FLASH_DCACHE);
102
+    // Configure the wait states, assuming we're operating at "close
103
+    // enough" to 3.3V.
104
+    flash_set_latency(FLASH_SAFE_WAIT_STATES);
105
+}
106
+
107
+static void setup_clocks(void) {
108
+    // Turn on HSI. We'll switch to and run off of this while we're
109
+    // setting up the main PLL.
110
+    rcc_turn_on_clk(RCC_CLK_HSI);
111
+
112
+    // Turn off and reset the clock subsystems we'll be using, as well
113
+    // as the clock security subsystem (CSS). Note that resetting CFGR
114
+    // to its default value of 0 implies a switch to HSI for SYSCLK.
115
+    RCC_BASE->CFGR = 0x00000000;
116
+    rcc_disable_css();
117
+    rcc_turn_off_clk(RCC_CLK_PLL);
118
+    rcc_turn_off_clk(RCC_CLK_HSE);
119
+    wirish::priv::board_reset_pll();
120
+    // Clear clock readiness interrupt flags and turn off clock
121
+    // readiness interrupts.
122
+    RCC_BASE->CIR = 0x00000000;
123
+#if !USE_HSI_CLOCK
124
+    // Enable HSE, and wait until it's ready.
125
+    rcc_turn_on_clk(RCC_CLK_HSE);
126
+    while (!rcc_is_clk_ready(RCC_CLK_HSE))
127
+        ;
128
+#endif
129
+    // Configure AHBx, APBx, etc. prescalers and the main PLL.
130
+    wirish::priv::board_setup_clock_prescalers();
131
+    rcc_configure_pll(&wirish::priv::w_board_pll_cfg);
132
+
133
+    // Enable the PLL, and wait until it's ready.
134
+    rcc_turn_on_clk(RCC_CLK_PLL);
135
+    while(!rcc_is_clk_ready(RCC_CLK_PLL))
136
+        ;
137
+
138
+    // Finally, switch to the now-ready PLL as the main clock source.
139
+    rcc_switch_sysclk(RCC_CLKSRC_PLL);
140
+}
141
+
142
+/*
143
+ * These addresses are where usercode starts when a bootloader is
144
+ * present. If no bootloader is present, the user NVIC usually starts
145
+ * at the Flash base address, 0x08000000.
146
+ */
147
+#if defined(BOOTLOADER_maple)
148
+	#define USER_ADDR_ROM 0x08002000
149
+#else
150
+	#define USER_ADDR_ROM 0x08000000
151
+#endif
152
+#define USER_ADDR_RAM 0x20000C00
153
+extern char __text_start__;
154
+
155
+static void setup_nvic(void) {
156
+
157
+nvic_init((uint32)VECT_TAB_ADDR, 0);
158
+
159
+/* Roger Clark. We now control nvic vector table in boards.txt using the build.vect paramater
160
+#ifdef VECT_TAB_FLASH
161
+    nvic_init(USER_ADDR_ROM, 0);
162
+#elif defined VECT_TAB_RAM
163
+    nvic_init(USER_ADDR_RAM, 0);
164
+#elif defined VECT_TAB_BASE
165
+    nvic_init((uint32)0x08000000, 0);
166
+#elif defined VECT_TAB_ADDR
167
+    // A numerically supplied value
168
+    nvic_init((uint32)VECT_TAB_ADDR, 0);
169
+#else
170
+    // Use the __text_start__ value from the linker script; this
171
+    // should be the start of the vector table.
172
+    nvic_init((uint32)&__text_start__, 0);
173
+#endif
174
+
175
+*/
176
+}
177
+
178
+static void adc_default_config(adc_dev *dev) {
179
+    adc_enable_single_swstart(dev);
180
+    adc_set_sample_rate(dev, wirish::priv::w_adc_smp);
181
+}
182
+
183
+static void setup_adcs(void) {
184
+    adc_set_prescaler(wirish::priv::w_adc_pre);
185
+    adc_foreach(adc_default_config);
186
+}
187
+
188
+static void timer_default_config(timer_dev *dev) {
189
+    timer_adv_reg_map *regs = (dev->regs).adv;
190
+    const uint16 full_overflow = 0xFFFF;
191
+    const uint16 half_duty = 0x8FFF;
192
+
193
+    timer_init(dev);
194
+    timer_pause(dev);
195
+
196
+    regs->CR1 = TIMER_CR1_ARPE;
197
+    regs->PSC = 1;
198
+    regs->SR = 0;
199
+    regs->DIER = 0;
200
+    regs->EGR = TIMER_EGR_UG;
201
+    switch (dev->type) {
202
+    case TIMER_ADVANCED:
203
+        regs->BDTR = TIMER_BDTR_MOE | TIMER_BDTR_LOCK_OFF;
204
+        // fall-through
205
+    case TIMER_GENERAL:
206
+        timer_set_reload(dev, full_overflow);
207
+        for (uint8 channel = 1; channel <= 4; channel++) {
208
+            if (timer_has_cc_channel(dev, channel)) {
209
+                timer_set_compare(dev, channel, half_duty);
210
+                timer_oc_set_mode(dev, channel, TIMER_OC_MODE_PWM_1,
211
+                                  TIMER_OC_PE);
212
+            }
213
+        }
214
+        // fall-through
215
+    case TIMER_BASIC:
216
+        break;
217
+    }
218
+
219
+    timer_generate_update(dev);
220
+    timer_resume(dev);
221
+}
222
+
223
+static void setup_timers(void) {
224
+    timer_foreach(timer_default_config);
225
+}

+ 106
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/boards_setup.cpp View File

@@ -0,0 +1,106 @@
1
+/******************************************************************************
2
+ * The MIT License
3
+ *
4
+ * Copyright (c) 2012 LeafLabs, LLC.
5
+ *
6
+ * Permission is hereby granted, free of charge, to any person
7
+ * obtaining a copy of this software and associated documentation
8
+ * files (the "Software"), to deal in the Software without
9
+ * restriction, including without limitation the rights to use, copy,
10
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
11
+ * of the Software, and to permit persons to whom the Software is
12
+ * furnished to do so, subject to the following conditions:
13
+ *
14
+ * The above copyright notice and this permission notice shall be
15
+ * included in all copies or substantial portions of the Software.
16
+ *
17
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
21
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
22
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
23
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24
+ * SOFTWARE.
25
+*****************************************************************************/
26
+
27
+/**
28
+ * @file wirish/stm32f1/boards_setup.cpp
29
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
30
+ * @brief STM32F1 chip setup.
31
+ *
32
+ * This file controls how init() behaves on the STM32F1. Be very
33
+ * careful when changing anything here. Many of these values depend
34
+ * upon each other.
35
+ */
36
+
37
+#include "boards_private.h"
38
+
39
+#include <libmaple/gpio.h>
40
+#include <libmaple/timer.h>
41
+
42
+#include <boards.h>
43
+#include <usb_serial.h>
44
+
45
+// Allow boards to provide a PLL multiplier. This is useful for
46
+// e.g. STM32F100 value line MCUs, which use slower multipliers.
47
+// (We're leaving the default to RCC_PLLMUL_9 for now, since that
48
+// works for F103 performance line MCUs, which is all that LeafLabs
49
+// currently officially supports).
50
+
51
+namespace wirish {
52
+    namespace priv {
53
+
54
+        static stm32f1_rcc_pll_data pll_data = {RCC_PLLMUL_6};
55
+#if !USE_HSI_CLOCK
56
+        __weak rcc_pll_cfg w_board_pll_cfg = {RCC_PLLSRC_HSE, &pll_data};
57
+#else
58
+        __weak rcc_pll_cfg w_board_pll_cfg = {RCC_PLLSRC_HSI_DIV_2, &pll_data};
59
+#endif
60
+        __weak adc_prescaler w_adc_pre = ADC_PRE_PCLK2_DIV_6;
61
+        __weak adc_smp_rate w_adc_smp = ADC_SMPR_55_5;
62
+
63
+        __weak void board_reset_pll(void) {
64
+            // TODO
65
+        }
66
+
67
+        __weak void board_setup_clock_prescalers(void) {
68
+            rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1);
69
+            rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2);
70
+            rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1);
71
+			rcc_clk_disable(RCC_USB);
72
+			#if F_CPU == 72000000
73
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1_5);
74
+			#elif F_CPU == 48000000
75
+			rcc_set_prescaler(RCC_PRESCALER_USB, RCC_USB_SYSCLK_DIV_1);			
76
+			#endif	
77
+        }
78
+
79
+        __weak void board_setup_gpio(void) {
80
+            gpio_init_all();
81
+        }
82
+
83
+        __weak void board_setup_usb(void) {
84
+#ifdef SERIAL_USB 
85
+			
86
+#ifdef GENERIC_BOOTLOADER			
87
+			//Reset the USB interface on generic boards - developed by Victor PV
88
+			gpio_set_mode(PIN_MAP[PA12].gpio_device, PIN_MAP[PA12].gpio_bit, GPIO_OUTPUT_PP);
89
+			gpio_write_bit(PIN_MAP[PA12].gpio_device, PIN_MAP[PA12].gpio_bit,0);
90
+			
91
+			for(volatile unsigned int i=0;i<512;i++);// Only small delay seems to be needed, and USB pins will get configured in Serial.begin
92
+			gpio_set_mode(PIN_MAP[PA12].gpio_device, PIN_MAP[PA12].gpio_bit, GPIO_INPUT_FLOATING);
93
+#endif	
94
+
95
+			Serial.begin();// Roger Clark. Changed SerialUSB to Serial for Arduino sketch compatibility
96
+#endif
97
+        }
98
+
99
+        __weak void series_init(void) {
100
+            // Initialize AFIO here, too, so peripheral remaps and external
101
+            // interrupts work out of the box.
102
+            afio_init();
103
+        }
104
+
105
+    }
106
+}

+ 57
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/start.S View File

@@ -0,0 +1,57 @@
1
+/******************************************************************************
2
+ * The MIT License
3
+ *
4
+ * Copyright (c) 2011 LeafLabs, LLC.
5
+ *
6
+ * Permission is hereby granted, free of charge, to any person
7
+ * obtaining a copy of this software and associated documentation
8
+ * files (the "Software"), to deal in the Software without
9
+ * restriction, including without limitation the rights to use, copy,
10
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
11
+ * of the Software, and to permit persons to whom the Software is
12
+ * furnished to do so, subject to the following conditions:
13
+ *
14
+ * The above copyright notice and this permission notice shall be
15
+ * included in all copies or substantial portions of the Software.
16
+ *
17
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
21
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
22
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
23
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24
+ * SOFTWARE.
25
+ *****************************************************************************/
26
+
27
+/*
28
+ * This file is a modified version of a file obtained from
29
+ * CodeSourcery Inc. (now part of Mentor Graphics Corp.), in which the
30
+ * following text appeared:
31
+ *
32
+ * The authors hereby grant permission to use, copy, modify, distribute,
33
+ * and license this software and its documentation for any purpose, provided
34
+ * that existing copyright notices are retained in all copies and that this
35
+ * notice is included verbatim in any distributions. No written agreement,
36
+ * license, or royalty fee is required for any of the authorized uses.
37
+ * Modifications to this software may be copyrighted by their authors
38
+ * and need not follow the licensing terms described here, provided that
39
+ * the new terms are clearly indicated on the first page of each file where
40
+ * they apply.
41
+ */
42
+
43
+        .text
44
+        .code 16
45
+        .thumb_func
46
+
47
+        .globl __start__
48
+        .type __start__, %function
49
+__start__:
50
+        .fnstart
51
+        ldr r1,=__msp_init
52
+        mov sp,r1
53
+        ldr r1,=start_c
54
+        bx r1
55
+        .pool
56
+        .cantunwind
57
+        .fnend

+ 95
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/start_c.c View File

@@ -0,0 +1,95 @@
1
+/******************************************************************************
2
+ * The MIT License
3
+ *
4
+ * Copyright (c) 2011 LeafLabs, LLC.
5
+ *
6
+ * Permission is hereby granted, free of charge, to any person
7
+ * obtaining a copy of this software and associated documentation
8
+ * files (the "Software"), to deal in the Software without
9
+ * restriction, including without limitation the rights to use, copy,
10
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
11
+ * of the Software, and to permit persons to whom the Software is
12
+ * furnished to do so, subject to the following conditions:
13
+ *
14
+ * The above copyright notice and this permission notice shall be
15
+ * included in all copies or substantial portions of the Software.
16
+ *
17
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
21
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
22
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
23
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24
+ * SOFTWARE.
25
+ *****************************************************************************/
26
+
27
+/*
28
+ * This file is a modified version of a file obtained from
29
+ * CodeSourcery Inc. (now part of Mentor Graphics Corp.), in which the
30
+ * following text appeared:
31
+ *
32
+ * Copyright (c) 2006, 2007 CodeSourcery Inc
33
+ *
34
+ * The authors hereby grant permission to use, copy, modify, distribute,
35
+ * and license this software and its documentation for any purpose, provided
36
+ * that existing copyright notices are retained in all copies and that this
37
+ * notice is included verbatim in any distributions. No written agreement,
38
+ * license, or royalty fee is required for any of the authorized uses.
39
+ * Modifications to this software may be copyrighted by their authors
40
+ * and need not follow the licensing terms described here, provided that
41
+ * the new terms are clearly indicated on the first page of each file where
42
+ * they apply.
43
+ */
44
+
45
+#include <stddef.h>
46
+
47
+extern void __libc_init_array(void);
48
+
49
+extern int main(int, char**, char**);
50
+
51
+extern void exit(int) __attribute__((noreturn, weak));
52
+
53
+/* The linker must ensure that these are at least 4-byte aligned. */
54
+extern char __data_start__, __data_end__;
55
+extern char __bss_start__, __bss_end__;
56
+
57
+struct rom_img_cfg {
58
+    int *img_start;
59
+};
60
+
61
+extern char _lm_rom_img_cfgp;
62
+
63
+void __attribute__((noreturn)) start_c(void) {
64
+    struct rom_img_cfg *img_cfg = (struct rom_img_cfg*)&_lm_rom_img_cfgp;
65
+    int *src = img_cfg->img_start;
66
+    int *dst = (int*)&__data_start__;
67
+    int exit_code;
68
+
69
+    /* Initialize .data, if necessary. */
70
+    if (src != dst) {
71
+        int *end = (int*)&__data_end__;
72
+        while (dst < end) {
73
+            *dst++ = *src++;
74
+        }
75
+    }
76
+
77
+    /* Zero .bss. */
78
+    dst = (int*)&__bss_start__;
79
+    while (dst < (int*)&__bss_end__) {
80
+        *dst++ = 0;
81
+    }
82
+
83
+    /* Run initializers. */
84
+    __libc_init_array();
85
+
86
+    /* Jump to main. */
87
+    exit_code = main(0, 0, 0);
88
+    if (exit) {
89
+        exit(exit_code);
90
+    }
91
+
92
+    /* If exit is NULL, make sure we don't return. */
93
+    for (;;)
94
+        continue;
95
+}

+ 176
- 0
buildroot/share/PlatformIO/variants/MEEB_3DP/wirish/syscalls.c View File

@@ -0,0 +1,176 @@
1
+/******************************************************************************
2
+ * The MIT License
3
+ *
4
+ * Copyright (c) 2010 Perry Hung.
5
+ * Copyright (c) 2011, 2012 LeafLabs, LLC.
6
+ *
7
+ * Permission is hereby granted, free of charge, to any person
8
+ * obtaining a copy of this software and associated documentation
9
+ * files (the "Software"), to deal in the Software without
10
+ * restriction, including without limitation the rights to use, copy,
11
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
12
+ * of the Software, and to permit persons to whom the Software is
13
+ * furnished to do so, subject to the following conditions:
14
+ *
15
+ * The above copyright notice and this permission notice shall be
16
+ * included in all copies or substantial portions of the Software.
17
+ *
18
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
21
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
22
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
23
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
24
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25
+ * SOFTWARE.
26
+ *****************************************************************************/
27
+
28
+/**
29
+ * @file wirish/syscalls.c
30
+ * @brief newlib stubs
31
+ *
32
+ * Low level system routines used by newlib for basic I/O and memory
33
+ * allocation. You can override most of these.
34
+ */
35
+
36
+#include <libmaple/libmaple.h>
37
+
38
+#include <sys/stat.h>
39
+#include <errno.h>
40
+#include <stddef.h>
41
+
42
+/* If CONFIG_HEAP_START (or CONFIG_HEAP_END) isn't defined, then
43
+ * assume _lm_heap_start (resp. _lm_heap_end) is appropriately set by
44
+ * the linker */
45
+#ifndef CONFIG_HEAP_START
46
+extern char _lm_heap_start;
47
+#define CONFIG_HEAP_START               ((void *)&_lm_heap_start)
48
+#endif
49
+#ifndef CONFIG_HEAP_END
50
+extern char _lm_heap_end;
51
+#define CONFIG_HEAP_END                 ((void *)&_lm_heap_end)
52
+#endif
53
+
54
+/*
55
+ * _sbrk -- Increment the program break.
56
+ *
57
+ * Get incr bytes more RAM (for use by the heap).  malloc() and
58
+ * friends call this function behind the scenes.
59
+ */
60
+void *_sbrk(int incr) {
61
+    static void * pbreak = NULL; /* current program break */
62
+    void * ret;
63
+
64
+    if (pbreak == NULL) {
65
+        pbreak = CONFIG_HEAP_START;
66
+    }
67
+
68
+    if ((CONFIG_HEAP_END - pbreak < incr) ||
69
+        (pbreak - CONFIG_HEAP_START < -incr)) {
70
+        errno = ENOMEM;
71
+        return (void *)-1;
72
+    }
73
+
74
+    ret = pbreak;
75
+    pbreak += incr;
76
+    return ret;
77
+}
78
+
79
+__weak int _open(const char *path, int flags, ...) {
80
+    return 1;
81
+}
82
+
83
+__weak int _close(int fd) {
84
+    return 0;
85
+}
86
+
87
+__weak int _fstat(int fd, struct stat *st) {
88
+    st->st_mode = S_IFCHR;
89
+    return 0;
90
+}
91
+
92
+__weak int _isatty(int fd) {
93
+    return 1;
94
+}
95
+
96
+__weak int isatty(int fd) {
97
+    return 1;
98
+}
99
+
100
+__weak int _lseek(int fd, off_t pos, int whence) {
101
+    return -1;
102
+}
103
+
104
+__weak unsigned char getch(void) {
105
+    return 0;
106
+}
107
+
108
+
109
+__weak int _read(int fd, char *buf, size_t cnt) {
110
+    *buf = getch();
111
+
112
+    return 1;
113
+}
114
+
115
+__weak void putch(unsigned char c) {
116
+}
117
+
118
+__weak void cgets(char *s, int bufsize) {
119
+    char *p;
120
+    int c;
121
+    int i;
122
+
123
+    for (i = 0; i < bufsize; i++) {
124
+        *(s+i) = 0;
125
+    }
126
+//    memset(s, 0, bufsize);
127
+
128
+    p = s;
129
+
130
+    for (p = s; p < s + bufsize-1;) {
131
+        c = getch();
132
+        switch (c) {
133
+        case '\r' :
134
+        case '\n' :
135
+            putch('\r');
136
+            putch('\n');
137
+            *p = '\n';
138
+            return;
139
+
140
+        case '\b' :
141
+            if (p > s) {
142
+                *p-- = 0;
143
+                putch('\b');
144
+                putch(' ');
145
+                putch('\b');
146
+            }
147
+            break;
148
+
149
+        default :
150
+            putch(c);
151
+            *p++ = c;
152
+            break;
153
+        }
154
+    }
155
+    return;
156
+}
157
+
158
+__weak int _write(int fd, const char *buf, size_t cnt) {
159
+    int i;
160
+
161
+    for (i = 0; i < cnt; i++)
162
+        putch(buf[i]);
163
+
164
+    return cnt;
165
+}
166
+
167
+/* Override fgets() in newlib with a version that does line editing */
168
+__weak char *fgets(char *s, int bufsize, void *f) {
169
+    cgets(s, bufsize);
170
+    return s;
171
+}
172
+
173
+__weak void _exit(int exitcode) {
174
+    while (1)
175
+        ;
176
+}

+ 23
- 0
buildroot/share/tests/STM32F103RC_cc_meeb_3dp-tests View File

@@ -0,0 +1,23 @@
1
+#!/usr/bin/env bash
2
+#
3
+# Build tests for STM32F103RC MEEB_3DP (ccrobot-online.com)
4
+#
5
+
6
+# exit on first failure
7
+set -e
8
+
9
+#
10
+# Build with the default configurations
11
+#
12
+restore_configs
13
+opt_set MOTHERBOARD BOARD_CCROBOT_MEEB_3DP
14
+opt_set SERIAL_PORT 1
15
+opt_set SERIAL_PORT_2 -1
16
+opt_set X_DRIVER_TYPE TMC2208
17
+opt_set Y_DRIVER_TYPE TMC2208
18
+opt_set Z_DRIVER_TYPE TMC2208
19
+opt_set E0_DRIVER_TYPE TMC2208
20
+exec_test $1 $2 "MEEB_3DP - Basic Config with TMC2208 SW Serial"
21
+
22
+# clean up
23
+restore_configs

+ 26
- 9
platformio.ini View File

@@ -45,15 +45,7 @@ src_filter    = ${common.default_src_filter} +<src/HAL/STM32F1>
45 45
 lib_ignore    =
46 46
   Adafruit NeoPixel
47 47
   SPI
48
-lib_deps      =
49
-  LiquidCrystal
50
-  TMCStepper@>=0.6.2
51
-  U8glib-HAL=https://github.com/MarlinFirmware/U8glib-HAL/archive/bugfix.zip
52
-  Adafruit MAX31865 library@>=1.1,<1.2
53
-  LiquidTWI2=https://github.com/lincomatic/LiquidTWI2/archive/master.zip
54
-  Arduino-L6470=https://github.com/ameyer/Arduino-L6470/archive/0.8.0.zip
55
-  SailfishLCD=https://github.com/mikeshub/SailfishLCD/archive/master.zip
56
-  SlowSoftI2CMaster=https://github.com/mikeshub/SlowSoftI2CMaster/archive/master.zip
48
+lib_deps      = ${common.lib_deps}
57 49
   SoftwareSerialM=https://github.com/FYSETC/SoftwareSerialM/archive/master.zip
58 50
 
59 51
 [common_avr8]
@@ -288,6 +280,31 @@ platform_packages = tool-stm32duino
288 280
 monitor_speed     = 115200
289 281
 
290 282
 #
283
+# MEEB_3DP (STM32F103RCT6 with 512K)
284
+#
285
+[env:STM32F103RC_cc_meeb_3dp]
286
+platform          = ${common_stm32f1.platform}
287
+extends           = common_stm32f1
288
+board             = MEEB_3DP
289
+platform_packages = tool-stm32duino
290
+build_flags       = ${common_stm32f1.build_flags}
291
+                    -DDEBUG_LEVEL=0
292
+                    -DSS_TIMER=4
293
+                    -DSTM32_FLASH_SIZE=512
294
+                    -DHSE_VALUE=12000000U
295
+                    -DUSE_USB_COMPOSITE
296
+                    -DVECT_TAB_OFFSET=0x2000
297
+                    -DGENERIC_BOOTLOADER
298
+extra_scripts     = pre:buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP_create_variant.py
299
+    buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py
300
+lib_deps          = ${common.lib_deps}
301
+    USBComposite for STM32F1@==0.91
302
+    Adafruit NeoPixel=https://github.com/ccccmagicboy/Adafruit_NeoPixel#meeb_3dp_use
303
+lib_ignore        = SPI, LiquidCrystal
304
+debug_tool        = stlink
305
+upload_protocol   = dfu
306
+
307
+#
291 308
 # STM32F103RC_fysetc
292 309
 #
293 310
 [env:STM32F103RC_fysetc]

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