Several fixes to the backtracer. Tested ant it works

Marlin/src/HAL/HAL_DUE/DebugMonitor_Due.cpp

@@ -34,19 +34,6 @@
 // Serial interrupt routines or any C runtime, as we don't know the
 // state we are when running them
 
-
-/* These symbols point to the start and end of stack */
-extern "C" const int _sstack;
-extern "C" const int _estack;
-
-/* These symbols point to the start and end of the code section */
-extern "C" const int _sfixed;
-extern "C" const int _efixed;
-
-/* These symbols point to the start and end of initialized data (could be SRAM functions!) */
-extern "C" const int _srelocate;
-extern "C" const int _erelocate;
-
 // A SW memory barrier, to ensure GCC does not overoptimize loops
 #define sw_barrier() asm volatile("": : :"memory");
 
@@ -126,25 +113,20 @@ static void TXDec(uint32_t v) {
 }
 
 /* Validate address */
-static bool validate_addr(uint16_t addr) {
-
-  // PC must point into the text (CODE) area
-  if (addr >= (uint32_t)&_sfixed && addr <= (uint32_t)&_efixed)
-    return true;
+static bool validate_addr(uint32_t addr) {
 
-  // Or into the SRAM function area
-  if (addr >= (uint32_t)&_srelocate && addr <= (uint32_t)&_erelocate)
+  // Address must be in SRAM (0x20070000 - 0x20088000)
+  if (addr >= 0x20070000 && addr < 0x20088000)
     return true;
 
-  // SP must point into the allocated stack area
-  if (addr >= (uint32_t)&_sstack && addr <= (uint32_t)&_estack)
+  // Or in FLASH (0x00080000 - 0x00100000)
+  if (addr >= 0x00080000 && addr < 0x00100000)
     return true;
 
   return false;
 }
 
 static bool UnwReadW(const uint32_t a, uint32_t *v) {
-
   if (!validate_addr(a))
     return false;
 
@@ -153,7 +135,6 @@ static bool UnwReadW(const uint32_t a, uint32_t *v) {
 }
 
 static bool UnwReadH(const uint32_t a, uint16_t *v) {
-
   if (!validate_addr(a))
     return false;
 
@@ -162,7 +143,6 @@ static bool UnwReadH(const uint32_t a, uint16_t *v) {
 }
 
 static bool UnwReadB(const uint32_t a, uint8_t *v) {
-
   if (!validate_addr(a))
     return false;
 
@@ -173,13 +153,27 @@ static bool UnwReadB(const uint32_t a, uint8_t *v) {
 
 // Dump a backtrace entry
 static bool UnwReportOut(void* ctx, const UnwReport* bte) {
+  int* p = (int*)ctx;
 
-  TX(bte->name?bte->name:"unknown"); TX('@');TXHex(bte->function);
+  (*p)++;
+  TX('#'); TXDec(*p); TX(" : ");
+  TX(bte->name?bte->name:"unknown"); TX('@'); TXHex(bte->function);
   TX('+'); TXDec(bte->address - bte->function);
   TX(" PC:");TXHex(bte->address); TX('\n');
   return true;
 }
 
+#if defined(UNW_DEBUG)
+void UnwPrintf(const char* format, ...) {
+  char dest[256];
+  va_list argptr;
+  va_start(argptr, format);
+  vsprintf(dest, format, argptr);
+  va_end(argptr);
+  TX(&dest[0]);
+}
+#endif
+
 /* Table of function pointers for passing to the unwinder */
 static const UnwindCallbacks UnwCallbacks = {
   UnwReportOut,
@@ -187,7 +181,7 @@ static const UnwindCallbacks UnwCallbacks = {
   UnwReadH,
   UnwReadB
 #if defined(UNW_DEBUG)
- ,printf
+ ,UnwPrintf
 #endif
 };
 
@@ -201,24 +195,27 @@ static const UnwindCallbacks UnwCallbacks = {
  * The function ends with a BKPT instruction to force control back into the debugger
  */
 extern "C"
-void HardFault_HandlerC(unsigned long *hardfault_args, unsigned long cause) {
+void HardFault_HandlerC(unsigned long *sp, unsigned long lr, unsigned long cause) {
 
   static const char* causestr[] = {
     "NMI","Hard","Mem","Bus","Usage","Debug","WDT","RSTC"
   };
 
+  UnwindFrame btf;
+
   // Dump report to the Programming port (interrupts are DISABLED)
   TXBegin();
   TX("\n\n## Software Fault detected ##\n");
   TX("Cause: "); TX(causestr[cause]); TX('\n');
-  TX("R0   : "); TXHex(((unsigned long)hardfault_args[0])); TX('\n');
-  TX("R1   : "); TXHex(((unsigned long)hardfault_args[1])); TX('\n');
-  TX("R2   : "); TXHex(((unsigned long)hardfault_args[2])); TX('\n');
-  TX("R3   : "); TXHex(((unsigned long)hardfault_args[3])); TX('\n');
-  TX("R12  : "); TXHex(((unsigned long)hardfault_args[4])); TX('\n');
-  TX("LR   : "); TXHex(((unsigned long)hardfault_args[5])); TX('\n');
-  TX("PC   : "); TXHex(((unsigned long)hardfault_args[6])); TX('\n');
-  TX("PSR  : "); TXHex(((unsigned long)hardfault_args[7])); TX('\n');
+
+  TX("R0   : "); TXHex(((unsigned long)sp[0])); TX('\n');
+  TX("R1   : "); TXHex(((unsigned long)sp[1])); TX('\n');
+  TX("R2   : "); TXHex(((unsigned long)sp[2])); TX('\n');
+  TX("R3   : "); TXHex(((unsigned long)sp[3])); TX('\n');
+  TX("R12  : "); TXHex(((unsigned long)sp[4])); TX('\n');
+  TX("LR   : "); TXHex(((unsigned long)sp[5])); TX('\n');
+  TX("PC   : "); TXHex(((unsigned long)sp[6])); TX('\n');
+  TX("PSR  : "); TXHex(((unsigned long)sp[7])); TX('\n');
 
   // Configurable Fault Status Register
   // Consists of MMSR, BFSR and UFSR
@@ -241,14 +238,18 @@ void HardFault_HandlerC(unsigned long *hardfault_args, unsigned long cause) {
   // Bus Fault Address Register
   TX("BFAR : "); TXHex((*((volatile unsigned long *)(0xE000ED38)))); TX('\n');
 
+  TX("ExcLR: "); TXHex(lr); TX('\n');
+  TX("ExcSP: "); TXHex((unsigned long)sp); TX('\n');
+
+  btf.sp = ((unsigned long)sp) + 8*4; // The original stack pointer
+  btf.fp = btf.sp;
+  btf.lr = ((unsigned long)sp[5]);
+  btf.pc = ((unsigned long)sp[6]) | 1; // Force Thumb, as CORTEX only support it
+
   // Perform a backtrace
   TX("\nBacktrace:\n\n");
-  UnwindFrame btf;
-  btf.sp = ((unsigned long)hardfault_args[7]);
-  btf.fp = btf.sp;
-  btf.lr = ((unsigned long)hardfault_args[5]);
-  btf.pc = ((unsigned long)hardfault_args[6]);
-  UnwindStart(&btf, &UnwCallbacks, nullptr);
+  int ctr = 0;
+  UnwindStart(&btf, &UnwCallbacks, &ctr);
 
   // Disable all NVIC interrupts
   NVIC->ICER[0] = 0xFFFFFFFF;
@@ -274,7 +275,8 @@ __attribute__((naked)) void NMI_Handler(void) {
     " ite eq                \n"
     " mrseq r0, msp         \n"
     " mrsne r0, psp         \n"
-    " mov r1,#0             \n"
+    " mov r1,lr             \n"
+    " mov r2,#0             \n"
     " b HardFault_HandlerC  \n"
   );
 }
@@ -285,7 +287,8 @@ __attribute__((naked)) void HardFault_Handler(void) {
     " ite eq                \n"
     " mrseq r0, msp         \n"
     " mrsne r0, psp         \n"
-    " mov r1,#1             \n"
+    " mov r1,lr             \n"
+    " mov r2,#1             \n"
     " b HardFault_HandlerC  \n"
   );
 }
@@ -296,7 +299,8 @@ __attribute__((naked)) void MemManage_Handler(void) {
     " ite eq                \n"
     " mrseq r0, msp         \n"
     " mrsne r0, psp         \n"
-    " mov r1,#2             \n"
+    " mov r1,lr             \n"
+    " mov r2,#2             \n"
     " b HardFault_HandlerC  \n"
   );
 }
@@ -307,7 +311,8 @@ __attribute__((naked)) void BusFault_Handler(void) {
     " ite eq                \n"
     " mrseq r0, msp         \n"
     " mrsne r0, psp         \n"
-    " mov r1,#3             \n"
+    " mov r1,lr             \n"
+    " mov r2,#3             \n"
     " b HardFault_HandlerC  \n"
   );
 }
@@ -318,7 +323,8 @@ __attribute__((naked)) void UsageFault_Handler(void) {
     " ite eq                \n"
     " mrseq r0, msp         \n"
     " mrsne r0, psp         \n"
-    " mov r1,#4             \n"
+    " mov r1,lr             \n"
+    " mov r2,#4             \n"
     " b HardFault_HandlerC  \n"
   );
 }
@@ -329,18 +335,21 @@ __attribute__((naked)) void DebugMon_Handler(void) {
     " ite eq                \n"
     " mrseq r0, msp         \n"
     " mrsne r0, psp         \n"
-    " mov r1,#5             \n"
+    " mov r1,lr             \n"
+    " mov r2,#5             \n"
     " b HardFault_HandlerC  \n"
   );
 }
 
+/* This is NOT an exception, it is an interrupt handler - Nevertheless, the framing is the same */
 __attribute__((naked)) void WDT_Handler(void) {
   __asm volatile (
     " tst lr, #4            \n"
     " ite eq                \n"
     " mrseq r0, msp         \n"
     " mrsne r0, psp         \n"
-    " mov r1,#6             \n"
+    " mov r1,lr             \n"
+    " mov r2,#6             \n"
     " b HardFault_HandlerC  \n"
   );
 }
@@ -351,7 +360,8 @@ __attribute__((naked)) void RSTC_Handler(void) {
     " ite eq                \n"
     " mrseq r0, msp         \n"
     " mrsne r0, psp         \n"
-    " mov r1,#7             \n"
+    " mov r1,lr             \n"
+    " mov r2,#7             \n"
     " b HardFault_HandlerC  \n"
   );
 }

Marlin/src/HAL/HAL_DUE/backtrace/unwarm.c

@@ -79,7 +79,7 @@ void UnwInitState(UnwState * const state,     /**< Pointer to structure to fill.
 // Detect if function names are available
 static int __attribute__ ((noinline)) has_function_names(void) {
 
-  uint32_t flag_word = ((uint32_t*)&has_function_names)[-1];
+  uint32_t flag_word = ((uint32_t*)(((uint32_t)(&has_function_names)) & (-4))) [-1];
   return ((flag_word & 0xff000000) == 0xff000000) ? 1 : 0;
 }
 
@@ -93,7 +93,7 @@ bool UnwReportRetAddr(UnwState * const state, uint32_t addr) {
 
   // We found two acceptable values.
   entry.name = NULL;
-  entry.address = addr;
+  entry.address = addr & 0xFFFFFFFE; // Remove Thumb bit
   entry.function = 0;
 
   // If there are function names, try to solve name
@@ -108,7 +108,7 @@ bool UnwReportRetAddr(UnwState * const state, uint32_t addr) {
     uint32_t v;
     while(state->cb->readW(pf-4,&v)) {
 
-      // Check if name descriptor is valid and name is terminated in 0.
+      // Check if name descriptor is valid
       if ((v & 0xffffff00) == 0xff000000 &&
           (v & 0xff) > 1) {
 

Marlin/src/HAL/HAL_DUE/backtrace/unwarm_thumb.c

@@ -38,6 +38,8 @@ UnwResult UnwStartThumb(UnwState * const state) {
 
   bool found = false;
   uint16_t t = UNW_MAX_INSTR_COUNT;
+  uint32_t lastJumpAddr = 0;  // Last JUMP address, to try to detect infinite loops
+  bool loopDetected = false;  // If a loop was detected
 
   do {
     uint16_t instr;
@@ -61,12 +63,332 @@ UnwResult UnwStartThumb(UnwState * const state) {
       return UNWIND_INCONSISTENT;
     }
 
+    /*
+     * Detect 32bit thumb instructions
+     */
+    if ((instr & 0xe000) == 0xe000 && (instr & 0x1800) != 0) {
+      uint16_t instr2;
+
+      /* Check next address */
+      state->regData[15].v += 2;
+
+      /* Attempt to read the 2nd part of the instruction */
+      if(!state->cb->readH(state->regData[15].v & (~0x1), &instr2)) {
+        return UNWIND_IREAD_H_FAIL;
+      }
+
+      UnwPrintd3(" %x %04x:", state->regData[15].v, instr2);
+
+      /*
+       * Load/Store multiple: Only interpret
+       *  PUSH and POP
+       */
+      if ((instr & 0xfe6f) == 0xe82d) {
+        bool     L     = (instr &  0x10) ? true : false;
+        uint16_t rList = instr2;
+
+        if(L) {
+          uint8_t r;
+
+          /* Load from memory: POP */
+          UnwPrintd1("POP {Rlist}\n");
+
+          /* Load registers from stack */
+          for(r = 0; r < 16; r++) {
+            if(rList & (0x1 << r)) {
+
+              /* Read the word */
+              if(!UnwMemReadRegister(state, state->regData[13].v, &state->regData[r])) {
+                return UNWIND_DREAD_W_FAIL;
+              }
+
+              /* Alter the origin to be from the stack if it was valid */
+              if(M_IsOriginValid(state->regData[r].o)) {
+
+                state->regData[r].o = REG_VAL_FROM_STACK;
+
+                /* If restoring the PC */
+                if (r == 15) {
+
+                  /* The bottom bit should have been set to indicate that
+                   *  the caller was from Thumb.  This would allow return
+                   *  by BX for interworking APCS.
+                   */
+                  if((state->regData[15].v & 0x1) == 0) {
+                    UnwPrintd2("Warning: Return address not to Thumb: 0x%08x\n", state->regData[15].v);
+
+                    /* Pop into the PC will not switch mode */
+                    return UNWIND_INCONSISTENT;
+                  }
+
+                  /* Store the return address */
+                  if(!UnwReportRetAddr(state, state->regData[15].v)) {
+                    return UNWIND_TRUNCATED;
+                  }
+
+                  /* Now have the return address */
+                  UnwPrintd2(" Return PC=%x\n", state->regData[15].v);
+
+                  /* Compensate for the auto-increment, which isn't needed here */
+                  state->regData[15].v -= 2;
+
+                }
+
+              } else {
+
+                if (r == 15) {
+                  /* Return address is not valid */
+                  UnwPrintd1("PC popped with invalid address\n");
+                  return UNWIND_FAILURE;
+                }
+              }
+
+              state->regData[13].v += 4;
+
+              UnwPrintd3("  r%d = 0x%08x\n", r, state->regData[r].v);
+            }
+          }
+        }
+        else {
+          int8_t r;
+
+          /* Store to memory: PUSH */
+          UnwPrintd1("PUSH {Rlist}");
+
+          for(r = 15; r >= 0; r--) {
+            if(rList & (0x1 << r)) {
+              UnwPrintd4("\n  r%d = 0x%08x\t; %s", r, state->regData[r].v, M_Origin2Str(state->regData[r].o));
+
+              state->regData[13].v -= 4;
+
+              if(!UnwMemWriteRegister(state, state->regData[13].v, &state->regData[r])) {
+                return UNWIND_DWRITE_W_FAIL;
+              }
+            }
+          }
+        }
+      }
+      /*
+       * PUSH register
+       */
+      else if (instr == 0xf84d && (instr2 & 0x0fff) == 0x0d04) {
+        uint8_t r = instr2 >> 12;
+
+        /* Store to memory: PUSH */
+        UnwPrintd2("PUSH {R%d}\n", r);
+        UnwPrintd4("\n  r%d = 0x%08x\t; %s", r, state->regData[r].v, M_Origin2Str(state->regData[r].o));
+
+        state->regData[13].v -= 4;
+
+        if(!UnwMemWriteRegister(state, state->regData[13].v, &state->regData[r])) {
+          return UNWIND_DWRITE_W_FAIL;
+        }
+      }
+      /*
+       * POP register
+       */
+      else if (instr == 0xf85d && (instr2 & 0x0fff) == 0x0b04) {
+        uint8_t r = instr2 >> 12;
+
+        /* Load from memory: POP */
+        UnwPrintd2("POP {R%d}\n", r);
+
+        /* Read the word */
+        if(!UnwMemReadRegister(state, state->regData[13].v, &state->regData[r])) {
+          return UNWIND_DREAD_W_FAIL;
+        }
+
+        /* Alter the origin to be from the stack if it was valid */
+        if(M_IsOriginValid(state->regData[r].o)) {
+
+          state->regData[r].o = REG_VAL_FROM_STACK;
+
+          /* If restoring the PC */
+          if (r == 15) {
+
+            /* The bottom bit should have been set to indicate that
+             *  the caller was from Thumb.  This would allow return
+             *  by BX for interworking APCS.
+             */
+            if((state->regData[15].v & 0x1) == 0) {
+              UnwPrintd2("Warning: Return address not to Thumb: 0x%08x\n", state->regData[15].v);
+
+              /* Pop into the PC will not switch mode */
+              return UNWIND_INCONSISTENT;
+            }
+
+            /* Store the return address */
+            if(!UnwReportRetAddr(state, state->regData[15].v)) {
+              return UNWIND_TRUNCATED;
+            }
+
+            /* Now have the return address */
+            UnwPrintd2(" Return PC=%x\n", state->regData[15].v);
+
+            /* Compensate for the auto-increment, which isn't needed here */
+            state->regData[15].v -= 2;
+
+          }
+
+        } else {
+
+          if (r == 15) {
+            /* Return address is not valid */
+            UnwPrintd1("PC popped with invalid address\n");
+            return UNWIND_FAILURE;
+          }
+        }
+
+        state->regData[13].v += 4;
+
+        UnwPrintd3("  r%d = 0x%08x\n", r, state->regData[r].v);
+      }
+      /*
+       * Unconditional branch
+       */
+      else if ((instr & 0xf800) == 0xf000 && (instr2 & 0xd000) == 0x9000) {
+        uint32_t v;
+
+        uint8_t      S = (instr & 0x400) >> 10;
+        uint16_t imm10 = (instr & 0x3ff);
+        uint8_t     J1 = (instr2 & 0x2000) >> 13;
+        uint8_t     J2 = (instr2 & 0x0800) >> 11;
+        uint16_t imm11 = (instr2 & 0x7ff);
+
+        uint8_t I1 = J1 ^ S ^ 1;
+        uint8_t I2 = J2 ^ S ^ 1;
+        uint32_t imm32 = (S << 24) | (I1 << 23) | (I2 << 22) |(imm10 << 12) | (imm11 << 1);
+        if (S) imm32 |= 0xfe000000;
+
+        UnwPrintd2("B %d \n", imm32);
+
+        /* Update PC */
+        state->regData[15].v += imm32;
+
+        /* Need to advance by a word to account for pre-fetch.
+         *  Advance by a half word here, allowing the normal address
+         *  advance to account for the other half word.
+         */
+        state->regData[15].v += 2;
+
+        /* Compute the jump address */
+        v = state->regData[15].v + 2;
+
+        /* Display PC of next instruction */
+        UnwPrintd2(" New PC=%x", v);
+
+        /* Did we detect an infinite loop ? */
+        loopDetected = lastJumpAddr == v;
+
+        /* Remember the last address we jumped to  */
+        lastJumpAddr = v;
+      }
+
+      /*
+       * Branch with link
+       */
+      else if ((instr & 0xf800) == 0xf000 && (instr2 & 0xd000) == 0xd000) {
+
+        uint8_t      S = (instr & 0x400) >> 10;
+        uint16_t imm10 = (instr & 0x3ff);
+        uint8_t     J1 = (instr2 & 0x2000) >> 13;
+        uint8_t     J2 = (instr2 & 0x0800) >> 11;
+        uint16_t imm11 = (instr2 & 0x7ff);
+
+        uint8_t I1 = J1 ^ S ^ 1;
+        uint8_t I2 = J2 ^ S ^ 1;
+        uint32_t imm32 = (S << 24) | (I1 << 23) | (I2 << 22) |(imm10 << 12) | (imm11 << 1);
+        if (S) imm32 |= 0xfe000000;
+
+        UnwPrintd2("BL %d \n", imm32);
+
+        /* Never taken, as we are unwinding the stack */
+        if (0) {
+
+          /* Store return address in LR register */
+          state->regData[14].v = state->regData[15].v + 2;
+          state->regData[14].o = REG_VAL_FROM_CONST;
+
+          /* Update PC */
+          state->regData[15].v += imm32;
+
+          /* Need to advance by a word to account for pre-fetch.
+           *  Advance by a half word here, allowing the normal address
+           *  advance to account for the other half word.
+           */
+          state->regData[15].v += 2;
+
+          /* Display PC of next instruction */
+          UnwPrintd2(" Return PC=%x", state->regData[15].v);
+
+          /* Report the return address, including mode bit */
+          if(!UnwReportRetAddr(state, state->regData[15].v)) {
+            return UNWIND_TRUNCATED;
+          }
+
+          /* Determine the new mode */
+          if(state->regData[15].v & 0x1) {
+            /* Branching to THUMB */
+
+            /* Account for the auto-increment which isn't needed */
+            state->regData[15].v -= 2;
+          }
+          else {
+            /* Branch to ARM */
+            return UnwStartArm(state);
+          }
+        }
+      }
+
+      /*
+       * Conditional branches. Usually not taken, unless infinite loop is detected
+       */
+      else if ((instr & 0xf800) == 0xf000 && (instr2 & 0xd000) == 0x8000) {
+
+        uint8_t      S = (instr & 0x400) >> 10;
+        uint16_t  imm6 = (instr &  0x3f);
+        uint8_t     J1 = (instr2 & 0x2000) >> 13;
+        uint8_t     J2 = (instr2 & 0x0800) >> 11;
+        uint16_t imm11 = (instr2 & 0x7ff);
+
+        uint8_t I1 = J1 ^ S ^ 1;
+        uint8_t I2 = J2 ^ S ^ 1;
+        uint32_t imm32 = (S << 20) | (I1 << 19) | (I2 << 18) |(imm6 << 12) | (imm11 << 1);
+        if (S) imm32 |= 0xffe00000;
+
+        UnwPrintd2("Bcond %d\n", imm32);
+
+        /* Take the jump only if a loop is detected */
+        if (loopDetected) {
+
+          /* Update PC */
+          state->regData[15].v += imm32;
+
+          /* Need to advance by a word to account for pre-fetch.
+           *  Advance by a half word here, allowing the normal address
+           *  advance to account for the other half word.
+           */
+          state->regData[15].v += 2;
+
+          /* Display PC of next instruction */
+          UnwPrintd2(" New PC=%x", state->regData[15].v + 2);
+        }
+      }
+      else {
+        UnwPrintd1("???? (32)");
+
+        /* Unknown/undecoded.  May alter some register, so invalidate file */
+        UnwInvalidateRegisterFile(state->regData);
+      }
+      /* End of thumb 32bit code */
+
+    }
     /* Format 1: Move shifted register
      *  LSL Rd, Rs, #Offset5
      *  LSR Rd, Rs, #Offset5
      *  ASR Rd, Rs, #Offset5
      */
-    if((instr & 0xe000) == 0x0000 && (instr & 0x1800) != 0x1800) {
+    else if((instr & 0xe000) == 0x0000 && (instr & 0x1800) != 0x1800) {
       bool signExtend;
       uint8_t op      = (instr & 0x1800) >> 11;
       uint8_t offset5 = (instr & 0x07c0) >>  6;
@@ -355,8 +677,8 @@ UnwResult UnwStartThumb(UnwState * const state) {
     }
     /* Format 5: Hi register operations/branch exchange
      *  ADD Rd, Hs
-     *  ADD Hd, Rs
-     *  ADD Hd, Hs
+     *  CMP Hd, Rs
+     *  MOV Hd, Hs
      */
     else if((instr & 0xfc00) == 0x4400) {
       uint8_t op  = (instr & 0x0300) >> 8;
@@ -371,11 +693,6 @@ UnwResult UnwStartThumb(UnwState * const state) {
       if(h1)
         rhd += 8;
 
-      if(op != 3 && !h1 && !h2) {
-        UnwPrintd1("\nError: h1 or h2 must be set for ADD, CMP or MOV\n");
-        return UNWIND_ILLEGAL_INSTR;
-      }
-
       switch(op) {
         case 0: /* ADD */
           UnwPrintd5("ADD r%d, r%d\t; r%d %s", rhd, rhs, rhs, M_Origin2Str(state->regData[rhs].o));
@@ -407,6 +724,10 @@ UnwResult UnwStartThumb(UnwState * const state) {
               return UNWIND_TRUNCATED;
             }
 
+            /* Store return address in LR register */
+            state->regData[14].v = state->regData[15].v + 2;
+            state->regData[14].o = REG_VAL_FROM_CONST;
+
             /* Update the PC */
             state->regData[15].v = state->regData[rhs].v;
 
@@ -570,10 +891,42 @@ UnwResult UnwStartThumb(UnwState * const state) {
         }
       }
     }
+
+    /*
+     * Conditional branches
+     * Bcond
+     */
+    else if((instr & 0xf000) == 0xd000) {
+      int32_t branchValue = (instr & 0xff);
+      if (branchValue & 0x80) branchValue |= 0xffffff00;
+
+      /* Branch distance is twice that specified in the instruction. */
+      branchValue *= 2;
+
+      UnwPrintd2("Bcond %d \n", branchValue);
+
+      /* Only take the branch if a loop was detected */
+      if (loopDetected) {
+
+        /* Update PC */
+        state->regData[15].v += branchValue;
+
+        /* Need to advance by a word to account for pre-fetch.
+         *  Advance by a half word here, allowing the normal address
+         *  advance to account for the other half word.
+         */
+        state->regData[15].v += 2;
+
+        /* Display PC of next instruction */
+        UnwPrintd2(" New PC=%x", state->regData[15].v + 2);
+      }
+    }
+
     /* Format 18: unconditional branch
      *  B label
      */
     else if((instr & 0xf800) == 0xe000) {
+      uint32_t v;
       int16_t branchValue = signExtend11(instr & 0x07ff);
 
       /* Branch distance is twice that specified in the instruction. */
@@ -590,9 +943,17 @@ UnwResult UnwStartThumb(UnwState * const state) {
        */
       state->regData[15].v += 2;
 
+      /* Compute the jump address */
+      v = state->regData[15].v + 2;
+
       /* Display PC of next instruction */
-      UnwPrintd2(" New PC=%x", state->regData[15].v + 2);
+      UnwPrintd2(" New PC=%x", v);
+
+      /* Did we detect an infinite loop ? */
+      loopDetected = lastJumpAddr == v;
 
+      /* Remember the last address we jumped to  */
+      lastJumpAddr = v;
     }
     else {
       UnwPrintd1("????");

Marlin/src/HAL/HAL_DUE/backtrace/unwinder.c

@@ -22,55 +22,18 @@
 #include "unwarm.h"
 #include "unwarmbytab.h"
 
-
-/* These symbols point to the start and end of stack */
-extern const int _sstack;
-extern const int _estack;
-
-/* These symbols point to the start and end of the code section */
-extern const int _sfixed;
-extern const int _efixed;
-
-/* These symbols point to the start and end of initialized data (could be SRAM functions!) */
-extern const int _srelocate;
-extern const int _erelocate;
-
-
-/* Validate stack pointer (SP): It must be in the stack area */
-static inline __attribute__((always_inline)) UnwResult validate_sp(const void* sp) {
-
-  // SP must point into the allocated stack area
-  if ((uint32_t)sp >= (uint32_t)&_sstack && (uint32_t)sp <= (uint32_t)&_estack)
-    return UNWIND_SUCCESS;
-
-  return UNWIND_INVALID_SP;
-}
-
-/* Validate code pointer (PC): It must be either in TEXT or in SRAM */
-static inline __attribute__((always_inline)) UnwResult validate_pc(const void* pc) {
-
-  // PC must point into the text (CODE) area
-  if ((uint32_t)pc >= (uint32_t)&_sfixed && (uint32_t)pc <= (uint32_t)&_efixed)
-    return UNWIND_SUCCESS;
-
-  // Or into the SRAM function area
-  if ((uint32_t)pc >= (uint32_t)&_srelocate && (uint32_t)pc <= (uint32_t)&_erelocate)
-    return UNWIND_SUCCESS;
-
-  return UNWIND_INVALID_PC;
-}
-
 /* These symbols point to the unwind index and should be provide by the linker script */
 extern const UnwTabEntry __exidx_start[];
 extern const UnwTabEntry __exidx_end[];
 
 // Detect if unwind information is present or not
 static int HasUnwindTableInfo(void) {
-  return ((char*)(&__exidx_end) - (char*)(&__exidx_start)) > 16 ? 1 : 0; // 16 because there are default entries we can´t supress
+  // > 16 because there are default entries we can´t supress
+  return ((char*)(&__exidx_end) - (char*)(&__exidx_start)) > 16 ? 1 : 0;
 }
 
-UnwResult UnwindStart(UnwindFrame* frame, const UnwindCallbacks *cb, void *data)
-{
+UnwResult UnwindStart(UnwindFrame* frame, const UnwindCallbacks *cb, void *data) {
+
   if (HasUnwindTableInfo()) {
 
     /* We have unwind information tables */

Marlin/src/HAL/HAL_DUE/backtrace/unwinder.h

@@ -149,7 +149,7 @@ typedef struct {
 
 #if defined(UNW_DEBUG)
   /** Print a formatted line for debug. */
-  int (*printf)(const char *format, ...);
+  void (*printf)(const char *format, ...);
 #endif
 } UnwindCallbacks;
 
@@ -169,6 +169,11 @@ extern "C" {
  * This will unwind the stack starting at the PC value supplied to in the
  * link register (i.e. not a normal register) and the stack pointer value
  * supplied.
+ *
+ * -If the program was compiled with -funwind-tables , it will use them to
+ * perform the traceback. Otherwise, brute force will be employed
+ * -If the program was compiled with -mpoke-function-name, then you will
+ * get function names in the traceback. Otherwise, you will not.
  */
 UnwResult UnwindStart(UnwindFrame* frame, const UnwindCallbacks *cb, void *data);