Browse Source

🎨 Some automated cleanup

Scott Lahteine 1 year ago
parent
commit
34f3e5bd88
24 changed files with 162 additions and 162 deletions
  1. 1
    1
      Marlin/src/HAL/NATIVE_SIM/tft/xpt2046.h
  2. 1
    1
      Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
  3. 1
    1
      Marlin/src/HAL/STM32/tft/tft_spi.cpp
  4. 1
    1
      Marlin/src/core/macros.h
  5. 2
    2
      Marlin/src/inc/SanityCheck.h
  6. 1
    1
      Marlin/src/lcd/extui/ftdi_eve_touch_ui/ftdi_eve_lib/basic/resolutions.h
  7. 1
    1
      buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/variant.cpp
  8. 8
    8
      buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/hal_conf_extra.h
  9. 14
    14
      buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/variant.cpp
  10. 10
    10
      buildroot/share/PlatformIO/variants/MARLIN_F103Rx/PeripheralPins.c
  11. 1
    1
      buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h
  12. 1
    1
      buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h
  13. 8
    8
      buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PeripheralPins.c
  14. 8
    8
      buildroot/share/PlatformIO/variants/MARLIN_F103Zx/hal_conf_custom.h
  15. 7
    7
      buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/hal_conf_extra.h
  16. 1
    1
      buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/PeripheralPins.c
  17. 1
    1
      buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp
  18. 1
    1
      buildroot/share/PlatformIO/variants/MARLIN_H743Vx/PeripheralPins.c
  19. 1
    1
      buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.cpp
  20. 4
    4
      buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.h
  21. 7
    7
      buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_V2/hal_conf_extra.h
  22. 78
    78
      buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/board.cpp
  23. 3
    3
      buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/wirish/boards.cpp
  24. 1
    1
      buildroot/share/PlatformIO/variants/marlin_maple_MEEB_3DP/wirish/boards.cpp

+ 1
- 1
Marlin/src/HAL/NATIVE_SIM/tft/xpt2046.h View File

@@ -51,7 +51,7 @@ enum XPTCoordinate : uint8_t {
51 51
   XPT2046_Z2 = 0x40 | XPT2046_CONTROL | XPT2046_DFR_MODE,
52 52
 };
53 53
 
54
-#if !defined(XPT2046_Z1_THRESHOLD)
54
+#ifndef XPT2046_Z1_THRESHOLD
55 55
   #define XPT2046_Z1_THRESHOLD 10
56 56
 #endif
57 57
 

+ 1
- 1
Marlin/src/HAL/STM32/tft/tft_fsmc.cpp View File

@@ -147,7 +147,7 @@ uint32_t TFT_FSMC::ReadID(tft_data_t Reg) {
147 147
 }
148 148
 
149 149
 bool TFT_FSMC::isBusy() {
150
-  #if defined(STM32F1xx)
150
+  #ifdef STM32F1xx
151 151
     volatile bool dmaEnabled = (DMAtx.Instance->CCR & DMA_CCR_EN) != RESET;
152 152
   #elif defined(STM32F4xx)
153 153
     volatile bool dmaEnabled = DMAtx.Instance->CR & DMA_SxCR_EN;

+ 1
- 1
Marlin/src/HAL/STM32/tft/tft_spi.cpp View File

@@ -179,7 +179,7 @@ uint32_t TFT_SPI::ReadID(uint16_t Reg) {
179 179
 }
180 180
 
181 181
 bool TFT_SPI::isBusy() {
182
-  #if defined(STM32F1xx)
182
+  #ifdef STM32F1xx
183 183
     volatile bool dmaEnabled = (DMAtx.Instance->CCR & DMA_CCR_EN) != RESET;
184 184
   #elif defined(STM32F4xx)
185 185
     volatile bool dmaEnabled = DMAtx.Instance->CR & DMA_SxCR_EN;

+ 1
- 1
Marlin/src/core/macros.h View File

@@ -21,7 +21,7 @@
21 21
  */
22 22
 #pragma once
23 23
 
24
-#if !defined(__has_include)
24
+#ifndef __has_include
25 25
   #define __has_include(...) 1
26 26
 #endif
27 27
 

+ 2
- 2
Marlin/src/inc/SanityCheck.h View File

@@ -2276,7 +2276,7 @@ static_assert(Y_MAX_LENGTH >= Y_BED_SIZE, "Movement bounds (Y_MIN_POS, Y_MAX_POS
2276 2276
  * Redundant temperature sensor config
2277 2277
  */
2278 2278
 #if HAS_TEMP_REDUNDANT
2279
-  #if !defined(TEMP_SENSOR_REDUNDANT_SOURCE)
2279
+  #ifndef TEMP_SENSOR_REDUNDANT_SOURCE
2280 2280
     #error "TEMP_SENSOR_REDUNDANT requires TEMP_SENSOR_REDUNDANT_SOURCE."
2281 2281
   #elif !defined(TEMP_SENSOR_REDUNDANT_TARGET)
2282 2282
     #error "TEMP_SENSOR_REDUNDANT requires TEMP_SENSOR_REDUNDANT_TARGET."
@@ -2984,7 +2984,7 @@ static_assert(Y_MAX_LENGTH >= Y_BED_SIZE, "Movement bounds (Y_MIN_POS, Y_MAX_POS
2984 2984
 #endif
2985 2985
 
2986 2986
 #if ENABLED(ANYCUBIC_LCD_CHIRON)
2987
-  #if !defined(BEEPER_PIN)
2987
+  #ifndef BEEPER_PIN
2988 2988
     #error "ANYCUBIC_LCD_CHIRON requires BEEPER_PIN"
2989 2989
   #elif DISABLED(SDSUPPORT)
2990 2990
     #error "ANYCUBIC_LCD_CHIRON requires SDSUPPORT"

+ 1
- 1
Marlin/src/lcd/extui/ftdi_eve_touch_ui/ftdi_eve_lib/basic/resolutions.h View File

@@ -97,7 +97,7 @@
97 97
 
98 98
 #elif defined(TOUCH_UI_800x480)
99 99
   namespace FTDI {
100
-    #if defined(TOUCH_UI_800x480_GENERIC)
100
+    #ifdef TOUCH_UI_800x480_GENERIC
101 101
       constexpr uint8_t Pclk                 =    2;
102 102
       constexpr uint16_t Hsize               =  800;
103 103
       constexpr uint16_t Vsize               =  480;

+ 1
- 1
buildroot/share/PlatformIO/variants/MARLIN_ARCHIM/variant.cpp View File

@@ -413,7 +413,7 @@ void init( void )
413 413
 
414 414
   // Disable pull-up on every pin
415 415
   for (unsigned i = 0; i < PINS_COUNT; i++)
416
-	  digitalWrite(i, LOW);
416
+    digitalWrite(i, LOW);
417 417
 
418 418
   // Enable parallel access on PIO output data registers
419 419
   PIOA->PIO_OWER = 0xFFFFFFFF;

+ 8
- 8
buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/hal_conf_extra.h View File

@@ -100,11 +100,11 @@ extern "C" {
100 100
   *        This value is used by the RCC HAL module to compute the system frequency
101 101
   *        (when HSE is used as system clock source, directly or through the PLL).
102 102
   */
103
-#if !defined  (HSE_VALUE)
103
+#ifndef HSE_VALUE
104 104
 #define HSE_VALUE    ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
105 105
 #endif /* HSE_VALUE */
106 106
 
107
-#if !defined  (HSE_STARTUP_TIMEOUT)
107
+#ifndef HSE_STARTUP_TIMEOUT
108 108
 #define HSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for HSE start up, in ms */
109 109
 #endif /* HSE_STARTUP_TIMEOUT */
110 110
 
@@ -112,7 +112,7 @@ extern "C" {
112 112
   * @brief Internal  oscillator (CSI) default value.
113 113
   *        This value is the default CSI value after Reset.
114 114
   */
115
-#if !defined  (CSI_VALUE)
115
+#ifndef CSI_VALUE
116 116
 #define CSI_VALUE    ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
117 117
 #endif /* CSI_VALUE */
118 118
 
@@ -121,7 +121,7 @@ extern "C" {
121 121
   *        This value is used by the RCC HAL module to compute the system frequency
122 122
   *        (when HSI is used as system clock source, directly or through the PLL).
123 123
   */
124
-#if !defined  (HSI_VALUE)
124
+#ifndef HSI_VALUE
125 125
 #define HSI_VALUE    ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
126 126
 #endif /* HSI_VALUE */
127 127
 
@@ -129,16 +129,16 @@ extern "C" {
129 129
   * @brief External Low Speed oscillator (LSE) value.
130 130
   *        This value is used by the UART, RTC HAL module to compute the system frequency
131 131
   */
132
-#if !defined  (LSE_VALUE)
132
+#ifndef LSE_VALUE
133 133
 #define LSE_VALUE    ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
134 134
 #endif /* LSE_VALUE */
135 135
 
136 136
 
137
-#if !defined  (LSE_STARTUP_TIMEOUT)
137
+#ifndef LSE_STARTUP_TIMEOUT
138 138
 #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
139 139
 #endif /* LSE_STARTUP_TIMEOUT */
140 140
 
141
-#if !defined  (LSI_VALUE)
141
+#ifndef LSI_VALUE
142 142
 #define LSI_VALUE  ((uint32_t)32000)      /*!< LSI Typical Value in Hz*/
143 143
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
144 144
 The real value may vary depending on the variations
@@ -148,7 +148,7 @@ in voltage and temperature.*/
148 148
   *        This value is used by the I2S HAL module to compute the I2S clock source
149 149
   *        frequency, this source is inserted directly through I2S_CKIN pad.
150 150
   */
151
-#if !defined  (EXTERNAL_CLOCK_VALUE)
151
+#ifndef EXTERNAL_CLOCK_VALUE
152 152
 #define EXTERNAL_CLOCK_VALUE    12288000U /*!< Value of the External clock in Hz*/
153 153
 #endif /* EXTERNAL_CLOCK_VALUE */
154 154
 

+ 14
- 14
buildroot/share/PlatformIO/variants/MARLIN_BTT_SKR_SE_BX/variant.cpp View File

@@ -184,7 +184,7 @@ void SystemClockStartupInit() {
184 184
 
185 185
   PWR->CR3 &= ~(1 << 2);  // SCUEN=0
186 186
   PWR->D3CR |= 3 << 14;   // VOS=3,Scale1,1.15~1.26V core voltage
187
-  while((PWR->D3CR & (1 << 13)) == 0);	// Wait for the voltage to stabilize
187
+  while((PWR->D3CR & (1 << 13)) == 0);  // Wait for the voltage to stabilize
188 188
   RCC->CR |= 1<<16;       // Enable HSE
189 189
 
190 190
   uint16_t timeout = 0;
@@ -198,9 +198,9 @@ void SystemClockStartupInit() {
198 198
     RCC->PLLCKSELR |= 2 << 0;         // PLLSRC[1:0] = 2, HSE for PLL clock source
199 199
     RCC->PLLCKSELR |= 5 << 4;         // DIVM1[5:0] = pllm,     Prescaler for PLL1
200 200
     RCC->PLL1DIVR |= (160 - 1) << 0;  // DIVN1[8:0] = plln - 1, Multiplication factor for PLL1 VCO
201
-    RCC->PLL1DIVR |= (2 - 1) << 9;	  // DIVP1[6:0] = pllp - 1, PLL1 DIVP division factor
201
+    RCC->PLL1DIVR |= (2 - 1) << 9;    // DIVP1[6:0] = pllp - 1, PLL1 DIVP division factor
202 202
     RCC->PLL1DIVR |= (4 - 1) << 16;   // DIVQ1[6:0] = pllq - 1, PLL1 DIVQ division factor
203
-    RCC->PLL1DIVR |= 1 << 24;		      // DIVR1[6:0] = pllr - 1, PLL1 DIVR division factor
203
+    RCC->PLL1DIVR |= 1 << 24;         // DIVR1[6:0] = pllr - 1, PLL1 DIVR division factor
204 204
     RCC->PLLCFGR |= 2 << 2;           // PLL1 input (ref1_ck) clock range frequency is between 4 and 8 MHz
205 205
     RCC->PLLCFGR |= 0 << 1;           // PLL1 VCO selection, 0: 192 to 836 MHz, 1 : 150 to 420 MHz
206 206
     RCC->PLLCFGR |= 3 << 16;          // pll1_q_ck and pll1_p_ck output is enabled
@@ -209,7 +209,7 @@ void SystemClockStartupInit() {
209 209
 
210 210
     // PLL2 DIVR clock frequency = 220MHz, so that SDRAM clock can be set to 110MHz
211 211
     RCC->PLLCKSELR |= 25 << 12;       // DIVM2[5:0] = 25, Prescaler for PLL2
212
-    RCC->PLL2DIVR |= (440 - 1) << 0;	// DIVN2[8:0] = 440 - 1, Multiplication factor for PLL2 VCO
212
+    RCC->PLL2DIVR |= (440 - 1) << 0;  // DIVN2[8:0] = 440 - 1, Multiplication factor for PLL2 VCO
213 213
     RCC->PLL2DIVR |= (2 - 1) << 9;    // DIVP2[6:0] = 2-1, PLL2 DIVP division factor
214 214
     RCC->PLL2DIVR |= (2 - 1) << 24;   // DIVR2[6:0] = 2-1, PLL2 DIVR division factor
215 215
     RCC->PLLCFGR |= 0 << 6;           // PLL2RGE[1:0]=0, PLL2 input (ref2_ck) clock range frequency is between 1 and 2 MHz
@@ -271,8 +271,8 @@ uint8_t MPU_Set_Protection(uint32_t baseaddr, uint32_t size, uint32_t rnum, uint
271 271
   uint8_t rnr = 0;
272 272
   if ((size % 32) || size == 0) return 1;
273 273
   rnr = MPU_Convert_Bytes_To_POT(size) - 1;
274
-  SCB->SHCSR &= ~(1 << 16);	        //disable MemManage
275
-  MPU->CTRL &= ~(1 << 0);		        //disable MPU
274
+  SCB->SHCSR &= ~(1 << 16);         //disable MemManage
275
+  MPU->CTRL &= ~(1 << 0);           //disable MPU
276 276
   MPU->RNR = rnum;
277 277
   MPU->RBAR = baseaddr;
278 278
   tempreg |= 0 << 28;
@@ -286,21 +286,21 @@ uint8_t MPU_Set_Protection(uint32_t baseaddr, uint32_t size, uint32_t rnum, uint
286 286
   tempreg |= 1 << 0;
287 287
   MPU->RASR = tempreg;
288 288
   MPU->CTRL = (1 << 2) | (1 << 0);  //enable PRIVDEFENA
289
-  SCB->SHCSR |= 1 << 16;		        //enable MemManage
289
+  SCB->SHCSR |= 1 << 16;            //enable MemManage
290 290
   return 0;
291 291
 }
292 292
 
293 293
 void MPU_Memory_Protection(void)
294 294
 {
295
-	MPU_Set_Protection(0x20000000, 128 * 1024, 1, MPU_REGION_FULL_ACCESS, 0, 1, 1);       // protect DTCM 128k,  Sharing is prohibited, cache is allowed, and buffering is allowed
295
+  MPU_Set_Protection(0x20000000, 128 * 1024, 1, MPU_REGION_FULL_ACCESS, 0, 1, 1);       // protect DTCM 128k,  Sharing is prohibited, cache is allowed, and buffering is allowed
296 296
 
297
-	MPU_Set_Protection(0x24000000, 512 * 1024, 2, MPU_REGION_FULL_ACCESS, 0, 1, 1);       // protect AXI SRAM,  Sharing is prohibited, cache is allowed, and buffering is allowed
298
-	MPU_Set_Protection(0x30000000, 512 * 1024, 3, MPU_REGION_FULL_ACCESS, 0, 1, 1);       // protect SRAM1~SRAM3, Sharing is prohibited, cache is allowed, and buffering is allowed
299
-	MPU_Set_Protection(0x38000000, 64 * 1024, 4, MPU_REGION_FULL_ACCESS, 0, 1, 1);        // protect SRAM4, Sharing is prohibited, cache is allowed, and buffering is allowed
297
+  MPU_Set_Protection(0x24000000, 512 * 1024, 2, MPU_REGION_FULL_ACCESS, 0, 1, 1);       // protect AXI SRAM,  Sharing is prohibited, cache is allowed, and buffering is allowed
298
+  MPU_Set_Protection(0x30000000, 512 * 1024, 3, MPU_REGION_FULL_ACCESS, 0, 1, 1);       // protect SRAM1~SRAM3, Sharing is prohibited, cache is allowed, and buffering is allowed
299
+  MPU_Set_Protection(0x38000000, 64 * 1024, 4, MPU_REGION_FULL_ACCESS, 0, 1, 1);        // protect SRAM4, Sharing is prohibited, cache is allowed, and buffering is allowed
300 300
 
301
-	MPU_Set_Protection(0x60000000, 64 * 1024 * 1024, 5, MPU_REGION_FULL_ACCESS, 0, 0, 0);   // protect LCD FMC  64M, No sharing, no cache, no buffering
302
-	MPU_Set_Protection(0XC0000000, 32 * 1024 * 1024, 6, MPU_REGION_FULL_ACCESS, 0, 1, 1);   // protect SDRAM  32M, Sharing is prohibited, cache is allowed, and buffering is allowed
303
-	MPU_Set_Protection(0X80000000, 256 * 1024 * 1024, 7, MPU_REGION_FULL_ACCESS, 0, 0, 0);  // protect NAND FLASH 256M, No sharing, no cache, no buffering
301
+  MPU_Set_Protection(0x60000000, 64 * 1024 * 1024, 5, MPU_REGION_FULL_ACCESS, 0, 0, 0);   // protect LCD FMC  64M, No sharing, no cache, no buffering
302
+  MPU_Set_Protection(0XC0000000, 32 * 1024 * 1024, 6, MPU_REGION_FULL_ACCESS, 0, 1, 1);   // protect SDRAM  32M, Sharing is prohibited, cache is allowed, and buffering is allowed
303
+  MPU_Set_Protection(0X80000000, 256 * 1024 * 1024, 7, MPU_REGION_FULL_ACCESS, 0, 0, 0);  // protect NAND FLASH 256M, No sharing, no cache, no buffering
304 304
 }
305 305
 
306 306
 /**

+ 10
- 10
buildroot/share/PlatformIO/variants/MARLIN_F103Rx/PeripheralPins.c View File

@@ -136,7 +136,7 @@ WEAK const PinMap PinMap_PWM[] = {
136 136
 #endif
137 137
   {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3
138 138
   // {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
139
-#if defined(STM32F103xG)
139
+#ifdef STM32F103xG
140 140
   // {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3
141 141
 #endif
142 142
 #if defined(STM32F103xE) || defined(STM32F103xG)
@@ -148,11 +148,11 @@ WEAK const PinMap PinMap_PWM[] = {
148 148
 #else
149 149
   {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
150 150
 #endif
151
-#if defined(STM32F103xG)
151
+#ifdef STM32F103xG
152 152
   // {PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2
153 153
 #endif
154 154
   {PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
155
-#if defined(STM32F103xG)
155
+#ifdef STM32F103xG
156 156
   // {PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1
157 157
 #endif
158 158
   // {PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
@@ -161,7 +161,7 @@ WEAK const PinMap PinMap_PWM[] = {
161 161
 #else
162 162
   {PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
163 163
 #endif
164
-#if defined(STM32F103xG)
164
+#ifdef STM32F103xG
165 165
   // {PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1
166 166
 #endif
167 167
   {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1
@@ -196,10 +196,10 @@ WEAK const PinMap PinMap_PWM[] = {
196 196
   {PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
197 197
   {PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
198 198
 #endif
199
-#if defined(STM32F103xG)
199
+#ifdef STM32F103xG
200 200
   // {PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1
201 201
 #endif
202
-#if defined(STM32F103xG)
202
+#ifdef STM32F103xG
203 203
   // {PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1
204 204
 #endif
205 205
   {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
@@ -208,11 +208,11 @@ WEAK const PinMap PinMap_PWM[] = {
208 208
   // {PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
209 209
   {PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
210 210
   {PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
211
-#if defined(STM32F103xG)
211
+#ifdef STM32F103xG
212 212
   // {PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1
213 213
 #endif
214 214
   {PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
215
-#if defined(STM32F103xG)
215
+#ifdef STM32F103xG
216 216
   // {PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2
217 217
 #endif
218 218
   {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1
@@ -249,7 +249,7 @@ WEAK const PinMap PinMap_UART_TX[] = {
249 249
 #if defined(STM32F103xE) || defined(STM32F103xG)
250 250
   {PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
251 251
 #endif
252
-#if defined(STM32F103xB)
252
+#ifdef STM32F103xB
253 253
   {PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
254 254
 #endif
255 255
 #if defined(STM32F103xE) || defined(STM32F103xG)
@@ -270,7 +270,7 @@ WEAK const PinMap PinMap_UART_RX[] = {
270 270
 #if defined(STM32F103xE) || defined(STM32F103xG)
271 271
   {PC_11, UART4,   STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
272 272
 #endif
273
-#if defined(STM32F103xB)
273
+#ifdef STM32F103xB
274 274
   {PC_11, USART3,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
275 275
 #endif
276 276
 #if defined(STM32F103xE) || defined(STM32F103xG)

+ 1
- 1
buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h View File

@@ -171,7 +171,7 @@ extern "C" {
171 171
 * Activated: CRC code is present inside driver
172 172
 * Deactivated: CRC code cleaned from driver
173 173
 */
174
-#if !defined(USE_SPI_CRC)
174
+#ifndef USE_SPI_CRC
175 175
 #define USE_SPI_CRC 0
176 176
 #endif
177 177
 

+ 1
- 1
buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h View File

@@ -139,7 +139,7 @@ extern "C" {
139 139
 #define PIN_SERIAL2_TX          PA2
140 140
 
141 141
 // Extra HAL modules
142
-#if defined(STM32F103xE)
142
+#ifdef STM32F103xE
143 143
 //#define HAL_DAC_MODULE_ENABLED (unused or maybe for the eeprom write?)
144 144
 #define HAL_SD_MODULE_ENABLED
145 145
 #define HAL_SRAM_MODULE_ENABLED

+ 8
- 8
buildroot/share/PlatformIO/variants/MARLIN_F103Vx/PeripheralPins.c View File

@@ -143,17 +143,17 @@ WEAK const PinMap PinMap_PWM[] = {
143 143
 #else
144 144
   {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
145 145
 #endif
146
-#if defined(STM32F103xG)
146
+#ifdef STM32F103xG
147 147
   //{PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2
148 148
 #endif
149 149
   {PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
150
-#if defined(STM32F103xG)
150
+#ifdef STM32F103xG
151 151
   //{PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1
152 152
 #endif
153 153
   {PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
154 154
   //{PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
155 155
   //{PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N
156
-#if defined(STM32F103xG)
156
+#ifdef STM32F103xG
157 157
   //{PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1
158 158
 #endif
159 159
   {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1
@@ -185,11 +185,11 @@ WEAK const PinMap PinMap_PWM[] = {
185 185
   {PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1
186 186
   {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2
187 187
   {PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
188
-#if defined(STM32F103xG)
188
+#ifdef STM32F103xG
189 189
   //{PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1
190 190
 #endif
191 191
   {PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
192
-#if defined(STM32F103xG)
192
+#ifdef STM32F103xG
193 193
   //{PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1
194 194
 #endif
195 195
   {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
@@ -198,11 +198,11 @@ WEAK const PinMap PinMap_PWM[] = {
198 198
   //{PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
199 199
   {PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
200 200
   {PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
201
-#if defined(STM32F103xG)
201
+#ifdef STM32F103xG
202 202
   //{PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1
203 203
 #endif
204 204
   {PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
205
-#if defined(STM32F103xG)
205
+#ifdef STM32F103xG
206 206
   //{PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2
207 207
 #endif
208 208
   {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1
@@ -223,7 +223,7 @@ WEAK const PinMap PinMap_PWM[] = {
223 223
   {PD_13, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2
224 224
   {PD_14, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3
225 225
   {PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4
226
-#if defined(STM32F103xG)
226
+#ifdef STM32F103xG
227 227
   {PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1
228 228
   {PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2
229 229
 #endif

+ 8
- 8
buildroot/share/PlatformIO/variants/MARLIN_F103Zx/hal_conf_custom.h View File

@@ -81,15 +81,15 @@ extern "C" {
81 81
   *        This value is used by the RCC HAL module to compute the system frequency
82 82
   *        (when HSE is used as system clock source, directly or through the PLL).
83 83
   */
84
-#if !defined  (HSE_VALUE)
85
-#if defined(USE_STM3210C_EVAL)
84
+#ifndef HSE_VALUE
85
+#ifdef USE_STM3210C_EVAL
86 86
 #define HSE_VALUE    25000000U /*!< Value of the External oscillator in Hz */
87 87
 #else
88 88
 #define HSE_VALUE    8000000U /*!< Value of the External oscillator in Hz */
89 89
 #endif
90 90
 #endif /* HSE_VALUE */
91 91
 
92
-#if !defined  (HSE_STARTUP_TIMEOUT)
92
+#ifndef HSE_STARTUP_TIMEOUT
93 93
 #define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
94 94
 #endif /* HSE_STARTUP_TIMEOUT */
95 95
 
@@ -98,14 +98,14 @@ extern "C" {
98 98
   *        This value is used by the RCC HAL module to compute the system frequency
99 99
   *        (when HSI is used as system clock source, directly or through the PLL).
100 100
   */
101
-#if !defined  (HSI_VALUE)
101
+#ifndef HSI_VALUE
102 102
 #define HSI_VALUE              8000000U  /*!< Value of the Internal oscillator in Hz */
103 103
 #endif /* HSI_VALUE */
104 104
 
105 105
 /**
106 106
   * @brief Internal Low Speed oscillator (LSI) value.
107 107
   */
108
-#if !defined  (LSI_VALUE)
108
+#ifndef LSI_VALUE
109 109
 #define LSI_VALUE               40000U     /*!< LSI Typical Value in Hz */
110 110
 #endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
111 111
                                                 The real value may vary depending on the variations
@@ -114,11 +114,11 @@ extern "C" {
114 114
   * @brief External Low Speed oscillator (LSE) value.
115 115
   *        This value is used by the UART, RTC HAL module to compute the system frequency
116 116
   */
117
-#if !defined  (LSE_VALUE)
117
+#ifndef LSE_VALUE
118 118
 #define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
119 119
 #endif /* LSE_VALUE */
120 120
 
121
-#if !defined  (LSE_STARTUP_TIMEOUT)
121
+#ifndef LSE_STARTUP_TIMEOUT
122 122
 #define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
123 123
 #endif /* LSE_STARTUP_TIMEOUT */
124 124
 
@@ -129,7 +129,7 @@ extern "C" {
129 129
 /**
130 130
   * @brief This is the HAL system configuration section
131 131
   */
132
-#if !defined(VDD_VALUE)
132
+#ifndef VDD_VALUE
133 133
 #define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
134 134
 #endif
135 135
 #if !defined (TICK_INT_PRIORITY)

+ 7
- 7
buildroot/share/PlatformIO/variants/MARLIN_F4x7Vx/hal_conf_extra.h View File

@@ -91,11 +91,11 @@
91 91
   *        This value is used by the RCC HAL module to compute the system frequency
92 92
   *        (when HSE is used as system clock source, directly or through the PLL).
93 93
   */
94
-#if !defined  (HSE_VALUE)
94
+#ifndef HSE_VALUE
95 95
   #define HSE_VALUE              25000000U /*!< Value of the External oscillator in Hz */
96 96
 #endif /* HSE_VALUE */
97 97
 
98
-#if !defined  (HSE_STARTUP_TIMEOUT)
98
+#ifndef HSE_STARTUP_TIMEOUT
99 99
   #define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
100 100
 #endif /* HSE_STARTUP_TIMEOUT */
101 101
 
@@ -104,14 +104,14 @@
104 104
   *        This value is used by the RCC HAL module to compute the system frequency
105 105
   *        (when HSI is used as system clock source, directly or through the PLL).
106 106
   */
107
-#if !defined  (HSI_VALUE)
107
+#ifndef HSI_VALUE
108 108
   #define HSI_VALUE              16000000U /*!< Value of the Internal oscillator in Hz */
109 109
 #endif /* HSI_VALUE */
110 110
 
111 111
 /**
112 112
   * @brief Internal Low Speed oscillator (LSI) value.
113 113
   */
114
-#if !defined  (LSI_VALUE)
114
+#ifndef LSI_VALUE
115 115
  #define LSI_VALUE               32000U    /*!< LSI Typical Value in Hz */
116 116
 #endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
117 117
                                                 The real value may vary depending on the variations
@@ -119,11 +119,11 @@
119 119
 /**
120 120
   * @brief External Low Speed oscillator (LSE) value.
121 121
   */
122
-#if !defined  (LSE_VALUE)
122
+#ifndef LSE_VALUE
123 123
  #define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
124 124
 #endif /* LSE_VALUE */
125 125
 
126
-#if !defined  (LSE_STARTUP_TIMEOUT)
126
+#ifndef LSE_STARTUP_TIMEOUT
127 127
   #define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
128 128
 #endif /* LSE_STARTUP_TIMEOUT */
129 129
 
@@ -132,7 +132,7 @@
132 132
   *        This value is used by the I2S HAL module to compute the I2S clock source
133 133
   *        frequency, this source is inserted directly through I2S_CKIN pad.
134 134
   */
135
-#if !defined  (EXTERNAL_CLOCK_VALUE)
135
+#ifndef EXTERNAL_CLOCK_VALUE
136 136
   #define EXTERNAL_CLOCK_VALUE     12288000U /*!< Value of the External oscillator in Hz*/
137 137
 #endif /* EXTERNAL_CLOCK_VALUE */
138 138
 

+ 1
- 1
buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/PeripheralPins.c View File

@@ -15,7 +15,7 @@
15 15
  * STM32G0C1R(C-E)IxN.xml, STM32G0C1R(C-E)TxN.xml
16 16
  * CubeMX DB release 6.0.30
17 17
  */
18
-#if !defined(CUSTOM_PERIPHERAL_PINS)
18
+#ifndef CUSTOM_PERIPHERAL_PINS
19 19
 #include "Arduino.h"
20 20
 #include "PeripheralPins.h"
21 21
 

+ 1
- 1
buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp View File

@@ -11,7 +11,7 @@
11 11
  *******************************************************************************
12 12
  */
13 13
 
14
-#if defined(STM32G0B1xx)
14
+#ifdef STM32G0B1xx
15 15
 #include "pins_arduino.h"
16 16
 
17 17
 // Digital PinName array

+ 1
- 1
buildroot/share/PlatformIO/variants/MARLIN_H743Vx/PeripheralPins.c View File

@@ -17,7 +17,7 @@
17 17
  * STM32H753VIHx.xml, STM32H753VITx.xml
18 18
  * CubeMX DB release 6.0.30
19 19
  */
20
-#if !defined(CUSTOM_PERIPHERAL_PINS)
20
+#ifndef CUSTOM_PERIPHERAL_PINS
21 21
 #include "Arduino.h"
22 22
 #include "PeripheralPins.h"
23 23
 

+ 1
- 1
buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.cpp View File

@@ -10,7 +10,7 @@
10 10
  *
11 11
  *******************************************************************************
12 12
  */
13
-#if defined(STM32H743xx)
13
+#ifdef STM32H743xx
14 14
 #include "pins_arduino.h"
15 15
 
16 16
 // Digital PinName array

+ 4
- 4
buildroot/share/PlatformIO/variants/MARLIN_H743Vx/variant_MARLIN_STM32H743VX.h View File

@@ -226,16 +226,16 @@
226 226
 #endif
227 227
 
228 228
 // Extra HAL modules
229
-#if !defined(HAL_DAC_MODULE_DISABLED)
229
+#ifndef HAL_DAC_MODULE_DISABLED
230 230
   #define HAL_DAC_MODULE_ENABLED
231 231
 #endif
232
-#if !defined(HAL_ETH_MODULE_DISABLED)
232
+#ifndef HAL_ETH_MODULE_DISABLED
233 233
   #define HAL_ETH_MODULE_ENABLED
234 234
 #endif
235
-#if !defined(HAL_QSPI_MODULE_DISABLED)
235
+#ifndef HAL_QSPI_MODULE_DISABLED
236 236
   #define HAL_QSPI_MODULE_ENABLED
237 237
 #endif
238
-#if !defined(HAL_SD_MODULE_DISABLED)
238
+#ifndef HAL_SD_MODULE_DISABLED
239 239
   #define HAL_SD_MODULE_ENABLED
240 240
 #endif
241 241
 

+ 7
- 7
buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_V2/hal_conf_extra.h View File

@@ -91,11 +91,11 @@
91 91
   *        This value is used by the RCC HAL module to compute the system frequency
92 92
   *        (when HSE is used as system clock source, directly or through the PLL).
93 93
   */
94
-#if !defined  (HSE_VALUE)
94
+#ifndef HSE_VALUE
95 95
   #define HSE_VALUE              25000000U /*!< Value of the External oscillator in Hz */
96 96
 #endif /* HSE_VALUE */
97 97
 
98
-#if !defined  (HSE_STARTUP_TIMEOUT)
98
+#ifndef HSE_STARTUP_TIMEOUT
99 99
   #define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
100 100
 #endif /* HSE_STARTUP_TIMEOUT */
101 101
 
@@ -104,14 +104,14 @@
104 104
   *        This value is used by the RCC HAL module to compute the system frequency
105 105
   *        (when HSI is used as system clock source, directly or through the PLL).
106 106
   */
107
-#if !defined  (HSI_VALUE)
107
+#ifndef HSI_VALUE
108 108
   #define HSI_VALUE              16000000U /*!< Value of the Internal oscillator in Hz */
109 109
 #endif /* HSI_VALUE */
110 110
 
111 111
 /**
112 112
   * @brief Internal Low Speed oscillator (LSI) value.
113 113
   */
114
-#if !defined  (LSI_VALUE)
114
+#ifndef LSI_VALUE
115 115
  #define LSI_VALUE               32000U    /*!< LSI Typical Value in Hz */
116 116
 #endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
117 117
                                                 The real value may vary depending on the variations
@@ -119,11 +119,11 @@
119 119
 /**
120 120
   * @brief External Low Speed oscillator (LSE) value.
121 121
   */
122
-#if !defined  (LSE_VALUE)
122
+#ifndef LSE_VALUE
123 123
  #define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
124 124
 #endif /* LSE_VALUE */
125 125
 
126
-#if !defined  (LSE_STARTUP_TIMEOUT)
126
+#ifndef LSE_STARTUP_TIMEOUT
127 127
   #define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
128 128
 #endif /* LSE_STARTUP_TIMEOUT */
129 129
 
@@ -132,7 +132,7 @@
132 132
   *        This value is used by the I2S HAL module to compute the I2S clock source
133 133
   *        frequency, this source is inserted directly through I2S_CKIN pad.
134 134
   */
135
-#if !defined  (EXTERNAL_CLOCK_VALUE)
135
+#ifndef EXTERNAL_CLOCK_VALUE
136 136
   #define EXTERNAL_CLOCK_VALUE     12288000U /*!< Value of the External oscillator in Hz*/
137 137
 #endif /* EXTERNAL_CLOCK_VALUE */
138 138
 

+ 78
- 78
buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/board.cpp View File

@@ -131,74 +131,74 @@ extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
131 131
   {&gpioc,   NULL, NULL, 14, 0, ADCx}, /* PC14 OSC32_IN */
132 132
   {&gpioc,   NULL, NULL, 15, 0, ADCx}, /* PC15 OSC32_OUT */
133 133
 
134
-	{&gpiod,   NULL, NULL,   0, 0, ADCx} , /* PD0 OSC_IN */
135
-	{&gpiod,   NULL, NULL,   1, 0, ADCx} , /* PD1  OSC_OUT */
136
-	{&gpiod,   NULL, NULL,   2, 0, ADCx} , /* PD2  TIM3_ETR/UART5_RX SDIO_CMD */
137
-
138
-	{&gpiod,   NULL, NULL,   3, 0, ADCx} , /* PD3  FSMC_CLK */
139
-	{&gpiod,   NULL, NULL,   4, 0, ADCx} , /* PD4  FSMC_NOE */
140
-	{&gpiod,   NULL, NULL,   5, 0, ADCx} , /* PD5  FSMC_NWE */
141
-	{&gpiod,   NULL, NULL,   6, 0, ADCx} , /* PD6  FSMC_NWAIT */
142
-	{&gpiod,   NULL, NULL,   7, 0, ADCx} , /* PD7  FSMC_NE1/FSMC_NCE2 */
143
-	{&gpiod,   NULL, NULL,   8, 0, ADCx} , /* PD8  FSMC_D13 */
144
-	{&gpiod,   NULL, NULL,   9, 0, ADCx} , /* PD9  FSMC_D14 */
145
-	{&gpiod,   NULL, NULL,  10, 0, ADCx} , /* PD10  FSMC_D15 */
146
-	{&gpiod,   NULL, NULL,  11, 0, ADCx} , /* PD11  FSMC_A16 */
147
-	{&gpiod,   NULL, NULL,  12, 0, ADCx} , /* PD12  FSMC_A17 */
148
-	{&gpiod,   NULL, NULL,  13, 0, ADCx} , /* PD13  FSMC_A18 */
149
-	{&gpiod,   NULL, NULL,  14, 0, ADCx} , /* PD14  FSMC_D0 */
150
-	{&gpiod,   NULL, NULL,  15, 0, ADCx} , /* PD15  FSMC_D1 */
151
-
152
-	{&gpioe,   NULL, NULL,   0, 0, ADCx} , /* PE0   */
153
-	{&gpioe,   NULL, NULL,   1, 0, ADCx} , /* PE1   */
154
-	{&gpioe,   NULL, NULL,   2, 0, ADCx} , /* PE2   */
155
-	{&gpioe,   NULL, NULL,   3, 0, ADCx} , /* PE3   */
156
-	{&gpioe,   NULL, NULL,   4, 0, ADCx} , /* PE4   */
157
-	{&gpioe,   NULL, NULL,   5, 0, ADCx} , /* PE5   */
158
-	{&gpioe,   NULL, NULL,   6, 0, ADCx} , /* PE6   */
159
-	{&gpioe,   NULL, NULL,   7, 0, ADCx} , /* PE7   */
160
-	{&gpioe,   NULL, NULL,   8, 0, ADCx} , /* PE8   */
161
-	{&gpioe,   NULL, NULL,   9, 0, ADCx} , /* PE9   */
162
-	{&gpioe,   NULL, NULL,  10, 0, ADCx} , /* PE10  */
163
-	{&gpioe,   NULL, NULL,  11, 0, ADCx} , /* PE11  */
164
-	{&gpioe,   NULL, NULL,  12, 0, ADCx} , /* PE12  */
165
-	{&gpioe,   NULL, NULL,  13, 0, ADCx} , /* PE13  */
166
-	{&gpioe,   NULL, NULL,  14, 0, ADCx} , /* PE14  */
167
-	{&gpioe,   NULL, NULL,  15, 0, ADCx} , /* PE15  */
168
-
169
-	{&gpiof,   NULL, NULL,   0, 0, ADCx} , /* PF0   */
170
-	{&gpiof,   NULL, NULL,   1, 0, ADCx} , /* PF1   */
171
-	{&gpiof,   NULL, NULL,   2, 0, ADCx} , /* PF2   */
172
-	{&gpiof,   NULL, NULL,   3, 0, ADCx} , /* PF3   */
173
-	{&gpiof,   NULL, NULL,   4, 0, ADCx} , /* PF4   */
174
-	{&gpiof,   NULL, NULL,   5, 0, ADCx} , /* PF5   */
175
-	{&gpiof,   NULL, NULL,   6, 0, ADCx} , /* PF6   */
176
-	{&gpiof,   NULL, NULL,   7, 0, ADCx} , /* PF7   */
177
-	{&gpiof,   NULL, NULL,   8, 0, ADCx} , /* PF8   */
178
-	{&gpiof,   NULL, NULL,   9, 0, ADCx} , /* PF9   */
179
-	{&gpiof,   NULL, NULL,  10, 0, ADCx} , /* PF10  */
180
-	{&gpiof,   NULL, NULL,  11, 0, ADCx} , /* PF11  */
181
-	{&gpiof,   NULL, NULL,  12, 0, ADCx} , /* PF12  */
182
-	{&gpiof,   NULL, NULL,  13, 0, ADCx} , /* PF13  */
183
-	{&gpiof,   NULL, NULL,  14, 0, ADCx} , /* PF14  */
184
-	{&gpiof,   NULL, NULL,  15, 0, ADCx} , /* PF15  */
185
-
186
-	{&gpiog,   NULL, NULL,   0, 0, ADCx} , /* PG0   */
187
-	{&gpiog,   NULL, NULL,   1, 0, ADCx} , /* PG1   */
188
-	{&gpiog,   NULL, NULL,   2, 0, ADCx} , /* PG2   */
189
-	{&gpiog,   NULL, NULL,   3, 0, ADCx} , /* PG3   */
190
-	{&gpiog,   NULL, NULL,   4, 0, ADCx} , /* PG4   */
191
-	{&gpiog,   NULL, NULL,   5, 0, ADCx} , /* PG5   */
192
-	{&gpiog,   NULL, NULL,   6, 0, ADCx} , /* PG6   */
193
-	{&gpiog,   NULL, NULL,   7, 0, ADCx} , /* PG7   */
194
-	{&gpiog,   NULL, NULL,   8, 0, ADCx} , /* PG8   */
195
-	{&gpiog,   NULL, NULL,   9, 0, ADCx} , /* PG9   */
196
-	{&gpiog,   NULL, NULL,  10, 0, ADCx} , /* PG10  */
197
-	{&gpiog,   NULL, NULL,  11, 0, ADCx} , /* PG11  */
198
-	{&gpiog,   NULL, NULL,  12, 0, ADCx} , /* PG12  */
199
-	{&gpiog,   NULL, NULL,  13, 0, ADCx} , /* PG13  */
200
-	{&gpiog,   NULL, NULL,  14, 0, ADCx} , /* PG14  */
201
-	{&gpiog,   NULL, NULL,  15, 0, ADCx}   /* PG15  */
134
+  {&gpiod,   NULL, NULL,   0, 0, ADCx} , /* PD0 OSC_IN */
135
+  {&gpiod,   NULL, NULL,   1, 0, ADCx} , /* PD1  OSC_OUT */
136
+  {&gpiod,   NULL, NULL,   2, 0, ADCx} , /* PD2  TIM3_ETR/UART5_RX SDIO_CMD */
137
+
138
+  {&gpiod,   NULL, NULL,   3, 0, ADCx} , /* PD3  FSMC_CLK */
139
+  {&gpiod,   NULL, NULL,   4, 0, ADCx} , /* PD4  FSMC_NOE */
140
+  {&gpiod,   NULL, NULL,   5, 0, ADCx} , /* PD5  FSMC_NWE */
141
+  {&gpiod,   NULL, NULL,   6, 0, ADCx} , /* PD6  FSMC_NWAIT */
142
+  {&gpiod,   NULL, NULL,   7, 0, ADCx} , /* PD7  FSMC_NE1/FSMC_NCE2 */
143
+  {&gpiod,   NULL, NULL,   8, 0, ADCx} , /* PD8  FSMC_D13 */
144
+  {&gpiod,   NULL, NULL,   9, 0, ADCx} , /* PD9  FSMC_D14 */
145
+  {&gpiod,   NULL, NULL,  10, 0, ADCx} , /* PD10  FSMC_D15 */
146
+  {&gpiod,   NULL, NULL,  11, 0, ADCx} , /* PD11  FSMC_A16 */
147
+  {&gpiod,   NULL, NULL,  12, 0, ADCx} , /* PD12  FSMC_A17 */
148
+  {&gpiod,   NULL, NULL,  13, 0, ADCx} , /* PD13  FSMC_A18 */
149
+  {&gpiod,   NULL, NULL,  14, 0, ADCx} , /* PD14  FSMC_D0 */
150
+  {&gpiod,   NULL, NULL,  15, 0, ADCx} , /* PD15  FSMC_D1 */
151
+
152
+  {&gpioe,   NULL, NULL,   0, 0, ADCx} , /* PE0   */
153
+  {&gpioe,   NULL, NULL,   1, 0, ADCx} , /* PE1   */
154
+  {&gpioe,   NULL, NULL,   2, 0, ADCx} , /* PE2   */
155
+  {&gpioe,   NULL, NULL,   3, 0, ADCx} , /* PE3   */
156
+  {&gpioe,   NULL, NULL,   4, 0, ADCx} , /* PE4   */
157
+  {&gpioe,   NULL, NULL,   5, 0, ADCx} , /* PE5   */
158
+  {&gpioe,   NULL, NULL,   6, 0, ADCx} , /* PE6   */
159
+  {&gpioe,   NULL, NULL,   7, 0, ADCx} , /* PE7   */
160
+  {&gpioe,   NULL, NULL,   8, 0, ADCx} , /* PE8   */
161
+  {&gpioe,   NULL, NULL,   9, 0, ADCx} , /* PE9   */
162
+  {&gpioe,   NULL, NULL,  10, 0, ADCx} , /* PE10  */
163
+  {&gpioe,   NULL, NULL,  11, 0, ADCx} , /* PE11  */
164
+  {&gpioe,   NULL, NULL,  12, 0, ADCx} , /* PE12  */
165
+  {&gpioe,   NULL, NULL,  13, 0, ADCx} , /* PE13  */
166
+  {&gpioe,   NULL, NULL,  14, 0, ADCx} , /* PE14  */
167
+  {&gpioe,   NULL, NULL,  15, 0, ADCx} , /* PE15  */
168
+
169
+  {&gpiof,   NULL, NULL,   0, 0, ADCx} , /* PF0   */
170
+  {&gpiof,   NULL, NULL,   1, 0, ADCx} , /* PF1   */
171
+  {&gpiof,   NULL, NULL,   2, 0, ADCx} , /* PF2   */
172
+  {&gpiof,   NULL, NULL,   3, 0, ADCx} , /* PF3   */
173
+  {&gpiof,   NULL, NULL,   4, 0, ADCx} , /* PF4   */
174
+  {&gpiof,   NULL, NULL,   5, 0, ADCx} , /* PF5   */
175
+  {&gpiof,   NULL, NULL,   6, 0, ADCx} , /* PF6   */
176
+  {&gpiof,   NULL, NULL,   7, 0, ADCx} , /* PF7   */
177
+  {&gpiof,   NULL, NULL,   8, 0, ADCx} , /* PF8   */
178
+  {&gpiof,   NULL, NULL,   9, 0, ADCx} , /* PF9   */
179
+  {&gpiof,   NULL, NULL,  10, 0, ADCx} , /* PF10  */
180
+  {&gpiof,   NULL, NULL,  11, 0, ADCx} , /* PF11  */
181
+  {&gpiof,   NULL, NULL,  12, 0, ADCx} , /* PF12  */
182
+  {&gpiof,   NULL, NULL,  13, 0, ADCx} , /* PF13  */
183
+  {&gpiof,   NULL, NULL,  14, 0, ADCx} , /* PF14  */
184
+  {&gpiof,   NULL, NULL,  15, 0, ADCx} , /* PF15  */
185
+
186
+  {&gpiog,   NULL, NULL,   0, 0, ADCx} , /* PG0   */
187
+  {&gpiog,   NULL, NULL,   1, 0, ADCx} , /* PG1   */
188
+  {&gpiog,   NULL, NULL,   2, 0, ADCx} , /* PG2   */
189
+  {&gpiog,   NULL, NULL,   3, 0, ADCx} , /* PG3   */
190
+  {&gpiog,   NULL, NULL,   4, 0, ADCx} , /* PG4   */
191
+  {&gpiog,   NULL, NULL,   5, 0, ADCx} , /* PG5   */
192
+  {&gpiog,   NULL, NULL,   6, 0, ADCx} , /* PG6   */
193
+  {&gpiog,   NULL, NULL,   7, 0, ADCx} , /* PG7   */
194
+  {&gpiog,   NULL, NULL,   8, 0, ADCx} , /* PG8   */
195
+  {&gpiog,   NULL, NULL,   9, 0, ADCx} , /* PG9   */
196
+  {&gpiog,   NULL, NULL,  10, 0, ADCx} , /* PG10  */
197
+  {&gpiog,   NULL, NULL,  11, 0, ADCx} , /* PG11  */
198
+  {&gpiog,   NULL, NULL,  12, 0, ADCx} , /* PG12  */
199
+  {&gpiog,   NULL, NULL,  13, 0, ADCx} , /* PG13  */
200
+  {&gpiog,   NULL, NULL,  14, 0, ADCx} , /* PG14  */
201
+  {&gpiog,   NULL, NULL,  15, 0, ADCx}   /* PG15  */
202 202
 };
203 203
 
204 204
 /*  Basically everything that is defined as having a timer us PWM */
@@ -219,15 +219,15 @@ extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = {
219 219
 
220 220
 
221 221
 #ifdef SERIAL_USB
222
-	DEFINE_HWSERIAL(Serial1, 1);
223
-	DEFINE_HWSERIAL(Serial2, 2);
224
-	DEFINE_HWSERIAL(Serial3, 3);
225
-	DEFINE_HWSERIAL_UART(Serial4, 4);
226
-	DEFINE_HWSERIAL_UART(Serial5, 5);
222
+  DEFINE_HWSERIAL(Serial1, 1);
223
+  DEFINE_HWSERIAL(Serial2, 2);
224
+  DEFINE_HWSERIAL(Serial3, 3);
225
+  DEFINE_HWSERIAL_UART(Serial4, 4);
226
+  DEFINE_HWSERIAL_UART(Serial5, 5);
227 227
 #else
228
-	DEFINE_HWSERIAL(Serial, 1);
229
-	DEFINE_HWSERIAL(Serial1, 2);
230
-	DEFINE_HWSERIAL(Serial2, 3);
231
-	DEFINE_HWSERIAL_UART(Serial3, 4);
232
-	DEFINE_HWSERIAL_UART(Serial4, 5);
228
+  DEFINE_HWSERIAL(Serial, 1);
229
+  DEFINE_HWSERIAL(Serial1, 2);
230
+  DEFINE_HWSERIAL(Serial2, 3);
231
+  DEFINE_HWSERIAL_UART(Serial3, 4);
232
+  DEFINE_HWSERIAL_UART(Serial4, 5);
233 233
 #endif

+ 3
- 3
buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/wirish/boards.cpp View File

@@ -144,10 +144,10 @@ static void setup_clocks(void) {
144 144
  * present. If no bootloader is present, the user NVIC usually starts
145 145
  * at the Flash base address, 0x08000000.
146 146
  */
147
-#if defined(BOOTLOADER_maple)
148
-	#define USER_ADDR_ROM 0x08005000
147
+#ifdef BOOTLOADER_maple
148
+  #define USER_ADDR_ROM 0x08005000
149 149
 #else
150
-	#define USER_ADDR_ROM 0x08000000
150
+  #define USER_ADDR_ROM 0x08000000
151 151
 #endif
152 152
 #define USER_ADDR_RAM 0x20000C00
153 153
 extern char __text_start__;

+ 1
- 1
buildroot/share/PlatformIO/variants/marlin_maple_MEEB_3DP/wirish/boards.cpp View File

@@ -144,7 +144,7 @@ static void setup_clocks(void) {
144 144
  * present. If no bootloader is present, the user NVIC usually starts
145 145
  * at the Flash base address, 0x08000000.
146 146
  */
147
-#if defined(BOOTLOADER_maple)
147
+#ifdef BOOTLOADER_maple
148 148
   #define USER_ADDR_ROM 0x08002000
149 149
 #else
150 150
   #define USER_ADDR_ROM 0x08000000

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