Browse Source

Support Black STM32F407VET6 with RAMPS-like shield (#13524)

Alexander Gavrilenko 5 years ago
parent
commit
3c47e1b4d1

+ 3
- 1
Marlin/src/HAL/HAL_STM32/HAL.cpp View File

@@ -36,8 +36,10 @@
36 36
 #if ENABLED(EEPROM_EMULATED_WITH_SRAM)
37 37
   #if STM32F7xx
38 38
     #include "stm32f7xx_ll_pwr.h"
39
+  #elif STM32F4xx
40
+    #include "stm32f4xx_ll_pwr.h"
39 41
   #else
40
-    #error "EEPROM_EMULATED_WITH_SRAM is currently only supported for STM32F7xx"
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+    #error "EEPROM_EMULATED_WITH_SRAM is currently only supported for STM32F4xx and STM32F7xx"
41 43
   #endif
42 44
 #endif // EEPROM_EMULATED_WITH_SRAM
43 45
 

+ 2
- 0
Marlin/src/core/boards.h View File

@@ -253,6 +253,8 @@
253 253
 #define BOARD_STM32F4          1804   // STM32 STM32GENERIC based STM32F4 controller
254 254
 #define BOARD_ARMED            1807   // Arm'ed STM32F4 based controller
255 255
 #define BOARD_RUMBA32          1809   // RUMBA32 STM32F4 based controller
256
+#define BOARD_BLACK_STM32F407VE 1810  // BLACK_STM32F407VE
257
+#define BOARD_BLACK_STM32F407ZE 1811  // BLACK_STM32F407ZE
256 258
 #define BOARD_STEVAL           1866   // STEVAL-3DP001V1 3D PRINTER BOARD
257 259
 
258 260
 //

+ 5
- 1
Marlin/src/pins/pins.h View File

@@ -417,7 +417,7 @@
417 417
 #elif MB(MORPHEUS)
418 418
   #include "pins_MORPHEUS.h"          // STM32F1                                    env:STM32F1
419 419
 #elif MB(MKS_ROBIN)
420
-  #include "pins_MKS_ROBIN.h"         // STM32F1                                    env:STM32F1
420
+  #include "pins_MKS_ROBIN.h"         // STM32F1                                    env:mks_robin
421 421
 
422 422
 //
423 423
 // STM32 ARM Cortex-M4F
@@ -435,9 +435,13 @@
435 435
   #include "pins_ARMED.h"             // STM32F4                                    env:ARMED
436 436
 #elif MB(RUMBA32)
437 437
   #include "pins_RUMBA32.h"           // STM32F4                                    env:RUMBA32
438
+#elif MB(BLACK_STM32F407VE)
439
+  #include "pins_BLACK_STM32F407VE.h" // STM32F4                                    env:black_stm32f407ve
438 440
 #elif MB(STEVAL)
439 441
   #include "pins_STEVAL.h"            // STM32F4                                    env:STM32F4
440 442
 
443
+
444
+
441 445
 //
442 446
 // ARM Cortex M7
443 447
 //

+ 131
- 0
Marlin/src/pins/pins_BLACK_STM32F407VE.h View File

@@ -0,0 +1,131 @@
1
+/**
2
+ * Marlin 3D Printer Firmware
3
+ * Copyright (C) 2019 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
4
+ *
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+ * Based on Sprinter and grbl.
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+ * Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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+ *
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+ * This program is free software: you can redistribute it and/or modify
9
+ * it under the terms of the GNU General Public License as published by
10
+ * the Free Software Foundation, either version 3 of the License, or
11
+ * (at your option) any later version.
12
+ *
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+ * This program is distributed in the hope that it will be useful,
14
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
15
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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+ * GNU General Public License for more details.
17
+ *
18
+ * You should have received a copy of the GNU General Public License
19
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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+ *
21
+ */
22
+
23
+/**
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+ * STM32F407VET6 with RAMPS-like shield
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+ * 'Black' STM32F407VET6 board - http://wiki.stm32duino.com/index.php?title=STM32F407
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+ * Shield - https://github.com/jmz52/Hardware
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+ */
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+
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+#pragma once
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+
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+#if !defined(STM32F4) && !defined(STM32F4xx)
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+  #error "Oops! Select an STM32F4 board in 'Tools > Board.'"
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+#endif
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+
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+#define DEFAULT_MACHINE_NAME "STM32F407VET6"
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+//#define BOARD_NAME "Black STM32F4VET6"
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+
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+//#define I2C_EEPROM
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+//#define E2END 0x1FFF // EEPROM end address (8kB)
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+#define EEPROM_EMULATED_WITH_SRAM
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+
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+#if HOTENDS > 2 || E_STEPPERS > 2
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+  #error "Black STM32F4VET6 supports up to 2 hotends / E-steppers."
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+#endif
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+
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+//
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+// Servos
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+//
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+#define SERVO0_PIN         PC6
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+#define SERVO1_PIN         PC7
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+
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+//
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+// Limit Switches
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+//
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+#define X_MIN_PIN          PC13
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+#define X_MAX_PIN          PA15
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+#define Y_MIN_PIN          PA5
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+#define Y_MAX_PIN          PD12
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+#define Z_MIN_PIN          PD14
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+#define Z_MAX_PIN          PD15
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+
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+//
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+// Steppers
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+//
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+#define X_STEP_PIN         PC4
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+#define X_DIR_PIN          PA4
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+#define X_ENABLE_PIN       PE7
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+
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+#define Y_STEP_PIN         PE5
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+#define Y_DIR_PIN          PE2
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+#define Y_ENABLE_PIN       PE6
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+
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+#define Z_STEP_PIN         PD5
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+#define Z_DIR_PIN          PD3
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+#define Z_ENABLE_PIN       PD6
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+
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+#define E0_STEP_PIN        PD7
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+#define E0_DIR_PIN         PD0
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+#define E0_ENABLE_PIN      PB9
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+
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+#define E1_STEP_PIN        PE0
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+#define E1_DIR_PIN         PE1
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+#define E1_ENABLE_PIN      PB8
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+
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+//
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+// Temperature Sensors
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+//
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+#define TEMP_0_PIN         PC0  // T0
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+#define TEMP_1_PIN         PC1  // T1
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+#define TEMP_BED_PIN       PC2  // TB
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+#define TEMP_CHAMBER_PIN   PC3  // TC
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+
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+//
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+// Heaters / Fans
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+//
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+#define HEATER_0_PIN       PA2  // Heater0
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+#define HEATER_1_PIN       PA3  // Heater1
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+#define HEATER_BED_PIN     PA1  // Hotbed
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+
100
+#define FAN_PIN            PE9  // Fan0
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+#define FAN1_PIN           PE11 // Fan1
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+#define FAN2_PIN           PE13 // Fan2
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+#define FAN3_PIN           PE14 // Fan3
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+
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+//
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+// Misc. Functions
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+//
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+#define SDSS               PB12
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+#define LED_PIN            PA6
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+//#define LED_PIN          PA7
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+#define KILL_PIN           PB1
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+
113
+//
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+// LCD / Controller
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+//
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+#define SD_DETECT_PIN      PC5
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+//#define SD_DETECT_PIN      PA8  // SDIO SD_DETECT_PIN, external SDIO card reader only
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+
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+#define BEEPER_PIN         PD10
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+#define LCD_PINS_RS        PE15
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+#define LCD_PINS_ENABLE    PD8
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+#define LCD_PINS_D4        PE10
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+#define LCD_PINS_D5        PE12
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+#define LCD_PINS_D6        PD1
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+#define LCD_PINS_D7        PE8
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+#define BTN_ENC            PD9
127
+#define BTN_EN1            PD4
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+#define BTN_EN2            PD13
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+
130
+#define DOGLCD_CS          LCD_PINS_D5
131
+#define DOGLCD_A0          LCD_PINS_D6

+ 65
- 0
buildroot/share/PlatformIO/boards/blackSTM32F407VET6.json View File

@@ -0,0 +1,65 @@
1
+{
2
+  "build": {
3
+    "core": "stm32",
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+    "cpu": "cortex-m4",
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+    "extra_flags": "-DSTM32F407xx",
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+    "f_cpu": "168000000L",
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+    "hwids": [
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+      [
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+        "0x1EAF",
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+        "0x0003"
11
+      ],
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+      [
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+        "0x0483",
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+        "0x3748"
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+      ]
16
+    ],
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+    "ldscript": "stm32f407xe.ld",
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+    "mcu": "stm32f407vet6",
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+    "variant": "MARLIN_F407VE"
20
+  },
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+  "debug": {
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+    "jlink_device": "STM32F407VE",
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+    "openocd_target": "stm32f4x",
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+    "svd_path": "STM32F40x.svd",
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+    "tools": {
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+      "stlink": {
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+        "server": {
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+          "arguments": [
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+            "-f",
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+            "scripts/interface/stlink.cfg",
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+            "-c",
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+            "transport select hla_swd",
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+            "-f",
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+            "scripts/target/stm32f4x.cfg",
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+            "-c",
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+            "reset_config none"
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+          ],
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+          "executable": "bin/openocd",
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+          "package": "tool-openocd"
40
+        }
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+      }
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+    }
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+  },
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+  "frameworks": [
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+    "arduino",
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+    "stm32cube"
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+  ],
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+  "name": "STM32F407VE (192k RAM. 512k Flash)",
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+  "upload": {
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+    "disable_flushing": false,
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+    "maximum_ram_size": 131072,
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+    "maximum_size": 514288,
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+    "protocol": "stlink",
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+    "protocols": [
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+      "stlink",
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+      "dfu",
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+      "jlink"
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+    ],
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+    "require_upload_port": true,
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+    "use_1200bps_touch": false,
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+    "wait_for_upload_port": false
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+  },
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+  "url": "http://www.st.com/en/microcontrollers/stm32f407ve.html",
64
+  "vendor": "Generic"
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+}

+ 29
- 0
buildroot/share/PlatformIO/scripts/black_stm32f407vet6.py View File

@@ -0,0 +1,29 @@
1
+import os,shutil
2
+from SCons.Script import DefaultEnvironment
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+from platformio import util
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+
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+env = DefaultEnvironment()
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+platform = env.PioPlatform()
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+board = env.BoardConfig()
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+
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+FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32")
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+CMSIS_DIR = os.path.join(FRAMEWORK_DIR, "CMSIS", "CMSIS")
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+assert os.path.isdir(FRAMEWORK_DIR)
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+assert os.path.isdir(CMSIS_DIR)
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+assert os.path.isdir("buildroot/share/PlatformIO/variants")
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+
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+mcu_type = board.get("build.mcu")[:-2]
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+variant = board.get("build.variant")
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+series = mcu_type[:7].upper() + "xx"
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+variant_dir = os.path.join(FRAMEWORK_DIR, "variants", variant)
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+
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+source_dir = os.path.join("buildroot/share/PlatformIO/variants", variant)
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+assert os.path.isdir(source_dir)
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+
23
+if not os.path.isdir(variant_dir):
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+    os.mkdir(variant_dir)
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+
26
+for file_name in os.listdir(source_dir):
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+    full_file_name = os.path.join(source_dir, file_name)
28
+    if os.path.isfile(full_file_name):
29
+        shutil.copy(full_file_name, variant_dir)

+ 438
- 0
buildroot/share/PlatformIO/variants/MARLIN_F407VE/PeripheralPins.c View File

@@ -0,0 +1,438 @@
1
+/*
2
+ *******************************************************************************
3
+ * Copyright (c) 2019, STMicroelectronics
4
+ * All rights reserved.
5
+ *
6
+ * Redistribution and use in source and binary forms, with or without
7
+ * modification, are permitted provided that the following conditions are met:
8
+ *
9
+ * 1. Redistributions of source code must retain the above copyright notice,
10
+ *    this list of conditions and the following disclaimer.
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
15
+ *    may be used to endorse or promote products derived from this software
16
+ *    without specific prior written permission.
17
+ *
18
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
+ *******************************************************************************
29
+ * Automatically generated from STM32F407Z(E-G)Tx.xml
30
+ */
31
+#include "Arduino.h"
32
+#include "PeripheralPins.h"
33
+
34
+/* =====
35
+ * Note: Commented lines are alternative possibilities which are not used per default.
36
+ *       If you change them, you will have to know what you do
37
+ * =====
38
+ */
39
+
40
+//*** ADC ***
41
+
42
+#ifdef HAL_ADC_MODULE_ENABLED
43
+const PinMap PinMap_ADC[] = {
44
+  {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
45
+  //  {PA_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
46
+  //  {PA_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
47
+  {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
48
+  //  {PA_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
49
+  //  {PA_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
50
+  //  {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
51
+  {PA_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
52
+  //  {PA_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
53
+  //  {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
54
+  //  {PA_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
55
+  {PA_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
56
+  {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
57
+  //  {PA_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
58
+  //  {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
59
+  {PA_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
60
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
61
+  //  {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
62
+  //  {PA_6,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
63
+  //  {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
64
+  //  {PA_7,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
65
+  //  {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
66
+#endif
67
+  {PB_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
68
+  {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
69
+  //  {PB_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
70
+  //  {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
71
+  //  {PC_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
72
+  {PC_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
73
+  {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
74
+  //  {PC_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
75
+  //  {PC_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
76
+  //  {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
77
+  {PC_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
78
+  //  {PC_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
79
+  //  {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
80
+  //  {PC_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
81
+  {PC_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
82
+  //  {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
83
+  {PC_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
84
+  //  {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
85
+  {PC_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
86
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
87
+  //  {PF_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9
88
+  //  {PF_4,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14
89
+  //  {PF_5,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15
90
+  {PF_6,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4
91
+  {PF_7,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5
92
+  {PF_8,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6
93
+  //  {PF_9,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7
94
+  //  {PF_10, ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8
95
+#endif
96
+  {NC,    NP,    0}
97
+};
98
+#endif
99
+
100
+//*** DAC ***
101
+
102
+#ifdef HAL_DAC_MODULE_ENABLED
103
+const PinMap PinMap_DAC[] = {
104
+  {PA_4,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
105
+  {PA_5,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
106
+  {NC,    NP,    0}
107
+};
108
+#endif
109
+
110
+//*** I2C ***
111
+
112
+#ifdef HAL_I2C_MODULE_ENABLED
113
+const PinMap PinMap_I2C_SDA[] = {
114
+  {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
115
+  {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
116
+  {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
117
+  {PC_9,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
118
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
119
+  {PF_0,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
120
+#endif
121
+  {NC,    NP,    0}
122
+};
123
+#endif
124
+
125
+#ifdef HAL_I2C_MODULE_ENABLED
126
+const PinMap PinMap_I2C_SCL[] = {
127
+  {PA_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
128
+  {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
129
+  {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
130
+  {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
131
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
132
+  {PF_1,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
133
+#endif
134
+  {NC,    NP,    0}
135
+};
136
+#endif
137
+
138
+//*** PWM ***
139
+
140
+#ifdef HAL_TIM_MODULE_ENABLED
141
+const PinMap PinMap_PWM[] = {
142
+  {PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
143
+  //  {PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
144
+  {PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
145
+  //  {PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
146
+  {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
147
+  //  {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
148
+  //  {PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
149
+  {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
150
+  //  {PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
151
+  //  {PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
152
+  {PA_5,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
153
+  //  {PA_5,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
154
+  {PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
155
+  //  {PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
156
+  //  {PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
157
+  {PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
158
+  //  {PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
159
+  //  {PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
160
+  {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
161
+  {PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
162
+  {PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
163
+  {PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
164
+  //  {PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
165
+  //  {PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
166
+  {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
167
+  //  {PB_0,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
168
+  //  {PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
169
+  {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
170
+  //  {PB_1,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
171
+  //  {PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
172
+  {PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
173
+  {PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
174
+  {PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
175
+  {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
176
+  {PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
177
+  {PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
178
+  {PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
179
+  {PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
180
+  {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
181
+  {PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
182
+  {PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
183
+  {PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
184
+  {PB_14, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
185
+  {PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
186
+  {PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
187
+  {PB_15, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
188
+  {PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
189
+  {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
190
+  {PC_6,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
191
+  {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
192
+  {PC_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
193
+  {PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
194
+  {PC_8,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
195
+  {PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
196
+  {PC_9,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
197
+  {PD_12, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
198
+  {PD_13, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
199
+  {PD_14, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
200
+  {PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
201
+  {PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
202
+  {PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
203
+  {PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
204
+  {PE_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
205
+  {PE_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
206
+  {PE_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
207
+  {PE_12, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
208
+  {PE_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
209
+  {PE_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
210
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
211
+  {PF_6,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
212
+  {PF_7,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
213
+  {PF_8,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
214
+  {PF_9,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
215
+#endif
216
+  {NC,    NP,    0}
217
+};
218
+#endif
219
+
220
+//*** SERIAL ***
221
+
222
+#ifdef HAL_UART_MODULE_ENABLED
223
+const PinMap PinMap_UART_TX[] = {
224
+  {PA_0,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
225
+  {PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
226
+  {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
227
+  {PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
228
+  {PB_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
229
+  {PC_6,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
230
+  //  {PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
231
+  {PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
232
+  {PC_12, UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
233
+  {PD_5,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
234
+  {PD_8,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
235
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
236
+  //  {PG_14, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
237
+#endif
238
+  {NC,    NP,    0}
239
+};
240
+#endif
241
+
242
+#ifdef HAL_UART_MODULE_ENABLED
243
+const PinMap PinMap_UART_RX[] = {
244
+  {PA_1,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
245
+  {PA_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
246
+  {PA_10, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
247
+  {PB_7,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
248
+  {PB_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
249
+  {PC_7,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
250
+  //  {PC_11, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
251
+  {PC_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
252
+  {PD_2,  UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
253
+  {PD_6,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
254
+  {PD_9,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
255
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
256
+  //  {PG_9,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
257
+#endif
258
+  {NC,    NP,    0}
259
+};
260
+#endif
261
+
262
+#ifdef HAL_UART_MODULE_ENABLED
263
+const PinMap PinMap_UART_RTS[] = {
264
+  {PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
265
+  {PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
266
+  {PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
267
+  {PD_4,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
268
+  {PD_12, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
269
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
270
+  {PG_8,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
271
+  {PG_12, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
272
+#endif
273
+  {NC,    NP,    0}
274
+};
275
+#endif
276
+
277
+#ifdef HAL_UART_MODULE_ENABLED
278
+const PinMap PinMap_UART_CTS[] = {
279
+  {PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
280
+  {PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
281
+  {PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
282
+  {PD_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
283
+  {PD_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
284
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
285
+  {PG_13, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
286
+  {PG_15, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
287
+#endif
288
+  {NC,    NP,    0}
289
+};
290
+#endif
291
+
292
+//*** SPI ***
293
+
294
+#ifdef HAL_SPI_MODULE_ENABLED
295
+const PinMap PinMap_SPI_MOSI[] = {
296
+  {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
297
+  {PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
298
+  {PB_5,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
299
+  {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
300
+  {PC_3,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
301
+  {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
302
+  {NC,    NP,    0}
303
+};
304
+#endif
305
+
306
+#ifdef HAL_SPI_MODULE_ENABLED
307
+const PinMap PinMap_SPI_MISO[] = {
308
+  {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
309
+  {PB_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
310
+  {PB_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
311
+  {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
312
+  {PC_2,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
313
+  {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
314
+  {NC,    NP,    0}
315
+};
316
+#endif
317
+
318
+#ifdef HAL_SPI_MODULE_ENABLED
319
+const PinMap PinMap_SPI_SCLK[] = {
320
+  {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
321
+  {PB_3,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
322
+  {PB_3,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
323
+  {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
324
+  {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
325
+  {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
326
+  {NC,    NP,    0}
327
+};
328
+#endif
329
+
330
+#ifdef HAL_SPI_MODULE_ENABLED
331
+const PinMap PinMap_SPI_SSEL[] = {
332
+  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
333
+  {PA_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
334
+  {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
335
+  {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
336
+  {PB_9,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
337
+  {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
338
+  {NC,    NP,    0}
339
+};
340
+#endif
341
+
342
+//*** CAN ***
343
+
344
+#ifdef HAL_CAN_MODULE_ENABLED
345
+const PinMap PinMap_CAN_RD[] = {
346
+  {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
347
+  {PB_5,  CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
348
+  {PB_8,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
349
+  {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
350
+  {PD_0,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
351
+  {NC,    NP,    0}
352
+};
353
+#endif
354
+
355
+#ifdef HAL_CAN_MODULE_ENABLED
356
+const PinMap PinMap_CAN_TD[] = {
357
+  {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
358
+  {PB_6,  CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
359
+  {PB_9,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
360
+  {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
361
+  {PD_1,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
362
+  {NC,    NP,    0}
363
+};
364
+#endif
365
+
366
+//*** ETHERNET ***
367
+
368
+#ifdef HAL_ETH_MODULE_ENABLED
369
+const PinMap PinMap_Ethernet[] = {
370
+  {PA_0,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
371
+  {PA_1,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK
372
+  {PA_2,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
373
+  {PA_3,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
374
+  {PA_7,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV
375
+  {PB_0,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
376
+  {PB_1,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
377
+  {PB_5,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
378
+  {PB_8,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
379
+  {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
380
+  {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
381
+  {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
382
+  {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
383
+  {PC_1,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
384
+  {PC_2,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
385
+  {PC_3,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
386
+  {PC_4,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
387
+  {PC_5,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
388
+  {PE_2,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
389
+#if defined(ARDUINO_BLACK_F407ZE) || defined(ARDUINO_BLACK_F407ZG)
390
+  {PG_8,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
391
+  {PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
392
+  {PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
393
+  {PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
394
+#endif
395
+  {NC,    NP,    0}
396
+};
397
+#endif
398
+
399
+//*** No QUADSPI ***
400
+
401
+//*** USB ***
402
+
403
+#ifdef HAL_PCD_MODULE_ENABLED
404
+const PinMap PinMap_USB_OTG_FS[] = {
405
+  //  {PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
406
+  //  {PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
407
+  //  {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
408
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
409
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
410
+  {NC,    NP,    0}
411
+};
412
+#endif
413
+
414
+#ifdef HAL_PCD_MODULE_ENABLED
415
+const PinMap PinMap_USB_OTG_HS[] = {
416
+#ifdef USE_USB_HS_IN_FS
417
+  {PA_4,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF
418
+  {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
419
+  {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
420
+  {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
421
+  {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
422
+#else
423
+  {PA_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
424
+  {PA_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK
425
+  {PB_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
426
+  {PB_1,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
427
+  {PB_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
428
+  {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
429
+  {PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4
430
+  {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
431
+  {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
432
+  {PC_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
433
+  {PC_2,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
434
+  {PC_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
435
+#endif /* USE_USB_HS_IN_FS */
436
+  {NC,    NP,    0}
437
+};
438
+#endif

+ 50
- 0
buildroot/share/PlatformIO/variants/MARLIN_F407VE/PinNamesVar.h View File

@@ -0,0 +1,50 @@
1
+/* SYS_WKUP */
2
+#ifdef PWR_WAKEUP_PIN1
3
+SYS_WKUP1 = PA_0,
4
+#endif
5
+#ifdef PWR_WAKEUP_PIN2
6
+SYS_WKUP2 = NC,
7
+#endif
8
+#ifdef PWR_WAKEUP_PIN3
9
+SYS_WKUP3 = NC,
10
+#endif
11
+#ifdef PWR_WAKEUP_PIN4
12
+SYS_WKUP4 = NC,
13
+#endif
14
+#ifdef PWR_WAKEUP_PIN5
15
+SYS_WKUP5 = NC,
16
+#endif
17
+#ifdef PWR_WAKEUP_PIN6
18
+SYS_WKUP6 = NC,
19
+#endif
20
+#ifdef PWR_WAKEUP_PIN7
21
+SYS_WKUP7 = NC,
22
+#endif
23
+#ifdef PWR_WAKEUP_PIN8
24
+SYS_WKUP8 = NC,
25
+#endif
26
+/* USB */
27
+#ifdef USBCON
28
+USB_OTG_FS_SOF = PA_8,
29
+USB_OTG_FS_VBUS = PA_9,
30
+USB_OTG_FS_ID = PA_10,
31
+USB_OTG_FS_DM = PA_11,
32
+USB_OTG_FS_DP = PA_12,
33
+USB_OTG_HS_ULPI_D0 = PA_3,
34
+USB_OTG_HS_SOF = PA_4,
35
+USB_OTG_HS_ULPI_CK = PA_5,
36
+USB_OTG_HS_ULPI_D1 = PB_0,
37
+USB_OTG_HS_ULPI_D2 = PB_1,
38
+USB_OTG_HS_ULPI_D7 = PB_5,
39
+USB_OTG_HS_ULPI_D3 = PB_10,
40
+USB_OTG_HS_ULPI_D4 = PB_11,
41
+USB_OTG_HS_ID = PB_12,
42
+USB_OTG_HS_ULPI_D5 = PB_12,
43
+USB_OTG_HS_ULPI_D6 = PB_13,
44
+USB_OTG_HS_VBUS = PB_13,
45
+USB_OTG_HS_DM = PB_14,
46
+USB_OTG_HS_DP = PB_15,
47
+USB_OTG_HS_ULPI_STP = PC_0,
48
+USB_OTG_HS_ULPI_DIR = PC_2,
49
+USB_OTG_HS_ULPI_NXT = PC_3,
50
+#endif

+ 189
- 0
buildroot/share/PlatformIO/variants/MARLIN_F407VE/ldscript.ld View File

@@ -0,0 +1,189 @@
1
+/*
2
+*****************************************************************************
3
+**
4
+
5
+**  File        : LinkerScript.ld
6
+**
7
+**  Abstract    : Linker script for STM32F407VETx Device with
8
+**                512KByte FLASH, 128KByte RAM
9
+**
10
+**                Set heap size, stack size and stack location according
11
+**                to application requirements.
12
+**
13
+**                Set memory bank area and size if external memory is used.
14
+**
15
+**  Target      : STMicroelectronics STM32
16
+**
17
+**
18
+**  Distribution: The file is distributed as is, without any warranty
19
+**                of any kind.
20
+**
21
+**  (c)Copyright Ac6.
22
+**  You may use this file as-is or modify it according to the needs of your
23
+**  project. Distribution of this file (unmodified or modified) is not
24
+**  permitted. Ac6 permit registered System Workbench for MCU users the
25
+**  rights to distribute the assembled, compiled & linked contents of this
26
+**  file as part of an application binary file, provided that it is built
27
+**  using the System Workbench for MCU toolchain.
28
+**
29
+*****************************************************************************
30
+*/
31
+
32
+/* Entry Point */
33
+ENTRY(Reset_Handler)
34
+
35
+/* Highest address of the user mode stack */
36
+_estack = 0x20020000;    /* end of RAM */
37
+/* Generate a link error if heap and stack don't fit into RAM */
38
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
39
+_Min_Stack_Size = 0x400; /* required amount of stack */
40
+
41
+/* Specify the memory areas */
42
+MEMORY
43
+{
44
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
45
+CCMRAM (rw)      : ORIGIN = 0x10000000, LENGTH = 64K
46
+FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 512K
47
+}
48
+
49
+/* Define output sections */
50
+SECTIONS
51
+{
52
+  /* The startup code goes first into FLASH */
53
+  .isr_vector :
54
+  {
55
+    . = ALIGN(4);
56
+    KEEP(*(.isr_vector)) /* Startup code */
57
+    . = ALIGN(4);
58
+  } >FLASH
59
+
60
+  /* The program code and other data goes into FLASH */
61
+  .text ALIGN(8):
62
+  {
63
+    . = ALIGN(4);
64
+    *(.text)           /* .text sections (code) */
65
+    *(.text*)          /* .text* sections (code) */
66
+    *(.glue_7)         /* glue arm to thumb code */
67
+    *(.glue_7t)        /* glue thumb to arm code */
68
+    *(.eh_frame)
69
+
70
+    KEEP (*(.init))
71
+    KEEP (*(.fini))
72
+
73
+    . = ALIGN(4);
74
+    _etext = .;        /* define a global symbols at end of code */
75
+  } >FLASH
76
+
77
+  /* Constant data goes into FLASH */
78
+  .rodata ALIGN(4):
79
+  {
80
+    . = ALIGN(4);
81
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
82
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
83
+    . = ALIGN(4);
84
+  } >FLASH
85
+
86
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
87
+  .ARM : {
88
+    __exidx_start = .;
89
+    *(.ARM.exidx*)
90
+    __exidx_end = .;
91
+  } >FLASH
92
+
93
+  .preinit_array     :
94
+  {
95
+    PROVIDE_HIDDEN (__preinit_array_start = .);
96
+    KEEP (*(.preinit_array*))
97
+    PROVIDE_HIDDEN (__preinit_array_end = .);
98
+  } >FLASH
99
+  .init_array :
100
+  {
101
+    PROVIDE_HIDDEN (__init_array_start = .);
102
+    KEEP (*(SORT(.init_array.*)))
103
+    KEEP (*(.init_array*))
104
+    PROVIDE_HIDDEN (__init_array_end = .);
105
+  } >FLASH
106
+  .fini_array :
107
+  {
108
+    PROVIDE_HIDDEN (__fini_array_start = .);
109
+    KEEP (*(SORT(.fini_array.*)))
110
+    KEEP (*(.fini_array*))
111
+    PROVIDE_HIDDEN (__fini_array_end = .);
112
+  } >FLASH
113
+
114
+  /* used by the startup to initialize data */
115
+  _sidata = LOADADDR(.data);
116
+
117
+  /* Initialized data sections goes into RAM, load LMA copy after code */
118
+  .data : 
119
+  {
120
+    . = ALIGN(4);
121
+    _sdata = .;        /* create a global symbol at data start */
122
+    *(.data)           /* .data sections */
123
+    *(.data*)          /* .data* sections */
124
+
125
+    . = ALIGN(4);
126
+    _edata = .;        /* define a global symbol at data end */
127
+  } >RAM AT> FLASH
128
+
129
+  _siccmram = LOADADDR(.ccmram);
130
+
131
+  /* CCM-RAM section 
132
+  * 
133
+  * IMPORTANT NOTE! 
134
+  * If initialized variables will be placed in this section,
135
+  * the startup code needs to be modified to copy the init-values.  
136
+  */
137
+  .ccmram :
138
+  {
139
+    . = ALIGN(4);
140
+    _sccmram = .;       /* create a global symbol at ccmram start */
141
+    *(.ccmram)
142
+    *(.ccmram*)
143
+    
144
+    . = ALIGN(4);
145
+    _eccmram = .;       /* create a global symbol at ccmram end */
146
+  } >CCMRAM AT> FLASH
147
+
148
+  
149
+  /* Uninitialized data section */
150
+  . = ALIGN(4);
151
+  .bss :
152
+  {
153
+    /* This is used by the startup in order to initialize the .bss secion */
154
+    _sbss = .;         /* define a global symbol at bss start */
155
+    __bss_start__ = _sbss;
156
+    *(.bss)
157
+    *(.bss*)
158
+    *(COMMON)
159
+
160
+    . = ALIGN(4);
161
+    _ebss = .;         /* define a global symbol at bss end */
162
+    __bss_end__ = _ebss;
163
+  } >RAM
164
+
165
+  /* User_heap_stack section, used to check that there is enough RAM left */
166
+  ._user_heap_stack :
167
+  {
168
+    . = ALIGN(8);
169
+    PROVIDE ( end = . );
170
+    PROVIDE ( _end = . );
171
+    . = . + _Min_Heap_Size;
172
+    . = . + _Min_Stack_Size;
173
+    . = ALIGN(8);
174
+  } >RAM
175
+
176
+  
177
+
178
+  /* Remove information from the standard libraries */
179
+  /DISCARD/ :
180
+  {
181
+    libc.a ( * )
182
+    libm.a ( * )
183
+    libgcc.a ( * )
184
+  }
185
+
186
+  .ARM.attributes 0 : { *(.ARM.attributes) }
187
+}
188
+
189
+

+ 481
- 0
buildroot/share/PlatformIO/variants/MARLIN_F407VE/stm32f4xx_hal_conf.h View File

@@ -0,0 +1,481 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm32f4xx_hal_conf.h
4
+  * @brief   HAL configuration file.
5
+  ******************************************************************************
6
+  * @attention
7
+  *
8
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
9
+  * All rights reserved.</center></h2>
10
+  *
11
+  * This software component is licensed by ST under BSD 3-Clause license,
12
+  * the "License"; You may not use this file except in compliance with the
13
+  * License. You may obtain a copy of the License at:
14
+  *                        opensource.org/licenses/BSD-3-Clause
15
+  *
16
+  ******************************************************************************
17
+  */
18
+
19
+/* Define to prevent recursive inclusion -------------------------------------*/
20
+#ifndef __STM32F4xx_HAL_CONF_H
21
+#define __STM32F4xx_HAL_CONF_H
22
+
23
+#ifdef __cplusplus
24
+extern "C" {
25
+#endif
26
+
27
+/* Exported types ------------------------------------------------------------*/
28
+/* Exported constants --------------------------------------------------------*/
29
+
30
+/* ########################## Module Selection ############################## */
31
+/**
32
+  * @brief This is the list of modules to be used in the HAL driver
33
+  */
34
+#define HAL_MODULE_ENABLED
35
+#define HAL_ADC_MODULE_ENABLED
36
+/* #define HAL_CAN_MODULE_ENABLED   */
37
+/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
38
+#define HAL_CRC_MODULE_ENABLED
39
+/* #define HAL_CEC_MODULE_ENABLED   */
40
+/* #define HAL_CRYP_MODULE_ENABLED   */
41
+#define HAL_DAC_MODULE_ENABLED
42
+/* #define HAL_DCMI_MODULE_ENABLED   */
43
+#define HAL_DMA_MODULE_ENABLED
44
+/* #define HAL_DMA2D_MODULE_ENABLED   */
45
+/* #define HAL_ETH_MODULE_ENABLED   */
46
+#define HAL_FLASH_MODULE_ENABLED
47
+/* #define HAL_NAND_MODULE_ENABLED   */
48
+/* #define HAL_NOR_MODULE_ENABLED   */
49
+/* #define HAL_PCCARD_MODULE_ENABLED   */
50
+/* #define HAL_SRAM_MODULE_ENABLED   */
51
+/* #define HAL_SDRAM_MODULE_ENABLED   */
52
+/* #define HAL_HASH_MODULE_ENABLED   */
53
+#define HAL_GPIO_MODULE_ENABLED
54
+/* #define HAL_EXTI_MODULE_ENABLED   */
55
+#define HAL_I2C_MODULE_ENABLED
56
+/* #define HAL_SMBUS_MODULE_ENABLED   */
57
+/* #define HAL_I2S_MODULE_ENABLED   */
58
+/* #define HAL_IWDG_MODULE_ENABLED   */
59
+/* #define HAL_LTDC_MODULE_ENABLED   */
60
+/* #define HAL_DSI_MODULE_ENABLED   */
61
+#define HAL_PWR_MODULE_ENABLED
62
+/* #define HAL_QSPI_MODULE_ENABLED   */
63
+#define HAL_RCC_MODULE_ENABLED
64
+/* #define HAL_RNG_MODULE_ENABLED   */
65
+#define HAL_RTC_MODULE_ENABLED
66
+/* #define HAL_SAI_MODULE_ENABLED   */
67
+#define HAL_SD_MODULE_ENABLED
68
+#define HAL_SPI_MODULE_ENABLED
69
+#define HAL_TIM_MODULE_ENABLED
70
+/* #define HAL_UART_MODULE_ENABLED   */
71
+/* #define HAL_USART_MODULE_ENABLED   */
72
+/* #define HAL_IRDA_MODULE_ENABLED   */
73
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
74
+/* #define HAL_WWDG_MODULE_ENABLED   */
75
+#define HAL_CORTEX_MODULE_ENABLED
76
+#define HAL_PCD_MODULE_ENABLED
77
+/* #define HAL_HCD_MODULE_ENABLED   */
78
+/* #define HAL_FMPI2C_MODULE_ENABLED   */
79
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
80
+/* #define HAL_DFSDM_MODULE_ENABLED   */
81
+/* #define HAL_LPTIM_MODULE_ENABLED   */
82
+/* #define HAL_MMC_MODULE_ENABLED   */
83
+
84
+/* ########################## HSE/HSI Values adaptation ##################### */
85
+/**
86
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
87
+  *        This value is used by the RCC HAL module to compute the system frequency
88
+  *        (when HSE is used as system clock source, directly or through the PLL).
89
+  */
90
+#if !defined  (HSE_VALUE)
91
+#define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
92
+#endif /* HSE_VALUE */
93
+
94
+#if !defined  (HSE_STARTUP_TIMEOUT)
95
+#define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
96
+#endif /* HSE_STARTUP_TIMEOUT */
97
+
98
+/**
99
+  * @brief Internal High Speed oscillator (HSI) value.
100
+  *        This value is used by the RCC HAL module to compute the system frequency
101
+  *        (when HSI is used as system clock source, directly or through the PLL).
102
+  */
103
+#if !defined  (HSI_VALUE)
104
+#define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
105
+#endif /* HSI_VALUE */
106
+
107
+/**
108
+  * @brief Internal Low Speed oscillator (LSI) value.
109
+  */
110
+#if !defined  (LSI_VALUE)
111
+#define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
112
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
113
+The real value may vary depending on the variations
114
+in voltage and temperature.*/
115
+/**
116
+  * @brief External Low Speed oscillator (LSE) value.
117
+  */
118
+#if !defined  (LSE_VALUE)
119
+#define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
120
+#endif /* LSE_VALUE */
121
+
122
+#if !defined  (LSE_STARTUP_TIMEOUT)
123
+#define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
124
+#endif /* LSE_STARTUP_TIMEOUT */
125
+
126
+/**
127
+  * @brief External clock source for I2S peripheral
128
+  *        This value is used by the I2S HAL module to compute the I2S clock source
129
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
130
+  */
131
+#if !defined  (EXTERNAL_CLOCK_VALUE)
132
+#define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
133
+#endif /* EXTERNAL_CLOCK_VALUE */
134
+
135
+/* Tip: To avoid modifying this file each time you need to use different HSE,
136
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
137
+
138
+/* ########################### System Configuration ######################### */
139
+/**
140
+  * @brief This is the HAL system configuration section
141
+  */
142
+#define  VDD_VALUE          ((uint32_t)3300U) /*!< Value of VDD in mv */
143
+#define  TICK_INT_PRIORITY            ((uint32_t)0U)   /*!< tick interrupt priority */
144
+#define  USE_RTOS                     0U
145
+#define  PREFETCH_ENABLE              1U
146
+#define  INSTRUCTION_CACHE_ENABLE     1U
147
+#define  DATA_CACHE_ENABLE            1U
148
+
149
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
150
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
151
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
152
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
153
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
154
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
155
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
156
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
157
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
158
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
159
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
160
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
161
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
162
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
163
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
164
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
165
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
166
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
167
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
168
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
169
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
170
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
171
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
172
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
173
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
174
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
175
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
176
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
177
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
178
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
179
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
180
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
181
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
182
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
183
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
184
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
185
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
186
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
187
+
188
+/* ########################## Assert Selection ############################## */
189
+/**
190
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
191
+  *        HAL drivers code
192
+  */
193
+/* #define USE_FULL_ASSERT    1U */
194
+
195
+/* ################## Ethernet peripheral configuration ##################### */
196
+
197
+/* Section 1 : Ethernet peripheral configuration */
198
+
199
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
200
+#define MAC_ADDR0   2U
201
+#define MAC_ADDR1   0U
202
+#define MAC_ADDR2   0U
203
+#define MAC_ADDR3   0U
204
+#define MAC_ADDR4   0U
205
+#define MAC_ADDR5   0U
206
+
207
+/* Definition of the Ethernet driver buffers size and count */
208
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
209
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
210
+#define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
211
+#define ETH_TXBUFNB                    ((uint32_t)4U)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
212
+
213
+/* Section 2: PHY configuration section */
214
+
215
+/* DP83848_PHY_ADDRESS Address*/
216
+#define DP83848_PHY_ADDRESS           0x01U
217
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
218
+#define PHY_RESET_DELAY                 ((uint32_t)0x000000FFU)
219
+/* PHY Configuration delay */
220
+#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFFU)
221
+
222
+#define PHY_READ_TO                     ((uint32_t)0x0000FFFFU)
223
+#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFFU)
224
+
225
+/* Section 3: Common PHY Registers */
226
+
227
+#define PHY_BCR                         ((uint16_t)0x0000U)    /*!< Transceiver Basic Control Register   */
228
+#define PHY_BSR                         ((uint16_t)0x0001U)    /*!< Transceiver Basic Status Register    */
229
+
230
+#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
231
+#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
232
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
233
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
234
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
235
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
236
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
237
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
238
+#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
239
+#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
240
+
241
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
242
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
243
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
244
+
245
+/* Section 4: Extended PHY Registers */
246
+#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
247
+
248
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
249
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
250
+
251
+/* ################## SPI peripheral configuration ########################## */
252
+
253
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
254
+* Activated: CRC code is present inside driver
255
+* Deactivated: CRC code cleaned from driver
256
+*/
257
+
258
+#define USE_SPI_CRC                     0U
259
+
260
+/* Includes ------------------------------------------------------------------*/
261
+/**
262
+  * @brief Include module's header file
263
+  */
264
+
265
+#ifdef HAL_RCC_MODULE_ENABLED
266
+#include "stm32f4xx_hal_rcc.h"
267
+#endif /* HAL_RCC_MODULE_ENABLED */
268
+
269
+#ifdef HAL_GPIO_MODULE_ENABLED
270
+#include "stm32f4xx_hal_gpio.h"
271
+#endif /* HAL_GPIO_MODULE_ENABLED */
272
+
273
+#ifdef HAL_EXTI_MODULE_ENABLED
274
+#include "stm32f4xx_hal_exti.h"
275
+#endif /* HAL_EXTI_MODULE_ENABLED */
276
+
277
+#ifdef HAL_DMA_MODULE_ENABLED
278
+#include "stm32f4xx_hal_dma.h"
279
+#endif /* HAL_DMA_MODULE_ENABLED */
280
+
281
+#ifdef HAL_CORTEX_MODULE_ENABLED
282
+#include "stm32f4xx_hal_cortex.h"
283
+#endif /* HAL_CORTEX_MODULE_ENABLED */
284
+
285
+#ifdef HAL_ADC_MODULE_ENABLED
286
+#include "stm32f4xx_hal_adc.h"
287
+#endif /* HAL_ADC_MODULE_ENABLED */
288
+
289
+#ifdef HAL_CAN_MODULE_ENABLED
290
+#include "stm32f4xx_hal_can.h"
291
+#endif /* HAL_CAN_MODULE_ENABLED */
292
+
293
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
294
+#include "stm32f4xx_hal_can_legacy.h"
295
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
296
+
297
+#ifdef HAL_CRC_MODULE_ENABLED
298
+#include "stm32f4xx_hal_crc.h"
299
+#endif /* HAL_CRC_MODULE_ENABLED */
300
+
301
+#ifdef HAL_CRYP_MODULE_ENABLED
302
+#include "stm32f4xx_hal_cryp.h"
303
+#endif /* HAL_CRYP_MODULE_ENABLED */
304
+
305
+#ifdef HAL_DMA2D_MODULE_ENABLED
306
+#include "stm32f4xx_hal_dma2d.h"
307
+#endif /* HAL_DMA2D_MODULE_ENABLED */
308
+
309
+#ifdef HAL_DAC_MODULE_ENABLED
310
+#include "stm32f4xx_hal_dac.h"
311
+#endif /* HAL_DAC_MODULE_ENABLED */
312
+
313
+#ifdef HAL_DCMI_MODULE_ENABLED
314
+#include "stm32f4xx_hal_dcmi.h"
315
+#endif /* HAL_DCMI_MODULE_ENABLED */
316
+
317
+#ifdef HAL_ETH_MODULE_ENABLED
318
+#include "stm32f4xx_hal_eth.h"
319
+#endif /* HAL_ETH_MODULE_ENABLED */
320
+
321
+#ifdef HAL_FLASH_MODULE_ENABLED
322
+#include "stm32f4xx_hal_flash.h"
323
+#endif /* HAL_FLASH_MODULE_ENABLED */
324
+
325
+#ifdef HAL_SRAM_MODULE_ENABLED
326
+#include "stm32f4xx_hal_sram.h"
327
+#endif /* HAL_SRAM_MODULE_ENABLED */
328
+
329
+#ifdef HAL_NOR_MODULE_ENABLED
330
+#include "stm32f4xx_hal_nor.h"
331
+#endif /* HAL_NOR_MODULE_ENABLED */
332
+
333
+#ifdef HAL_NAND_MODULE_ENABLED
334
+#include "stm32f4xx_hal_nand.h"
335
+#endif /* HAL_NAND_MODULE_ENABLED */
336
+
337
+#ifdef HAL_PCCARD_MODULE_ENABLED
338
+#include "stm32f4xx_hal_pccard.h"
339
+#endif /* HAL_PCCARD_MODULE_ENABLED */
340
+
341
+#ifdef HAL_SDRAM_MODULE_ENABLED
342
+#include "stm32f4xx_hal_sdram.h"
343
+#endif /* HAL_SDRAM_MODULE_ENABLED */
344
+
345
+#ifdef HAL_HASH_MODULE_ENABLED
346
+#include "stm32f4xx_hal_hash.h"
347
+#endif /* HAL_HASH_MODULE_ENABLED */
348
+
349
+#ifdef HAL_I2C_MODULE_ENABLED
350
+#include "stm32f4xx_hal_i2c.h"
351
+#endif /* HAL_I2C_MODULE_ENABLED */
352
+
353
+#ifdef HAL_SMBUS_MODULE_ENABLED
354
+#include "stm32f4xx_hal_smbus.h"
355
+#endif /* HAL_SMBUS_MODULE_ENABLED */
356
+
357
+#ifdef HAL_I2S_MODULE_ENABLED
358
+#include "stm32f4xx_hal_i2s.h"
359
+#endif /* HAL_I2S_MODULE_ENABLED */
360
+
361
+#ifdef HAL_IWDG_MODULE_ENABLED
362
+#include "stm32f4xx_hal_iwdg.h"
363
+#endif /* HAL_IWDG_MODULE_ENABLED */
364
+
365
+#ifdef HAL_LTDC_MODULE_ENABLED
366
+#include "stm32f4xx_hal_ltdc.h"
367
+#endif /* HAL_LTDC_MODULE_ENABLED */
368
+
369
+#ifdef HAL_PWR_MODULE_ENABLED
370
+#include "stm32f4xx_hal_pwr.h"
371
+#endif /* HAL_PWR_MODULE_ENABLED */
372
+
373
+#ifdef HAL_RNG_MODULE_ENABLED
374
+#include "stm32f4xx_hal_rng.h"
375
+#endif /* HAL_RNG_MODULE_ENABLED */
376
+
377
+#ifdef HAL_RTC_MODULE_ENABLED
378
+#include "stm32f4xx_hal_rtc.h"
379
+#endif /* HAL_RTC_MODULE_ENABLED */
380
+
381
+#ifdef HAL_SAI_MODULE_ENABLED
382
+#include "stm32f4xx_hal_sai.h"
383
+#endif /* HAL_SAI_MODULE_ENABLED */
384
+
385
+#ifdef HAL_SD_MODULE_ENABLED
386
+#include "stm32f4xx_hal_sd.h"
387
+#endif /* HAL_SD_MODULE_ENABLED */
388
+
389
+#ifdef HAL_SPI_MODULE_ENABLED
390
+#include "stm32f4xx_hal_spi.h"
391
+#endif /* HAL_SPI_MODULE_ENABLED */
392
+
393
+#ifdef HAL_TIM_MODULE_ENABLED
394
+#include "stm32f4xx_hal_tim.h"
395
+#endif /* HAL_TIM_MODULE_ENABLED */
396
+
397
+#ifdef HAL_UART_MODULE_ENABLED
398
+#include "stm32f4xx_hal_uart.h"
399
+#endif /* HAL_UART_MODULE_ENABLED */
400
+
401
+#ifdef HAL_USART_MODULE_ENABLED
402
+#include "stm32f4xx_hal_usart.h"
403
+#endif /* HAL_USART_MODULE_ENABLED */
404
+
405
+#ifdef HAL_IRDA_MODULE_ENABLED
406
+#include "stm32f4xx_hal_irda.h"
407
+#endif /* HAL_IRDA_MODULE_ENABLED */
408
+
409
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
410
+#include "stm32f4xx_hal_smartcard.h"
411
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
412
+
413
+#ifdef HAL_WWDG_MODULE_ENABLED
414
+#include "stm32f4xx_hal_wwdg.h"
415
+#endif /* HAL_WWDG_MODULE_ENABLED */
416
+
417
+#ifdef HAL_PCD_MODULE_ENABLED
418
+#include "stm32f4xx_hal_pcd.h"
419
+#endif /* HAL_PCD_MODULE_ENABLED */
420
+
421
+#ifdef HAL_HCD_MODULE_ENABLED
422
+#include "stm32f4xx_hal_hcd.h"
423
+#endif /* HAL_HCD_MODULE_ENABLED */
424
+
425
+#ifdef HAL_DSI_MODULE_ENABLED
426
+#include "stm32f4xx_hal_dsi.h"
427
+#endif /* HAL_DSI_MODULE_ENABLED */
428
+
429
+#ifdef HAL_QSPI_MODULE_ENABLED
430
+#include "stm32f4xx_hal_qspi.h"
431
+#endif /* HAL_QSPI_MODULE_ENABLED */
432
+
433
+#ifdef HAL_CEC_MODULE_ENABLED
434
+#include "stm32f4xx_hal_cec.h"
435
+#endif /* HAL_CEC_MODULE_ENABLED */
436
+
437
+#ifdef HAL_FMPI2C_MODULE_ENABLED
438
+#include "stm32f4xx_hal_fmpi2c.h"
439
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
440
+
441
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
442
+#include "stm32f4xx_hal_spdifrx.h"
443
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
444
+
445
+#ifdef HAL_DFSDM_MODULE_ENABLED
446
+#include "stm32f4xx_hal_dfsdm.h"
447
+#endif /* HAL_DFSDM_MODULE_ENABLED */
448
+
449
+#ifdef HAL_LPTIM_MODULE_ENABLED
450
+#include "stm32f4xx_hal_lptim.h"
451
+#endif /* HAL_LPTIM_MODULE_ENABLED */
452
+
453
+#ifdef HAL_MMC_MODULE_ENABLED
454
+#include "stm32f4xx_hal_mmc.h"
455
+#endif /* HAL_MMC_MODULE_ENABLED */
456
+
457
+/* Exported macro ------------------------------------------------------------*/
458
+#ifdef  USE_FULL_ASSERT
459
+/**
460
+  * @brief  The assert_param macro is used for function's parameters check.
461
+  * @param  expr: If expr is false, it calls assert_failed function
462
+  *         which reports the name of the source file and the source
463
+  *         line number of the call that failed.
464
+  *         If expr is true, it returns no value.
465
+  * @retval None
466
+  */
467
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
468
+/* Exported functions ------------------------------------------------------- */
469
+void assert_failed(uint8_t *file, uint32_t line);
470
+#else
471
+#define assert_param(expr) ((void)0U)
472
+#endif /* USE_FULL_ASSERT */
473
+
474
+#ifdef __cplusplus
475
+}
476
+#endif
477
+
478
+#endif /* __STM32F4xx_HAL_CONF_H */
479
+
480
+
481
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 165
- 0
buildroot/share/PlatformIO/variants/MARLIN_F407VE/variant.cpp View File

@@ -0,0 +1,165 @@
1
+/*
2
+ *******************************************************************************
3
+ * Copyright (c) 2017, STMicroelectronics
4
+ * All rights reserved.
5
+ *
6
+ * Redistribution and use in source and binary forms, with or without
7
+ * modification, are permitted provided that the following conditions are met:
8
+ *
9
+ * 1. Redistributions of source code must retain the above copyright notice,
10
+ *    this list of conditions and the following disclaimer.
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
15
+ *    may be used to endorse or promote products derived from this software
16
+ *    without specific prior written permission.
17
+ *
18
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
+ *******************************************************************************
29
+ */
30
+
31
+#include "variant.h"
32
+
33
+#ifdef __cplusplus
34
+extern "C" {
35
+#endif
36
+
37
+// Pin number
38
+// This array allows to wrap Arduino pin number(Dx or x)
39
+// to STM32 PinName (PX_n)
40
+const PinName digitalPin[] = {
41
+  // Right Side
42
+  //Int   //Ext
43
+  //3V3   //3V3
44
+  //3V3   //3V3
45
+  //BOOT0 //BOOT1
46
+  //GND   //GND
47
+  //GND   //GND
48
+  PE_1,   PE_0,   // D0, D1
49
+  PB_9,   PB_8,
50
+  PB_7,   PB_6,
51
+  PB_5,   PB_3,
52
+  PD_7,   PD_6,
53
+  PD_5,   PD_4,   // D10, D11
54
+  PD_3,   PD_2,
55
+  PD_1,   PD_0,
56
+  PC_12,  PC_11,
57
+  PC_10,  PA_15,
58
+  PA_12,  PA_11,  // D20, D21 PA_11: USB_DM, PA_12: USB_DP
59
+  PA_10,  PA_9,
60
+  PA_8,   PC_9,
61
+  PC_8,   PC_7,
62
+  PC_6,   PD_15,
63
+  PD_14,  PD_13,  // D30, D31
64
+  PD_12,  PD_11,
65
+  PD_10,  PD_9,
66
+  PD_8,   PB_15,
67
+  // Left Side
68
+  //Ext   //Int
69
+  //5V    //5V
70
+  //5V    //5V
71
+  //3V3   //3V3
72
+  //3V3   //3V3
73
+  //GND   //GND
74
+  PE_2,   PE_3,
75
+  PE_4,   PE_5,   // D40, D41 PE_4: BUT K0, PE_5: BUT K1
76
+  PE_6,   PC_13,
77
+  PC_0,   PC_1,
78
+  PC_2,   PC_3,
79
+  //VREF- //VREF+
80
+  PA_0,   PA_1,   // PA_0(WK_UP): BUT K_UP)
81
+  PA_2,   PA_3,   // D50, D51
82
+  PA_4,   PA_5,
83
+  /*PA_6,   PA_7,*/ // PA_6, PA_7: Moved to allow contiguous analog pins
84
+  PC_4,   PC_5,
85
+  PB_0,   PB_1,
86
+  PA_6,   PA_7,   // PA_6: LED D2, PA_7: LED D3 (active LOW)
87
+  PE_7,   PE_8,   // D60, D61
88
+  PE_9,   PE_10,
89
+  PE_11,  PE_12,
90
+  PE_13,  PE_14,
91
+  PE_15,  PB_10,
92
+  PB_11,  PB_12,  // D70, D71
93
+  PB_13,  PB_14,
94
+  PB_4,
95
+};
96
+
97
+#ifdef __cplusplus
98
+}
99
+#endif
100
+
101
+// ----------------------------------------------------------------------------
102
+
103
+#ifdef __cplusplus
104
+extern "C" {
105
+#endif
106
+
107
+/**
108
+  * @brief  System Clock Configuration
109
+  * @param  None
110
+  * @retval None
111
+  */
112
+WEAK void SystemClock_Config(void)
113
+{
114
+
115
+  RCC_OscInitTypeDef RCC_OscInitStruct;
116
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
117
+
118
+  /**Configure the main internal regulator output voltage
119
+  */
120
+  __HAL_RCC_PWR_CLK_ENABLE();
121
+
122
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
123
+
124
+  /**Initializes the CPU, AHB and APB busses clocks
125
+  */
126
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
127
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
128
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
129
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
130
+  RCC_OscInitStruct.PLL.PLLM = 8;
131
+  RCC_OscInitStruct.PLL.PLLN = 336;
132
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
133
+  RCC_OscInitStruct.PLL.PLLQ = 7;
134
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
135
+    _Error_Handler(__FILE__, __LINE__);
136
+  }
137
+
138
+  /**Initializes the CPU, AHB and APB busses clocks
139
+  */
140
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
141
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
142
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
143
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
144
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
145
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
146
+
147
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
148
+    _Error_Handler(__FILE__, __LINE__);
149
+  }
150
+
151
+  /**Configure the Systick interrupt time
152
+  */
153
+  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
154
+
155
+  /**Configure the Systick
156
+  */
157
+  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
158
+
159
+  /* SysTick_IRQn interrupt configuration */
160
+  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
161
+}
162
+
163
+#ifdef __cplusplus
164
+}
165
+#endif

+ 219
- 0
buildroot/share/PlatformIO/variants/MARLIN_F407VE/variant.h View File

@@ -0,0 +1,219 @@
1
+/*
2
+ *******************************************************************************
3
+ * Copyright (c) 2017, STMicroelectronics
4
+ * All rights reserved.
5
+ *
6
+ * Redistribution and use in source and binary forms, with or without
7
+ * modification, are permitted provided that the following conditions are met:
8
+ *
9
+ * 1. Redistributions of source code must retain the above copyright notice,
10
+ *    this list of conditions and the following disclaimer.
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
15
+ *    may be used to endorse or promote products derived from this software
16
+ *    without specific prior written permission.
17
+ *
18
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
+ *******************************************************************************
29
+ */
30
+
31
+#ifndef _VARIANT_ARDUINO_STM32_
32
+#define _VARIANT_ARDUINO_STM32_
33
+
34
+/*----------------------------------------------------------------------------
35
+ *        Headers
36
+ *----------------------------------------------------------------------------*/
37
+#include "PeripheralPins.h"
38
+
39
+#ifdef __cplusplus
40
+extern "C" {
41
+#endif // __cplusplus
42
+
43
+/*----------------------------------------------------------------------------
44
+ *        Pins
45
+ *----------------------------------------------------------------------------*/
46
+extern const PinName digitalPin[];
47
+// Right Side
48
+#define PE1  0
49
+#define PE0  1
50
+#define PB9  2
51
+#define PB8  3
52
+#define PB7  4
53
+#define PB6  5
54
+#define PB5  6
55
+#define PB3  7
56
+#define PD7  8
57
+#define PD6  9
58
+#define PD5  10
59
+#define PD4  11
60
+#define PD3  12
61
+#define PD2  13
62
+#define PD1  14
63
+#define PD0  15
64
+#define PC12 16
65
+#define PC11 17
66
+#define PC10 18
67
+#define PA15 19
68
+#define PA12 20 // USB_DP
69
+#define PA11 21 // USB_DM
70
+#define PA10 22
71
+#define PA9  23
72
+#define PA8  24
73
+#define PC9  25
74
+#define PC8  26
75
+#define PC7  27
76
+#define PC6  28
77
+#define PD15 29
78
+#define PD14 30
79
+#define PD13 31
80
+#define PD12 32
81
+#define PD11 33
82
+#define PD10 34
83
+#define PD9  35
84
+#define PD8  36
85
+#define PB15 37
86
+// Left Side
87
+#define PE2  38
88
+#define PE3  39
89
+#define PE4  40 // BUT K0
90
+#define PE5  41 // BUT K1
91
+#define PE6  42
92
+#define PC13 43
93
+#define PC0  44 // A0
94
+#define PC1  45 // A1
95
+#define PC2  46 // A2
96
+#define PC3  47 // A3
97
+#define PA0  48 // A4/WK_UP: BUT K_UP
98
+#define PA1  49 // A5
99
+#define PA2  50 // A6
100
+#define PA3  51 // A7
101
+#define PA4  52 // A8
102
+#define PA5  53 // A9
103
+#define PC4  54 // A10
104
+#define PC5  55 // A11
105
+#define PB0  56 // A12
106
+#define PB1  57 // A13
107
+#define PA6  58 // LED D2
108
+#define PA7  59 // LED D3 (active LOW)
109
+#define PE7  60
110
+#define PE8  61
111
+#define PE9  62
112
+#define PE10 63
113
+#define PE11 64
114
+#define PE12 65
115
+#define PE13 66
116
+#define PE14 67
117
+#define PE15 68
118
+#define PB10 69
119
+#define PB11 70
120
+#define PB12 71
121
+#define PB13 72
122
+#define PB14 73
123
+#define PB4  74
124
+
125
+// This must be a literal
126
+#define NUM_DIGITAL_PINS        75
127
+// This must be a literal with a value less than or equal to MAX_ANALOG_INPUTS
128
+#define NUM_ANALOG_INPUTS       14
129
+#define NUM_ANALOG_FIRST        44
130
+
131
+// Below ADC, DAC and PWM definitions already done in the core
132
+// Could be redefined here if needed
133
+// ADC resolution is 12bits
134
+//#define ADC_RESOLUTION          12
135
+//#define DACC_RESOLUTION         12
136
+
137
+// PWM resolution
138
+#define PWM_RESOLUTION          8
139
+#define PWM_FREQUENCY           20000
140
+#define PWM_MAX_DUTY_CYCLE      255
141
+
142
+// On-board LED pin number
143
+#define LED_D2                  PA6
144
+#define LED_D3                  PA7
145
+
146
+// Board specific button
147
+#define BTN_K_UP                PA0
148
+
149
+#define LED_BUILTIN             LED_D2
150
+#define LED_GREEN               LED_D2
151
+
152
+// On-board user button
153
+#define BTN_K0                  PE4
154
+#define BTN_K1                  PE3
155
+#define USER_BTN                BTN_K0
156
+
157
+// Below SPI and I2C definitions already done in the core
158
+// Could be redefined here if differs from the default one
159
+// SPI Definitions
160
+#define PIN_SPI_MOSI            PB15
161
+#define PIN_SPI_MISO            PB14
162
+#define PIN_SPI_SCK             PB13
163
+#define PIN_SPI_SS              PB12
164
+//#define PIN_SPI_SS1             PB0 // W25Q16 (on board flash)
165
+
166
+// I2C Definitions
167
+#define PIN_WIRE_SDA            PB7
168
+#define PIN_WIRE_SCL            PB6
169
+
170
+// Timer Definitions
171
+//Do not use timer used by PWM pins when possible. See PinMap_PWM in PeripheralPins.c
172
+#define TIMER_TONE              TIM6
173
+
174
+// Do not use basic timer: OC is required
175
+#define TIMER_SERVO             TIM2  //TODO: advanced-control timers don't work
176
+
177
+// UART Definitions
178
+// Define here Serial instance number to map on Serial generic name
179
+#define SERIAL_UART_INSTANCE    1 //ex: 2 for Serial2 (USART2)
180
+// DEBUG_UART could be redefined to print on another instance than 'Serial'
181
+//#define DEBUG_UART              ((USART_TypeDef *) U(S)ARTX) // ex: USART3
182
+// DEBUG_UART baudrate, default: 9600 if not defined
183
+//#define DEBUG_UART_BAUDRATE     x
184
+// DEBUG_UART Tx pin name, default: the first one found in PinMap_UART_TX for DEBUG_UART
185
+//#define DEBUG_PINNAME_TX        PX_n // PinName used for TX
186
+
187
+// Default pin used for 'Serial' instance (ex: ST-Link)
188
+// Mandatory for Firmata
189
+#define PIN_SERIAL_RX           PA10
190
+#define PIN_SERIAL_TX           PA9
191
+
192
+#ifdef __cplusplus
193
+} // extern "C"
194
+#endif
195
+/*----------------------------------------------------------------------------
196
+ *        Arduino objects - C++ only
197
+ *----------------------------------------------------------------------------*/
198
+
199
+#ifdef __cplusplus
200
+// These serial port names are intended to allow libraries and architecture-neutral
201
+// sketches to automatically default to the correct port name for a particular type
202
+// of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
203
+// the first hardware serial port whose RX/TX pins are not dedicated to another use.
204
+//
205
+// SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
206
+//
207
+// SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
208
+//
209
+// SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
210
+//
211
+// SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
212
+//
213
+// SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
214
+//                            pins are NOT connected to anything by default.
215
+#define SERIAL_PORT_MONITOR     Serial
216
+#define SERIAL_PORT_HARDWARE    Serial1
217
+#endif
218
+
219
+#endif /* _VARIANT_ARDUINO_STM32_ */

+ 2108
- 0
config/examples/STM32/Black_STM32F407VET6/Configuration.h
File diff suppressed because it is too large
View File


+ 2327
- 0
config/examples/STM32/Black_STM32F407VET6/Configuration_adv.h
File diff suppressed because it is too large
View File


config/examples/STM32F10/Configuration.h → config/examples/STM32/STM32F10/Configuration.h View File


config/examples/stm32f103ret6/Configuration.h → config/examples/STM32/stm32f103ret6/Configuration.h View File


config/examples/STM32F4/Configuration.h → config/examples/stm32/STM32F4/Configuration.h View File


+ 17
- 1
platformio.ini View File

@@ -307,7 +307,6 @@ framework     = arduino
307 307
 board         = genericSTM32F103ZE
308 308
 extra_scripts = buildroot/share/PlatformIO/scripts/mks_robin.py
309 309
 build_flags   = !python Marlin/src/HAL/HAL_STM32F1/STM32F1_flag_script.py
310
- -DSTM32_XL_DENSITY
311 310
   ${common.build_flags}
312 311
   -DSTM32_XL_DENSITY
313 312
 src_filter    = ${common.default_src_filter} +<src/HAL/HAL_STM32F1>
@@ -321,6 +320,23 @@ lib_ignore    = c1921b4
321 320
   TMC26XStepper
322 321
 
323 322
 #
323
+# STM32F407VET6 with RAMPS-like shield
324
+# 'Black' STM32F407VET6 board - http://wiki.stm32duino.com/index.php?title=STM32F407
325
+# Shield - https://github.com/jmz52/Hardware
326
+#
327
+[env:black_stm32f407ve]
328
+platform = ststm32
329
+framework = arduino
330
+board = blackSTM32F407VET6
331
+extra_scripts = pre:buildroot/share/PlatformIO/scripts/black_stm32f407vet6.py
332
+build_flags = ${common.build_flags}
333
+  -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483 -DUSB_PRODUCT=\"BLACK_F407VE\"
334
+lib_deps = ${common.lib_deps}
335
+lib_ignore = Adafruit NeoPixel, c1921b4, TMCStepper, TMC26XStepper, SailfishLCD, SailfishRGB_LED, SlowSoftI2CMaster
336
+src_filter = ${common.default_src_filter} +<src/HAL/HAL_STM32>
337
+monitor_speed = 250000
338
+
339
+#
324 340
 # Teensy 3.5 / 3.6 (ARM Cortex-M4)
325 341
 #
326 342
 [env:teensy35]

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