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Add FLYBOARD (STM32F407ZG) (#16257)

FLYmaker před 4 roky
rodič
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59f9bb2120

+ 1
- 0
Marlin/src/core/boards.h Zobrazit soubor

@@ -310,6 +310,7 @@
310 310
 #define BOARD_LERDGE_X                4210  // Lerdge X (STM32F407VE)
311 311
 #define BOARD_VAKE403D                4211  // VAkE 403D (STM32F446VET6)
312 312
 #define BOARD_FYSETC_S6               4212  // FYSETC S6 board
313
+#define BOARD_FLYF407ZG               4213  // FLYF407ZG board (STM32F407ZG)
313 314
 
314 315
 //
315 316
 // ARM Cortex M7

+ 3
- 0
Marlin/src/pins/pins.h Zobrazit soubor

@@ -537,6 +537,9 @@
537 537
   #include "stm32/pins_VAKE403D.h"              // STM32F4                                env:STM32F4
538 538
 #elif MB(FYSETC_S6)
539 539
   #include "stm32/pins_FYSETC_S6.h"             // STM32F4                                env:FYSETC_S6
540
+#elif MB(FLYF407ZG)
541
+  #include "stm32/pins_FLYF407ZG.h"             // STM32F4                                env:FLYF407ZG
542
+
540 543
 //
541 544
 // ARM Cortex M7
542 545
 //

+ 242
- 0
Marlin/src/pins/stm32/pins_FLYF407ZG.h Zobrazit soubor

@@ -0,0 +1,242 @@
1
+/**
2
+ * Marlin 3D Printer Firmware
3
+ * Copyright (c) 2019 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
4
+ *
5
+ * Based on Sprinter and grbl.
6
+ * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
7
+ *
8
+ * This program is free software: you can redistribute it and/or modify
9
+ * it under the terms of the GNU General Public License as published by
10
+ * the Free Software Foundation, either version 3 of the License, or
11
+ * (at your option) any later version.
12
+ *
13
+ * This program is distributed in the hope that it will be useful,
14
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
15
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
+ * GNU General Public License for more details.
17
+ *
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+ * You should have received a copy of the GNU General Public License
19
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20
+ *
21
+ */
22
+#pragma once
23
+
24
+#if !defined(STM32F4) && !defined(STM32F4xx)
25
+  #error "Oops! Select an STM32F4 board in 'Tools > Board.'"
26
+#elif HOTENDS > 6 || E_STEPPERS > 6
27
+  #error "FLYF407ZG supports up to 6 hotends / E-steppers."
28
+#endif
29
+
30
+#define BOARD_INFO_NAME      "FLYF407ZG"
31
+#define BOARD_WEBSITE_URL    "github.com/FLYmaker/FLYF407ZG"
32
+#define DEFAULT_MACHINE_NAME BOARD_INFO_NAME
33
+
34
+#undef E2END
35
+#define E2END 0xFFF // 4KB
36
+
37
+//
38
+// Servos
39
+//
40
+#define SERVO0_PIN         PE11
41
+
42
+//
43
+// Limit Switches
44
+//
45
+#define X_MIN_PIN          PC3
46
+#define X_MAX_PIN          PC2
47
+#define Y_MIN_PIN          PF2
48
+#define Y_MAX_PIN          PF1
49
+#define Z_MIN_PIN          PF0
50
+#define Z_MAX_PIN          PC15
51
+
52
+//
53
+// Z Probe (when not Z_MIN_PIN)
54
+//
55
+#define Z_MIN_PROBE_PIN    PC14   // Z3_PIN
56
+
57
+//
58
+// Steppers
59
+//
60
+
61
+#define X_STEP_PIN         PB9
62
+#define X_DIR_PIN          PE0
63
+#define X_ENABLE_PIN       PE1
64
+#ifndef X_CS_PIN
65
+  #define X_CS_PIN         PG13
66
+#endif
67
+
68
+#define Y_STEP_PIN         PB8
69
+#define Y_DIR_PIN          PG11
70
+#define Y_ENABLE_PIN       PG12
71
+#ifndef Y_CS_PIN
72
+  #define Y_CS_PIN         PG10
73
+#endif
74
+
75
+#define Z_STEP_PIN         PA8
76
+#define Z_DIR_PIN          PD6
77
+#define Z_ENABLE_PIN       PD7
78
+#ifndef Z_CS_PIN
79
+  #define Z_CS_PIN         PD5
80
+#endif
81
+
82
+#define E0_STEP_PIN        PC7
83
+#define E0_DIR_PIN         PD3
84
+#define E0_ENABLE_PIN      PD4
85
+#ifndef E0_CS_PIN
86
+  #define E0_CS_PIN        PD1
87
+#endif
88
+
89
+#define E1_STEP_PIN        PC6
90
+#define E1_DIR_PIN         PA15
91
+#define E1_ENABLE_PIN      PD0
92
+#ifndef E1_CS_PIN
93
+  #define E1_CS_PIN        PA14
94
+#endif
95
+
96
+#define E2_STEP_PIN        PD15
97
+#define E2_DIR_PIN         PG7
98
+#define E2_ENABLE_PIN      PG8
99
+#ifndef E2_CS_PIN
100
+  #define E2_CS_PIN        PG6
101
+#endif
102
+
103
+#define E3_STEP_PIN        PD14
104
+#define E3_DIR_PIN         PG4
105
+#define E3_ENABLE_PIN      PG5
106
+#ifndef E3_CS_PIN
107
+  #define E3_CS_PIN        PG3
108
+#endif
109
+
110
+#define E4_STEP_PIN        PD13
111
+#define E4_DIR_PIN         PD11
112
+#define E4_ENABLE_PIN      PG2
113
+#ifndef E4_CS_PIN
114
+  #define E4_CS_PIN        PD10
115
+#endif
116
+
117
+#define E5_STEP_PIN        PD12
118
+#define E5_DIR_PIN         PD8
119
+#define E5_ENABLE_PIN      PD9
120
+#ifndef E5_CS_PIN
121
+  #define E5_CS_PIN        PB12
122
+#endif
123
+
124
+//
125
+// Temperature Sensors
126
+//
127
+#define TEMP_0_PIN         PA0   // Analog Input
128
+#define TEMP_1_PIN         PC1   // Analog Input
129
+#define TEMP_2_PIN         PC0   // Analog Input
130
+#define TEMP_3_PIN         PF10  // Analog Input
131
+#define TEMP_4_PIN         PF5   // Analog Input
132
+#define TEMP_5_PIN         PF4   // Analog Input
133
+#define TEMP_BED_PIN       PF3   // Analog Input
134
+
135
+//
136
+// Heaters / Fans
137
+//
138
+#define HEATER_0_PIN       PF7
139
+#define HEATER_1_PIN       PF6
140
+#define HEATER_2_PIN       PE6
141
+#define HEATER_3_PIN       PE5
142
+#define HEATER_4_PIN       PE4
143
+#define HEATER_5_PIN       PA2
144
+#define HEATER_BED_PIN     PE2
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+
146
+#ifndef FAN_PIN
147
+  #define FAN_PIN          PF8
148
+#endif
149
+#define FAN1_PIN           PF9
150
+#define FAN2_PIN           PE3
151
+#define FAN3_PIN           PA1
152
+#define FAN4_PIN           PE13
153
+#define FAN5_PIN           PB11
154
+
155
+//
156
+// Trinamic Software SPI
157
+//
158
+
159
+#if ENABLED(TMC_USE_SW_SPI)
160
+  #ifndef TMC_SW_MOSI
161
+    #define TMC_SW_MOSI    PB15
162
+  #endif
163
+  #ifndef TMC_SW_MISO
164
+    #define TMC_SW_MISO    PB14
165
+  #endif
166
+  #ifndef TMC_SW_SCK
167
+    #define TMC_SW_SCK     PB13
168
+  #endif
169
+#endif
170
+
171
+//
172
+// Trinamic Software Serial
173
+//
174
+
175
+#if HAS_TMC220x
176
+  #define X_SERIAL_TX_PIN  PG13
177
+  #define X_SERIAL_RX_PIN  PG13
178
+
179
+  #define Y_SERIAL_TX_PIN  PG10
180
+  #define Y_SERIAL_RX_PIN  PG10
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+
182
+  #define Z_SERIAL_TX_PIN  PD5
183
+  #define Z_SERIAL_RX_PIN  PD5
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+
185
+  #define E0_SERIAL_TX_PIN PD1
186
+  #define E0_SERIAL_RX_PIN PD1
187
+
188
+  #define E1_SERIAL_TX_PIN PA14
189
+  #define E1_SERIAL_RX_PIN PA14
190
+
191
+  #define E2_SERIAL_TX_PIN PG6
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+  #define E2_SERIAL_RX_PIN PG6
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+
194
+  #define E3_SERIAL_TX_PIN PG3
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+  #define E3_SERIAL_RX_PIN PG3
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+
197
+  #define E4_SERIAL_TX_PIN PD10
198
+  #define E4_SERIAL_RX_PIN PD10
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+
200
+  #define E5_SERIAL_TX_PIN PB12
201
+  #define E5_SERIAL_RX_PIN PB12
202
+
203
+#endif
204
+
205
+
206
+//
207
+// LCD / Controller
208
+//
209
+#define SCK_PIN            PB13
210
+#define MISO_PIN           PB14
211
+#define MOSI_PIN           PB15
212
+#define SDSS               PF11
213
+#define SD_DETECT_PIN      PB2
214
+#define BEEPER_PIN         PB10
215
+#define LCD_PINS_RS        PE12
216
+#define LCD_PINS_ENABLE    PE14
217
+#define LCD_PINS_D4        PE10
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+#define LCD_PINS_D5        PE9
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+#define LCD_PINS_D6        PE8
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+#define LCD_PINS_D7        PE7
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+#define BTN_EN1            PC4
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+#define BTN_EN2            PC5
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+#define BTN_ENC            PE15
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+
225
+//
226
+// Filament runout
227
+//
228
+
229
+#define FIL_RUNOUT_PIN     PA3
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+
231
+//
232
+// ST7920 Delays
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+//
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+#ifndef ST7920_DELAY_1
235
+  #define ST7920_DELAY_1 DELAY_NS(96)
236
+#endif
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+#ifndef ST7920_DELAY_2
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+  #define ST7920_DELAY_2 DELAY_NS(48)
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+#endif
240
+#ifndef ST7920_DELAY_3
241
+  #define ST7920_DELAY_3 DELAY_NS(715)
242
+#endif

+ 65
- 0
buildroot/share/PlatformIO/boards/FLYF407ZG.json Zobrazit soubor

@@ -0,0 +1,65 @@
1
+{
2
+  "build": {
3
+    "core": "stm32",
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+    "cpu": "cortex-m4",
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+    "extra_flags": "-DSTM32F407xx",
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+    "f_cpu": "168000000L",
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+    "hwids": [
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+      [
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+        "0x1EAF",
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+        "0x0003"
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+      ],
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+      [
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+        "0x0483",
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+        "0x3748"
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+      ]
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+    ],
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+    "ldscript": "stm32f407xg.ld",
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+    "mcu": "stm32f407zgt6",
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+    "variant": "FLY_F407ZG"
20
+  },
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+  "debug": {
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+    "jlink_device": "STM32F407ZG",
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+    "openocd_target": "stm32f4x",
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+    "svd_path": "STM32F40x.svd",
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+    "tools": {
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+      "stlink": {
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+        "server": {
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+          "arguments": [
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+            "-f",
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+            "scripts/interface/stlink.cfg",
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+            "-c",
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+            "transport select hla_swd",
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+            "-f",
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+            "scripts/target/stm32f4x.cfg",
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+            "-c",
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+            "reset_config none"
37
+          ],
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+          "executable": "bin/openocd",
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+          "package": "tool-openocd"
40
+        }
41
+      }
42
+    }
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+  },
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+  "frameworks": [
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+    "arduino",
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+    "stm32cube"
47
+  ],
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+  "name": "STM32F407ZGT6(192k RAM. 1024k Flash)",
49
+  "upload": {
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+    "disable_flushing": false,
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+    "maximum_ram_size": 196608,
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+    "maximum_size": 1048576,
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+    "protocol": "dfu",
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+    "protocols": [
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+      "stlink",
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+      "dfu",
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+      "jlink"
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+    ],
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+    "require_upload_port": true,
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+    "use_1200bps_touch": false,
61
+    "wait_for_upload_port": false
62
+  },
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+  "url": "http://www.st.com/en/microcontrollers/stm32f407ZG.html",
64
+  "vendor": "Generic"
65
+}

+ 419
- 0
buildroot/share/PlatformIO/variants/FLY_F407ZG/PeripheralPins.c Zobrazit soubor

@@ -0,0 +1,419 @@
1
+/*
2
+ *******************************************************************************
3
+ * Copyright (c) 2019, STMicroelectronics
4
+ * All rights reserved.
5
+ *
6
+ * Redistribution and use in source and binary forms, with or without
7
+ * modification, are permitted provided that the following conditions are met:
8
+ *
9
+ * 1. Redistributions of source code must retain the above copyright notice,
10
+ *    this list of conditions and the following disclaimer.
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
15
+ *    may be used to endorse or promote products derived from this software
16
+ *    without specific prior written permission.
17
+ *
18
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
+ *******************************************************************************
29
+ * Automatically generated from STM32F407Z(E-G)Tx.xml
30
+ */
31
+#include <Arduino.h>
32
+#include <PeripheralPins.h>
33
+
34
+
35
+/* =====
36
+ * Note: Commented lines are alternative possibilities which are not used per default.
37
+ *       If you change them, you will have to know what you do
38
+ * =====
39
+ */
40
+
41
+//*** ADC ***
42
+
43
+#ifdef HAL_ADC_MODULE_ENABLED
44
+const PinMap PinMap_ADC[] = {
45
+  {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
46
+  //  {PA_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
47
+  //  {PA_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
48
+  {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
49
+  //  {PA_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
50
+  //  {PA_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
51
+  //  {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
52
+  {PA_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
53
+  //  {PA_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
54
+  //  {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
55
+  //  {PA_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
56
+  {PA_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
57
+  {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
58
+  //  {PA_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
59
+  //  {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
60
+  {PA_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
61
+  {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
62
+  //  {PA_6,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
63
+  {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
64
+  //  {PA_7,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
65
+  //  {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
66
+  {PB_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
67
+  {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
68
+  //  {PB_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
69
+  //  {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
70
+  //  {PC_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
71
+  {PC_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
72
+  {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
73
+  //  {PC_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
74
+  //  {PC_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
75
+  //  {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
76
+  {PC_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
77
+  //  {PC_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
78
+  //  {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
79
+  //  {PC_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
80
+  {PC_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
81
+  //  {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
82
+  {PC_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
83
+  //  {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
84
+  {PC_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
85
+  {PF_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9
86
+  {PF_4,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14
87
+  {PF_5,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15
88
+  {PF_6,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4
89
+  {PF_7,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5
90
+  {PF_8,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6
91
+  //  {PF_9,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7
92
+  {PF_10, ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8
93
+  {NC,    NP,    0}
94
+};
95
+#endif
96
+
97
+//*** DAC ***
98
+
99
+#ifdef HAL_DAC_MODULE_ENABLED
100
+const PinMap PinMap_DAC[] = {
101
+  {PA_4,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
102
+  {PA_5,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
103
+  {NC,    NP,    0}
104
+};
105
+#endif
106
+
107
+//*** I2C ***
108
+
109
+#ifdef HAL_I2C_MODULE_ENABLED
110
+const PinMap PinMap_I2C_SDA[] = {
111
+  {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
112
+  {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
113
+  {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
114
+  {PC_9,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
115
+  {PF_0,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
116
+  {NC,    NP,    0}
117
+};
118
+#endif
119
+
120
+#ifdef HAL_I2C_MODULE_ENABLED
121
+const PinMap PinMap_I2C_SCL[] = {
122
+  {PA_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
123
+  {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
124
+  {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
125
+  {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
126
+  {PF_1,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
127
+  {NC,    NP,    0}
128
+};
129
+#endif
130
+
131
+//*** PWM ***
132
+
133
+#ifdef HAL_TIM_MODULE_ENABLED
134
+const PinMap PinMap_PWM[] = {
135
+  {PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
136
+  //  {PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
137
+  {PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
138
+  //  {PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
139
+  {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
140
+  //  {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
141
+  //  {PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
142
+  {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
143
+  //  {PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
144
+  //  {PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
145
+  {PA_5,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
146
+  //  {PA_5,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
147
+  {PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
148
+  //  {PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
149
+  //  {PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
150
+  {PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
151
+  //  {PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
152
+  //  {PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
153
+  {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
154
+  {PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
155
+  {PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
156
+  {PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
157
+  //  {PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
158
+  //  {PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
159
+  {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
160
+  //  {PB_0,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
161
+  //  {PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
162
+  {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
163
+  //  {PB_1,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
164
+  //  {PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
165
+  {PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
166
+  {PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
167
+  {PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
168
+  {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
169
+  {PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
170
+  {PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
171
+  {PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
172
+  {PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
173
+  {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
174
+  {PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
175
+  {PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
176
+  {PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
177
+  {PB_14, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
178
+  {PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
179
+  {PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
180
+  {PB_15, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
181
+  {PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
182
+  {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
183
+  {PC_6,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
184
+  {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
185
+  {PC_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
186
+  {PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
187
+  {PC_8,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
188
+  {PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
189
+  {PC_9,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
190
+  {PD_12, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
191
+  {PD_13, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
192
+  {PD_14, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
193
+  {PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
194
+  {PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
195
+  {PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
196
+  {PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
197
+  {PE_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
198
+  {PE_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
199
+  {PE_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
200
+  {PE_12, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
201
+  {PE_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
202
+  {PE_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
203
+  {PF_6,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
204
+  {PF_7,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
205
+  {PF_8,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
206
+  {PF_9,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
207
+  {NC,    NP,    0}
208
+};
209
+#endif
210
+
211
+//*** SERIAL ***
212
+
213
+#ifdef HAL_UART_MODULE_ENABLED
214
+const PinMap PinMap_UART_TX[] = {
215
+  {PA_0,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
216
+  {PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
217
+  {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
218
+  {PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
219
+  {PB_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
220
+  {PC_6,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
221
+  //  {PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
222
+  {PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
223
+  {PC_12, UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
224
+  {PD_5,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
225
+  {PD_8,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
226
+  {PG_14, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
227
+  {NC,    NP,    0}
228
+};
229
+#endif
230
+
231
+#ifdef HAL_UART_MODULE_ENABLED
232
+const PinMap PinMap_UART_RX[] = {
233
+  {PA_1,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
234
+  {PA_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
235
+  {PA_10, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
236
+  {PB_7,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
237
+  {PB_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
238
+  {PC_7,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
239
+  //  {PC_11, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
240
+  {PC_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
241
+  {PD_2,  UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
242
+  {PD_6,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
243
+  {PD_9,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
244
+  {PG_9,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
245
+  {NC,    NP,    0}
246
+};
247
+#endif
248
+
249
+#ifdef HAL_UART_MODULE_ENABLED
250
+const PinMap PinMap_UART_RTS[] = {
251
+  {PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
252
+  {PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
253
+  {PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
254
+  {PD_4,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
255
+  {PD_12, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
256
+  {PG_8,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
257
+  {PG_12, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
258
+  {NC,    NP,    0}
259
+};
260
+#endif
261
+
262
+#ifdef HAL_UART_MODULE_ENABLED
263
+const PinMap PinMap_UART_CTS[] = {
264
+  {PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
265
+  {PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
266
+  {PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
267
+  {PD_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
268
+  {PD_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
269
+  {PG_13, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
270
+  {PG_15, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
271
+  {NC,    NP,    0}
272
+};
273
+#endif
274
+
275
+//*** SPI ***
276
+
277
+#ifdef HAL_SPI_MODULE_ENABLED
278
+const PinMap PinMap_SPI_MOSI[] = {
279
+  {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
280
+  {PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
281
+  {PB_5,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
282
+  {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
283
+  {PC_3,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
284
+  {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
285
+  {NC,    NP,    0}
286
+};
287
+#endif
288
+
289
+#ifdef HAL_SPI_MODULE_ENABLED
290
+const PinMap PinMap_SPI_MISO[] = {
291
+  {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
292
+  {PB_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
293
+  {PB_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
294
+  {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
295
+  {PC_2,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
296
+  {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
297
+  {NC,    NP,    0}
298
+};
299
+#endif
300
+
301
+#ifdef HAL_SPI_MODULE_ENABLED
302
+const PinMap PinMap_SPI_SCLK[] = {
303
+  {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
304
+  {PB_3,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
305
+  {PB_3,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
306
+  {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
307
+  {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
308
+  {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
309
+  {NC,    NP,    0}
310
+};
311
+#endif
312
+
313
+#ifdef HAL_SPI_MODULE_ENABLED
314
+const PinMap PinMap_SPI_SSEL[] = {
315
+  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
316
+  {PA_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
317
+  {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
318
+  {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
319
+  {PB_9,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
320
+  {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
321
+  {NC,    NP,    0}
322
+};
323
+#endif
324
+
325
+//*** CAN ***
326
+
327
+#ifdef HAL_CAN_MODULE_ENABLED
328
+const PinMap PinMap_CAN_RD[] = {
329
+  {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
330
+  {PB_5,  CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
331
+  {PB_8,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
332
+  {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
333
+  {PD_0,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
334
+  {NC,    NP,    0}
335
+};
336
+#endif
337
+
338
+#ifdef HAL_CAN_MODULE_ENABLED
339
+const PinMap PinMap_CAN_TD[] = {
340
+  {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
341
+  {PB_6,  CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
342
+  {PB_9,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
343
+  {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
344
+  {PD_1,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
345
+  {NC,    NP,    0}
346
+};
347
+#endif
348
+
349
+//*** ETHERNET ***
350
+
351
+#ifdef HAL_ETH_MODULE_ENABLED
352
+const PinMap PinMap_Ethernet[] = {
353
+  {PA_0,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
354
+  {PA_1,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK
355
+  {PA_2,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
356
+  {PA_3,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
357
+  {PA_7,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV
358
+  {PB_0,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
359
+  {PB_1,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
360
+  {PB_5,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
361
+  {PB_8,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
362
+  {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
363
+  {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
364
+  {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
365
+  {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
366
+  {PC_1,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
367
+  {PC_2,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
368
+  {PC_3,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
369
+  {PC_4,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
370
+  {PC_5,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
371
+  {PE_2,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
372
+  {PG_8,  ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
373
+  {PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
374
+  {PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
375
+  {PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
376
+  {NC,    NP,    0}
377
+};
378
+#endif
379
+
380
+//*** No QUADSPI ***
381
+
382
+//*** USB ***
383
+
384
+#ifdef HAL_PCD_MODULE_ENABLED
385
+const PinMap PinMap_USB_OTG_FS[] = {
386
+  //  {PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
387
+  //  {PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
388
+  //  {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
389
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
390
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
391
+  {NC,    NP,    0}
392
+};
393
+#endif
394
+
395
+#ifdef HAL_PCD_MODULE_ENABLED
396
+const PinMap PinMap_USB_OTG_HS[] = {
397
+#ifdef USE_USB_HS_IN_FS
398
+  {PA_4,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF
399
+  {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
400
+  {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
401
+  {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
402
+  {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
403
+#else
404
+  {PA_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
405
+  {PA_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK
406
+  {PB_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
407
+  {PB_1,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
408
+  {PB_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
409
+  {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
410
+  {PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4
411
+  {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
412
+  {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
413
+  {PC_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
414
+  {PC_2,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
415
+  {PC_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
416
+#endif /* USE_USB_HS_IN_FS */
417
+  {NC,    NP,    0}
418
+};
419
+#endif

+ 50
- 0
buildroot/share/PlatformIO/variants/FLY_F407ZG/PinNamesVar.h Zobrazit soubor

@@ -0,0 +1,50 @@
1
+/* SYS_WKUP */
2
+#ifdef PWR_WAKEUP_PIN1
3
+SYS_WKUP1 = PA_0,
4
+#endif
5
+#ifdef PWR_WAKEUP_PIN2
6
+SYS_WKUP2 = NC,
7
+#endif
8
+#ifdef PWR_WAKEUP_PIN3
9
+SYS_WKUP3 = NC,
10
+#endif
11
+#ifdef PWR_WAKEUP_PIN4
12
+SYS_WKUP4 = NC,
13
+#endif
14
+#ifdef PWR_WAKEUP_PIN5
15
+SYS_WKUP5 = NC,
16
+#endif
17
+#ifdef PWR_WAKEUP_PIN6
18
+SYS_WKUP6 = NC,
19
+#endif
20
+#ifdef PWR_WAKEUP_PIN7
21
+SYS_WKUP7 = NC,
22
+#endif
23
+#ifdef PWR_WAKEUP_PIN8
24
+SYS_WKUP8 = NC,
25
+#endif
26
+/* USB */
27
+#ifdef USBCON
28
+USB_OTG_FS_SOF = PA_8,
29
+USB_OTG_FS_VBUS = PA_9,
30
+USB_OTG_FS_ID = PA_10,
31
+USB_OTG_FS_DM = PA_11,
32
+USB_OTG_FS_DP = PA_12,
33
+USB_OTG_HS_ULPI_D0 = PA_3,
34
+USB_OTG_HS_SOF = PA_4,
35
+USB_OTG_HS_ULPI_CK = PA_5,
36
+USB_OTG_HS_ULPI_D1 = PB_0,
37
+USB_OTG_HS_ULPI_D2 = PB_1,
38
+USB_OTG_HS_ULPI_D7 = PB_5,
39
+USB_OTG_HS_ULPI_D3 = PB_10,
40
+USB_OTG_HS_ULPI_D4 = PB_11,
41
+USB_OTG_HS_ID = PB_12,
42
+USB_OTG_HS_ULPI_D5 = PB_12,
43
+USB_OTG_HS_ULPI_D6 = PB_13,
44
+USB_OTG_HS_VBUS = PB_13,
45
+USB_OTG_HS_DM = PB_14,
46
+USB_OTG_HS_DP = PB_15,
47
+USB_OTG_HS_ULPI_STP = PC_0,
48
+USB_OTG_HS_ULPI_DIR = PC_2,
49
+USB_OTG_HS_ULPI_NXT = PC_3,
50
+#endif

+ 207
- 0
buildroot/share/PlatformIO/variants/FLY_F407ZG/ldscript.ld Zobrazit soubor

@@ -0,0 +1,207 @@
1
+/*
2
+*****************************************************************************
3
+**
4
+
5
+**  File        : lscript.ld
6
+**
7
+**  Abstract    : Linker script for STM32F407(VZ)(EG)Tx Device with
8
+**                512/1024KByte FLASH, 128KByte RAM
9
+**
10
+**                Set heap size, stack size and stack location according
11
+**                to application requirements.
12
+**
13
+**                Set memory bank area and size if external memory is used.
14
+**
15
+**  Target      : STMicroelectronics STM32
16
+**
17
+**
18
+**  Distribution: The file is distributed as is, without any warranty
19
+**                of any kind.
20
+**
21
+*****************************************************************************
22
+** @attention
23
+**
24
+** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
25
+**
26
+** Redistribution and use in source and binary forms, with or without modification,
27
+** are permitted provided that the following conditions are met:
28
+**   1. Redistributions of source code must retain the above copyright notice,
29
+**      this list of conditions and the following disclaimer.
30
+**   2. Redistributions in binary form must reproduce the above copyright notice,
31
+**      this list of conditions and the following disclaimer in the documentation
32
+**      and/or other materials provided with the distribution.
33
+**   3. Neither the name of Ac6 nor the names of its contributors
34
+**      may be used to endorse or promote products derived from this software
35
+**      without specific prior written permission.
36
+**
37
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
38
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
39
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
40
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
41
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
42
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
43
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
44
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
46
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47
+**
48
+*****************************************************************************
49
+*/
50
+
51
+/* Entry Point */
52
+ENTRY(Reset_Handler)
53
+
54
+/* Highest address of the user mode stack */
55
+_estack = 0x20020000;    /* end of RAM */
56
+/* Generate a link error if heap and stack don't fit into RAM */
57
+_Min_Heap_Size = 0x200;;      /* required amount of heap  */
58
+_Min_Stack_Size = 0x400;; /* required amount of stack */
59
+
60
+/* Specify the memory areas */
61
+MEMORY
62
+{
63
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
64
+CCMRAM (rw)      : ORIGIN = 0x10000000, LENGTH = 64K
65
+FLASH (rx)      : ORIGIN = 0x8008000, LENGTH = 1024K -32K
66
+}
67
+
68
+/* Define output sections */
69
+SECTIONS
70
+{
71
+  /* The startup code goes first into FLASH */
72
+  .isr_vector :
73
+  {
74
+    . = ALIGN(4);
75
+    KEEP(*(.isr_vector)) /* Startup code */
76
+    . = ALIGN(4);
77
+  } >FLASH
78
+
79
+  /* The program code and other data goes into FLASH */
80
+  .text ALIGN(4):
81
+  {
82
+    . = ALIGN(4);
83
+    *(.text)           /* .text sections (code) */
84
+    *(.text*)          /* .text* sections (code) */
85
+    *(.glue_7)         /* glue arm to thumb code */
86
+    *(.glue_7t)        /* glue thumb to arm code */
87
+    *(.eh_frame)
88
+
89
+    KEEP (*(.init))
90
+    KEEP (*(.fini))
91
+
92
+    . = ALIGN(4);
93
+    _etext = .;        /* define a global symbols at end of code */
94
+  } >FLASH
95
+
96
+  /* Constant data goes into FLASH */
97
+  .rodata ALIGN(4):
98
+  {
99
+    . = ALIGN(4);
100
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
101
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
102
+    . = ALIGN(4);
103
+  } >FLASH
104
+
105
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
106
+  .ARM : {
107
+    __exidx_start = .;
108
+    *(.ARM.exidx*)
109
+    __exidx_end = .;
110
+  } >FLASH
111
+
112
+  .preinit_array     :
113
+  {
114
+    PROVIDE_HIDDEN (__preinit_array_start = .);
115
+    KEEP (*(.preinit_array*))
116
+    PROVIDE_HIDDEN (__preinit_array_end = .);
117
+  } >FLASH
118
+  .init_array :
119
+  {
120
+    PROVIDE_HIDDEN (__init_array_start = .);
121
+    KEEP (*(SORT(.init_array.*)))
122
+    KEEP (*(.init_array*))
123
+    PROVIDE_HIDDEN (__init_array_end = .);
124
+  } >FLASH
125
+  .fini_array :
126
+  {
127
+    PROVIDE_HIDDEN (__fini_array_start = .);
128
+    KEEP (*(SORT(.fini_array.*)))
129
+    KEEP (*(.fini_array*))
130
+    PROVIDE_HIDDEN (__fini_array_end = .);
131
+  } >FLASH
132
+
133
+  /* used by the startup to initialize data */
134
+  _sidata = LOADADDR(.data);
135
+
136
+  /* Initialized data sections goes into RAM, load LMA copy after code */
137
+  .data : 
138
+  {
139
+    . = ALIGN(4);
140
+    _sdata = .;        /* create a global symbol at data start */
141
+    *(.data)           /* .data sections */
142
+    *(.data*)          /* .data* sections */
143
+
144
+    . = ALIGN(4);
145
+    _edata = .;        /* define a global symbol at data end */
146
+  } >RAM AT> FLASH
147
+
148
+  _siccmram = LOADADDR(.ccmram);
149
+
150
+  /* CCM-RAM section 
151
+  * 
152
+  * IMPORTANT NOTE! 
153
+  * If initialized variables will be placed in this section,
154
+  * the startup code needs to be modified to copy the init-values.  
155
+  */
156
+  .ccmram :
157
+  {
158
+    . = ALIGN(4);
159
+    _sccmram = .;       /* create a global symbol at ccmram start */
160
+    *(.ccmram)
161
+    *(.ccmram*)
162
+    
163
+    . = ALIGN(4);
164
+    _eccmram = .;       /* create a global symbol at ccmram end */
165
+  } >CCMRAM AT> FLASH
166
+
167
+  
168
+  /* Uninitialized data section */
169
+  . = ALIGN(4);
170
+  .bss :
171
+  {
172
+    /* This is used by the startup in order to initialize the .bss secion */
173
+    _sbss = .;         /* define a global symbol at bss start */
174
+    __bss_start__ = _sbss;
175
+    *(.bss)
176
+    *(.bss*)
177
+    *(COMMON)
178
+
179
+    . = ALIGN(4);
180
+    _ebss = .;         /* define a global symbol at bss end */
181
+    __bss_end__ = _ebss;
182
+  } >RAM
183
+
184
+  /* User_heap_stack section, used to check that there is enough RAM left */
185
+  ._user_heap_stack :
186
+  {
187
+    . = ALIGN(4);
188
+    PROVIDE ( end = . );
189
+    PROVIDE ( _end = . );
190
+    . = . + _Min_Heap_Size;
191
+    . = . + _Min_Stack_Size;
192
+    . = ALIGN(4);
193
+  } >RAM
194
+  
195
+
196
+  /* Remove information from the standard libraries */
197
+  /DISCARD/ :
198
+  {
199
+    libc.a ( * )
200
+    libm.a ( * )
201
+    libgcc.a ( * )
202
+  }
203
+
204
+  .ARM.attributes 0 : { *(.ARM.attributes) }
205
+}
206
+
207
+

+ 210
- 0
buildroot/share/PlatformIO/variants/FLY_F407ZG/variant.cpp Zobrazit soubor

@@ -0,0 +1,210 @@
1
+/*
2
+ *******************************************************************************
3
+ * Copyright (c) 2017, STMicroelectronics
4
+ * All rights reserved.
5
+ *
6
+ * Redistribution and use in source and binary forms, with or without
7
+ * modification, are permitted provided that the following conditions are met:
8
+ *
9
+ * 1. Redistributions of source code must retain the above copyright notice,
10
+ *    this list of conditions and the following disclaimer.
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
15
+ *    may be used to endorse or promote products derived from this software
16
+ *    without specific prior written permission.
17
+ *
18
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
+ *******************************************************************************
29
+ */
30
+
31
+#include "pins_arduino.h"
32
+
33
+#ifdef __cplusplus
34
+extern "C" {
35
+#endif
36
+
37
+
38
+const PinName digitalPin[] = {
39
+ PB_12,
40
+ PB_13,
41
+ PB_14,
42
+ PB_15,
43
+ PD_8,
44
+ PD_9,
45
+ PD_10,
46
+ PD_11,
47
+ PD_12,
48
+ PD_13,
49
+ PD_14,
50
+ PD_15,
51
+ PG_2,
52
+ PG_3,
53
+ PG_4,
54
+ PG_5,
55
+ PG_6,
56
+ PG_7,
57
+ PG_8,
58
+ PC_6,
59
+ PC_7,
60
+ PC_8,
61
+ PC_9,
62
+ PA_8,
63
+ PA_9,
64
+ PA_10,
65
+ PA_11,
66
+ PA_12,
67
+ PA_13,
68
+ PA_14,
69
+ PA_15,
70
+ PC_10,
71
+ PC_11,
72
+ PC_12,
73
+ PD_0,
74
+ PD_1,
75
+ PD_2,
76
+ PD_3,
77
+ PD_4,
78
+ PD_5,
79
+ PD_6,
80
+ PD_7,
81
+ PG_9,
82
+ PG_10,
83
+ PG_11,
84
+ PG_12,
85
+ PG_13,
86
+ PG_14,
87
+ PG_15,
88
+ PB_3,
89
+ PB_4,
90
+ PB_5,
91
+ PB_6,
92
+ PB_7,
93
+ PB_8,
94
+ PB_9,
95
+ PB_10,
96
+ PB_11,
97
+ PE_14,
98
+ PE_15,
99
+ PE_12,
100
+ PE_13,
101
+ PE_10,
102
+ PE_11,
103
+ PE_8,
104
+ PE_9,
105
+ PG_1,
106
+ PE_7,
107
+ PF_15,
108
+ PG_0,
109
+ PF_13,
110
+ PF_14,
111
+ PF_11,
112
+ PF_12,
113
+ PB_2,
114
+ PB_1,
115
+ PC_5,
116
+ PB_0,
117
+ PA_7,
118
+ PC_4,
119
+ PA_5,
120
+ PA_6,
121
+ PA_3,
122
+ PA_4,
123
+ PA_1,
124
+ PA_2,
125
+ PC_3,
126
+ PA_0,
127
+ PC_1,
128
+ PC_2,
129
+ PC_0,
130
+ PF_8,
131
+ PF_6,
132
+ PF_7,
133
+ PF_9,
134
+ PF_10,
135
+ PF_4,
136
+ PF_5,
137
+ PF_2,
138
+ PF_3,
139
+ PF_0,
140
+ PF_1,
141
+ PE_6,
142
+ PC_13,
143
+ PE_4,
144
+ PE_5,
145
+ PE_2,
146
+ PE_3,
147
+ PE_0,
148
+ PE_1,
149
+ PC_14,
150
+ PC_15,
151
+};
152
+
153
+#ifdef __cplusplus
154
+}
155
+#endif
156
+
157
+// ----------------------------------------------------------------------------
158
+
159
+#ifdef __cplusplus
160
+extern "C" {
161
+#endif
162
+
163
+/**
164
+  * @brief  System Clock Configuration
165
+  * @param  None
166
+  * @retval None
167
+  */
168
+WEAK void SystemClock_Config(void)
169
+{
170
+
171
+  RCC_OscInitTypeDef RCC_OscInitStruct;
172
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
173
+
174
+  /**Configure the main internal regulator output voltage
175
+  */
176
+  __HAL_RCC_PWR_CLK_ENABLE();
177
+
178
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
179
+
180
+  /**Initializes the CPU, AHB and APB busses clocks
181
+  */
182
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
183
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
184
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
185
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
186
+  RCC_OscInitStruct.PLL.PLLM = 8;
187
+  RCC_OscInitStruct.PLL.PLLN = 336;
188
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
189
+  RCC_OscInitStruct.PLL.PLLQ = 7;
190
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
191
+    _Error_Handler(__FILE__, __LINE__);
192
+  }
193
+
194
+  /**Initializes the CPU, AHB and APB busses clocks
195
+  */
196
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
197
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
198
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
199
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
200
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
201
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
202
+
203
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
204
+    _Error_Handler(__FILE__, __LINE__);
205
+  }
206
+}
207
+
208
+#ifdef __cplusplus
209
+}
210
+#endif

+ 238
- 0
buildroot/share/PlatformIO/variants/FLY_F407ZG/variant.h Zobrazit soubor

@@ -0,0 +1,238 @@
1
+/*
2
+ *******************************************************************************
3
+ * Copyright (c) 2017, STMicroelectronics
4
+ * All rights reserved.
5
+ *
6
+ * Redistribution and use in source and binary forms, with or without
7
+ * modification, are permitted provided that the following conditions are met:
8
+ *
9
+ * 1. Redistributions of source code must retain the above copyright notice,
10
+ *    this list of conditions and the following disclaimer.
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
15
+ *    may be used to endorse or promote products derived from this software
16
+ *    without specific prior written permission.
17
+ *
18
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
+ *******************************************************************************
29
+ */
30
+
31
+#pragma once
32
+
33
+#ifdef __cplusplus
34
+extern "C" {
35
+#endif // __cplusplus
36
+
37
+/*----------------------------------------------------------------------------
38
+ *        Pins
39
+ *----------------------------------------------------------------------------*/
40
+
41
+// Left Side
42
+#define PB12 0
43
+#define PB13 1
44
+#define PB14 2
45
+#define PB15 3
46
+#define PD8  4
47
+#define PD9  5
48
+#define PD10 6
49
+#define PD11 7
50
+#define PD12 8
51
+#define PD13 9
52
+#define PD14 10
53
+#define PD15 11
54
+#define PG2  12
55
+#define PG3  13
56
+#define PG4  14
57
+#define PG5  15
58
+#define PG6  16
59
+#define PG7  17
60
+#define PG8  18
61
+#define PC6  19
62
+#define PC7  20
63
+#define PC8  21
64
+#define PC9  22
65
+#define PA8  23
66
+#define PA9  24
67
+#define PA10 25
68
+#define PA11 26 // USB_DM
69
+#define PA12 27 // USB_DP
70
+#define PA13 28
71
+#define PA14 29
72
+#define PA15 30
73
+#define PC10 31
74
+#define PC11 32
75
+#define PC12 33
76
+#define PD0  34
77
+#define PD1  35
78
+#define PD2  36
79
+#define PD3  37
80
+#define PD4  38
81
+#define PD5  39
82
+#define PD6  40
83
+#define PD7  41
84
+#define PG9  42
85
+#define PG10 43
86
+#define PG11 44
87
+#define PG12 45
88
+#define PG13 46
89
+#define PG14 47
90
+#define PG15 48
91
+#define PB3  49
92
+#define PB4  50
93
+#define PB5  51
94
+#define PB6  52
95
+#define PB7  53
96
+#define PB8  54
97
+#define PB9  55
98
+
99
+// Right Side
100
+#define PB10 56
101
+#define PB11 57
102
+#define PE14 58
103
+#define PE15 59
104
+#define PE12 60
105
+#define PE13 61
106
+#define PE10 62
107
+#define PE11 63
108
+#define PE8  64
109
+#define PE9  65
110
+#define PG1  66
111
+#define PE7  67
112
+#define PF15 68
113
+#define PG0  69
114
+#define PF13 70
115
+#define PF14 71
116
+#define PF11 72
117
+#define PF12 73
118
+#define PB2  74
119
+#define PB1  75 // A0
120
+#define PC5  76 // A1
121
+#define PB0  77 // A2
122
+#define PA7  78 // A3
123
+#define PC4  79 // A4
124
+#define PA5  80 // A5
125
+#define PA6  81 // A6
126
+#define PA3  82 // A7
127
+#define PA4  83 // A8
128
+#define PA1  84 // A9
129
+#define PA2  85 // A10
130
+#define PC3  86 // A11
131
+#define PA0  87 // A12/PA_0(WK_UP): BUT K_UP)
132
+#define PC1  88 // A13
133
+#define PC2  89 // A14
134
+#define PC0  90 // A15
135
+#define PF8  91 // A16
136
+#define PF6  92 // A17
137
+#define PF7  93 // A18
138
+#define PF9  94 // LED D1 (active low)
139
+#define PF10 95 // LED D2 (active low)
140
+#define PF4  96
141
+#define PF5  97
142
+#define PF2  98
143
+#define PF3  99
144
+#define PF0  100
145
+#define PF1  101
146
+#define PE6  102
147
+#define PC13 103
148
+#define PE4  104 // BUT K0
149
+#define PE5  105 // BUT K1
150
+#define PE2  106
151
+#define PE3  107
152
+#define PE0  108
153
+#define PE1  109
154
+#define PC14  110
155
+#define PC15  111
156
+// This must be a literal
157
+#define NUM_DIGITAL_PINS        112
158
+// This must be a literal with a value less than or equal to MAX_ANALOG_INPUTS
159
+#define NUM_ANALOG_INPUTS       23
160
+#define NUM_ANALOG_FIRST        75
161
+
162
+
163
+// Below SPI and I2C definitions already done in the core
164
+// Could be redefined here if differs from the default one
165
+// SPI Definitions
166
+#define PIN_SPI_SS              PF11 
167
+#define PIN_SPI_MOSI            PB15
168
+#define PIN_SPI_MISO            PB14 
169
+#define PIN_SPI_SCK             PB13 
170
+
171
+
172
+
173
+//max6675
174
+//#define PIN_SPI_SS              PA4 
175
+//#define PIN_SPI_SCK             PA5
176
+//#define PIN_SPI_MISO            PA6
177
+//#define PIN_SPI_MOSI            PA7
178
+
179
+
180
+
181
+
182
+// I2C Definitions
183
+#define PIN_WIRE_SDA            PB7
184
+#define PIN_WIRE_SCL            PB6
185
+
186
+// Timer Definitions
187
+//Do not use timer used by PWM pins when possible. See PinMap_PWM in PeripheralPins.c
188
+#define TIMER_TONE              TIM6
189
+
190
+// Do not use basic timer: OC is required
191
+#define TIMER_SERVO             TIM1  //TODO: advanced-control timers don't work
192
+
193
+// UART Definitions
194
+// Define here Serial instance number to map on Serial generic name
195
+#define SERIAL_UART_INSTANCE    1 //ex: 2 for Serial2 (USART2)
196
+// DEBUG_UART could be redefined to print on another instance than 'Serial'
197
+//#define DEBUG_UART              ((USART_TypeDef *) U(S)ARTX) // ex: USART3
198
+// DEBUG_UART baudrate, default: 9600 if not defined
199
+//#define DEBUG_UART_BAUDRATE     x
200
+// DEBUG_UART Tx pin name, default: the first one found in PinMap_UART_TX for DEBUG_UART
201
+//#define DEBUG_PINNAME_TX        PX_n // PinName used for TX
202
+
203
+// Default pin used for 'Serial' instance (ex: ST-Link)
204
+// Mandatory for Firmata
205
+#define PIN_SERIAL_RX           PA10
206
+#define PIN_SERIAL_TX           PA9
207
+
208
+/* Extra HAL modules */
209
+//#define HAL_DAC_MODULE_ENABLED
210
+#define HAL_SD_MODULE_ENABLED
211
+
212
+#ifdef __cplusplus
213
+} // extern "C"
214
+#endif
215
+/*----------------------------------------------------------------------------
216
+ *        Arduino objects - C++ only
217
+ *----------------------------------------------------------------------------*/
218
+
219
+#ifdef __cplusplus
220
+// These serial port names are intended to allow libraries and architecture-neutral
221
+// sketches to automatically default to the correct port name for a particular type
222
+// of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
223
+// the first hardware serial port whose RX/TX pins are not dedicated to another use.
224
+//
225
+// SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
226
+//
227
+// SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
228
+//
229
+// SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
230
+//
231
+// SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
232
+//
233
+// SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
234
+//                            pins are NOT connected to anything by default.
235
+#define SERIAL_PORT_MONITOR     Serial
236
+#define SERIAL_PORT_HARDWARE    Serial1
237
+#endif
238
+

+ 19
- 0
platformio.ini Zobrazit soubor

@@ -581,6 +581,25 @@ src_filter    = ${common.default_src_filter} +<src/HAL/HAL_STM32F1>
581 581
 lib_ignore    = Adafruit NeoPixel
582 582
 monitor_speed = 250000
583 583
 
584
+
585
+#
586
+# FLYF407ZG
587
+#
588
+[env:FLYF407ZG]
589
+platform          = ststm32
590
+board             = FLYF407ZG
591
+platform_packages = framework-arduinoststm32@>=3.10700.191028
592
+build_flags       = ${common.build_flags}
593
+  -DSTM32F4 -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483 -DUSB_PRODUCT=\"STM32F407ZG\"
594
+  -DTARGET_STM32F4 -DVECT_TAB_OFFSET=0x8000
595
+  -IMarlin/src/HAL/HAL_STM32
596
+build_unflags     = -std=gnu++11
597
+extra_scripts     = pre:buildroot/share/PlatformIO/scripts/generic_create_variant.py
598
+lib_ignore        = Adafruit NeoPixel, TMCStepper, SailfishLCD, SailfishRGB_LED, SlowSoftI2CMaster, SoftwareSerial
599
+src_filter        = ${common.default_src_filter} +<src/HAL/HAL_STM32>
600
+monitor_speed     = 250000
601
+
602
+
584 603
 #
585 604
 # FYSETC S6 (STM32F446VET6 ARM Cortex-M4)
586 605
 #

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