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✨ Artillery Ruby (STM32F401RCT6) (#23029)

Keith Bennett 3 years ago
parent
commit
7942f71d26
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+ 1
- 1
Marlin/src/HAL/STM32/HAL.cpp View File

@@ -154,7 +154,7 @@ void HAL_adc_start_conversion(const uint8_t adc_pin) { HAL_adc_result = analogRe
154 154
 uint16_t HAL_adc_get_result() { return HAL_adc_result; }
155 155
 
156 156
 // Reset the system to initiate a firmware flash
157
-void flashFirmware(const int16_t) { HAL_reboot(); }
157
+WEAK void flashFirmware(const int16_t) { HAL_reboot(); }
158 158
 
159 159
 // Maple Compatibility
160 160
 volatile uint32_t systick_uptime_millis = 0;

+ 1
- 0
Marlin/src/core/boards.h View File

@@ -406,6 +406,7 @@
406 406
 #define BOARD_INDEX_REV03             4234  // Index PnP Controller REV03 (STM32F407VET6/VGT6)
407 407
 #define BOARD_MKS_ROBIN_NANO_V1_3_F4  4235  // MKS Robin Nano V1.3 and MKS Robin Nano-S V1.3 (STM32F407VET6)
408 408
 #define BOARD_MKS_EAGLE               4236  // MKS Eagle (STM32F407VET6)
409
+#define BOARD_ARTILLERY_RUBY          4237  // Artillery Ruby (STM32F401RCT6)
409 410
 
410 411
 //
411 412
 // ARM Cortex M7

+ 2
- 0
Marlin/src/pins/pins.h View File

@@ -667,6 +667,8 @@
667 667
   #include "stm32f4/pins_MKS_ROBIN_NANO_V1_3_F4.h" // STM32F4                             env:mks_robin_nano_v1_3_f4
668 668
 #elif MB(MKS_EAGLE)
669 669
   #include "stm32f4/pins_MKS_EAGLE.h"           // STM32F4                                env:mks_eagle
670
+#elif MB(ARTILLERY_RUBY)
671
+  #include "stm32f4/pins_ARTILLERY_RUBY.h"      // STM32F4                                env:Artillery_Ruby
670 672
 
671 673
 //
672 674
 // ARM Cortex M7

+ 182
- 0
Marlin/src/pins/stm32f4/pins_ARTILLERY_RUBY.h View File

@@ -0,0 +1,182 @@
1
+/**
2
+ * Marlin 3D Printer Firmware
3
+ * Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
4
+ *
5
+ * Based on Sprinter and grbl.
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+ * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
7
+ *
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+ * This program is free software: you can redistribute it and/or modify
9
+ * it under the terms of the GNU General Public License as published by
10
+ * the Free Software Foundation, either version 3 of the License, or
11
+ * (at your option) any later version.
12
+ *
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+ * This program is distributed in the hope that it will be useful,
14
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
15
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
+ * GNU General Public License for more details.
17
+ *
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+ * You should have received a copy of the GNU General Public License
19
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20
+ *
21
+ */
22
+#pragma once
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+
24
+#include "env_validate.h"
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+
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+#if HOTENDS > 1 || E_STEPPERS > 1
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+  #error "Artillery Ruby supports up to 1 hotends / E-steppers."
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+#endif
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+
30
+#define BOARD_INFO_NAME      "Artillery Ruby"
31
+
32
+#define FLASH_EEPROM_EMULATION
33
+//#define I2C_EEPROM
34
+//#define E2END                            0xFFF  // 4KB
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+
36
+#define HAL_TIMER_RATE                     F_CPU
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+
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+//
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+// Limit Switches
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+//
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+#if (X_HOME_DIR == 1)
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+  #define X_MIN_PIN                         -1
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+  #define X_MAX_PIN                         PA2
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+#else
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+  #define X_MIN_PIN                         PA2
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+  #define X_MAX_PIN                         -1
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+#endif
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+#if (Y_HOME_DIR == 1)
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+  #define Y_MIN_PIN                         -1
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+  #define Y_MAX_PIN                         PA1
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+#else
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+  #define Y_MIN_PIN                         PA1
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+  #define Y_MAX_PIN                         -1
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+#endif
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+#if (Z_HOME_DIR == 1)
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+  #define Z_MIN_PIN                         PC2
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+  #define Z_MAX_PIN                         PA0
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+#else
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+  #define Z_MIN_PIN                         PA0
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+  #define Z_MAX_PIN                         PC2
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+#endif
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+
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+//
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+// Steppers
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+//
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+#define X_STEP_PIN                          PB14
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+#define X_DIR_PIN                           PB13
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+#define X_ENABLE_PIN                        PB15
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+
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+#define Y_STEP_PIN                          PB10
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+#define Y_DIR_PIN                           PB2
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+#define Y_ENABLE_PIN                        PB12
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+
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+#define Z_STEP_PIN                          PB0
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+#define Z_DIR_PIN                           PC5
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+#define Z_ENABLE_PIN                        PB1
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+
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+#define E0_STEP_PIN                         PA7
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+#define E0_DIR_PIN                          PA6
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+#define E0_ENABLE_PIN                       PC4
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+
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+#define E1_STEP_PIN                         PA4
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+#define E1_DIR_PIN                          PA3
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+#define E1_ENABLE_PIN                       PA5
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+
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+//
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+// Temperature Sensors
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+//
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+#define TEMP_0_PIN                          PC0
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+#define TEMP_BED_PIN                        PC1
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+
92
+//
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+// Heaters / Fans
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+//
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+#ifndef HEATER_0_PIN
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+  #define HEATER_0_PIN                      PC9   // Heater0
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+#endif
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+#ifndef HEATER_BED_PIN
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+  #define HEATER_BED_PIN                    PA8   // Hotbed
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+#endif
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+#ifndef FAN_PIN
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+  #define FAN_PIN                           PC8   // Fan0
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+#endif
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+#ifndef FAN1_PIN
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+  #define FAN1_PIN                          PC7   // Fan1
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+#endif
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+#ifndef FAN2_PIN
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+  #define FAN2_PIN                          PC6   // Fan2
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+#endif
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+
111
+//
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+// Servos
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+//
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+#define SERVO0_PIN                          PC3
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+
116
+//
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+// SPI
118
+//
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+#define SCK_PIN                             PC10
120
+#define MISO_PIN                            PC11
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+#define MOSI_PIN                            PC12
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+
123
+//
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+// LCD / Controller
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+//
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+#if HAS_WIRED_LCD
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+  #if EITHER(MKS_12864OLED, MKS_12864OLED_SSD1306)
128
+    #define LCD_PINS_DC                     PB8   // Set as output on init
129
+    #define LCD_PINS_RS                     PB9   // Pull low for 1s to init
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+    // DOGM SPI LCD Support
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+    #define DOGLCD_CS                       PC15
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+    #define DOGLCD_MOSI                     PB6
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+    #define DOGLCD_SCK                      PB5
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+    #define DOGLCD_A0                LCD_PINS_DC
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+  #elif ENABLED(FYSETC_MINI_12864)
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+    #define DOGLCD_CS                       PB6
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+    #define DOGLCD_A0                       PC15
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+
139
+    //#define FORCE_SOFT_SPI                      // Use this if default of hardware SPI causes display problems
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+                                                  //   results in LCD soft SPI mode 3, SD soft SPI mode 0
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+
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+    #define LCD_RESET_PIN                   PB5   // Must be high or open for LCD to operate normally.
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+
144
+    #if EITHER(FYSETC_MINI_12864_1_2, FYSETC_MINI_12864_2_0)
145
+      #ifndef RGB_LED_R_PIN
146
+        #define RGB_LED_R_PIN               PB9
147
+      #endif
148
+      #ifndef RGB_LED_G_PIN
149
+        #define RGB_LED_G_PIN               PB8
150
+      #endif
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+      #ifndef RGB_LED_B_PIN
152
+        #define RGB_LED_B_PIN               PB7
153
+      #endif
154
+    #elif ENABLED(FYSETC_MINI_12864_2_1)
155
+      #define NEOPIXEL_PIN                  PB9
156
+    #endif
157
+
158
+    #define DEFAULT_LCD_CONTRAST             255
159
+  #else
160
+    #define LCD_PINS_RS                     PC15
161
+    #define LCD_PINS_ENABLE                 PB6
162
+    #define LCD_PINS_D4                     PB5
163
+    #define LCD_PINS_D5                     PB9
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+    #define LCD_PINS_D6                     PB8
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+  #endif
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+
167
+  #define LCD_PINS_D7                       PB7
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+
169
+  //
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+  // Beeper, SD Card, Encoder
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+  //
172
+  #define BEEPER_PIN                        PC13
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+
174
+  #if ENABLED(SDSUPPORT)
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+    #define SDSS                            PA15
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+    #define SD_DETECT_PIN                   PD2
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+  #endif
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+
179
+  #define BTN_EN1                           PB4
180
+  #define BTN_EN2                           PB3
181
+  #define BTN_ENC                           PC14
182
+#endif

+ 60
- 0
buildroot/share/PlatformIO/boards/marlin_Artillery_Ruby.json View File

@@ -0,0 +1,60 @@
1
+{
2
+  "build": {
3
+    "core": "stm32",
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+    "cpu": "cortex-m4",
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+    "extra_flags": "-DSTM32F401xx",
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+    "f_cpu": "84000000L",
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+    "hwids": [
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+      [
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+        "0x0483",
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+        "0xDF11"
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+      ]
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+    ],
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+    "mcu": "stm32f401rct6",
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+    "variant": "MARLIN_ARTILLERY_RUBY"
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+  },
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+  "debug": {
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+    "jlink_device": "STM32F401RC",
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+    "openocd_target": "stm32f4x",
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+    "svd_path": "STM32F40x.svd",
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+    "tools": {
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+      "stlink": {
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+        "server": {
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+          "arguments": [
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+            "-f",
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+            "scripts/interface/stlink.cfg",
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+            "-c",
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+            "transport select hla_swd",
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+            "-f",
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+            "scripts/target/stm32f4x.cfg",
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+            "-c",
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+            "reset_config none"
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+          ],
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+          "executable": "bin/openocd",
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+          "package": "tool-openocd"
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+        }
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+      }
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+    }
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+  },
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+  "frameworks": [
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+    "arduino",
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+    "stm32cube"
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+  ],
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+  "name": "STM32F401RC (64k RAM. 256k Flash)",
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+  "upload": {
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+    "disable_flushing": false,
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+    "maximum_ram_size": 65536,
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+    "maximum_size": 262144,
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+    "protocol": "stlink",
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+    "protocols": [
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+      "stlink",
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+      "dfu",
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+      "jlink"
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+    ],
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+    "require_upload_port": true,
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+    "use_1200bps_touch": false,
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+    "wait_for_upload_port": false
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+  },
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+  "url": "https://www.st.com/en/evaluation-tools/steval-3dp001v1.html",
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+  "vendor": "Generic"
60
+}

+ 0
- 18
buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py View File

@@ -8,37 +8,19 @@ except ImportError:
8 8
 
9 9
 import os
10 10
 Import("env", "projenv")
11
-# access to global build environment
12
-print(env)
13
-# access to project build environment (is used source files in "src" folder)
14
-print(projenv)
15 11
 
16 12
 config = configparser.ConfigParser()
17 13
 config.read("platformio.ini")
18 14
 
19
-#com_port = config.get("env:STM32F103RC_meeb", "upload_port")
20
-#print('Use the {0:s} to reboot the board to dfu mode.'.format(com_port))
21
-
22 15
 #
23 16
 # Upload actions
24 17
 #
25
-
26 18
 def before_upload(source, target, env):
27
-    print("before_upload")
28
-    # do some actions
29
-    # use com_port
30
-    #
31 19
     env.Execute("pwd")
32 20
 
33 21
 def after_upload(source, target, env):
34
-    print("after_upload")
35
-    # do some actions
36
-    #
37
-    #
38 22
     env.Execute("pwd")
39 23
 
40
-print("Current build targets", map(str, BUILD_TARGETS))
41
-
42 24
 env.AddPreAction("upload", before_upload)
43 25
 env.AddPostAction("upload", after_upload)
44 26
 

+ 0
- 1
buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py View File

@@ -1,7 +1,6 @@
1 1
 #
2 2
 # buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py
3 3
 #
4
-import os
5 4
 from os.path import join
6 5
 from os.path import expandvars
7 6
 Import("env")

+ 247
- 0
buildroot/share/PlatformIO/variants/MARLIN_ARTILLERY_RUBY/PeripheralPins.c View File

@@ -0,0 +1,247 @@
1
+/*
2
+ *******************************************************************************
3
+ * Copyright (c) 2019, STMicroelectronics
4
+ * All rights reserved.
5
+ *
6
+ * This software component is licensed by ST under BSD 3-Clause license,
7
+ * the "License"; You may not use this file except in compliance with the
8
+ * License. You may obtain a copy of the License at:
9
+ *                        opensource.org/licenses/BSD-3-Clause
10
+ *
11
+ *******************************************************************************
12
+ * Automatically generated from STM32F401R(B-C)Tx.xml
13
+ */
14
+#include "Arduino.h"
15
+#include "PeripheralPins.h"
16
+
17
+/* =====
18
+ * Note: Commented lines are alternative possibilities which are not used per default.
19
+ *       If you change them, you will have to know what you do
20
+ * =====
21
+ */
22
+
23
+//*** ADC ***
24
+
25
+#ifdef HAL_ADC_MODULE_ENABLED
26
+WEAK const PinMap PinMap_ADC[] = {
27
+  {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
28
+  {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
29
+  {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
30
+  {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
31
+  {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
32
+  {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
33
+  {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
34
+  {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
35
+  {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
36
+  {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
37
+  {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
38
+  {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
39
+  {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
40
+  {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
41
+  {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
42
+  {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
43
+  {NC,    NP,    0}
44
+};
45
+#endif
46
+
47
+//*** No DAC ***
48
+
49
+//*** I2C ***
50
+
51
+#ifdef HAL_I2C_MODULE_ENABLED
52
+WEAK const PinMap PinMap_I2C_SDA[] = {
53
+  {PB_3,  I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)},
54
+  {PB_4,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)},
55
+  {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
56
+  {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
57
+  {PC_9,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
58
+  {NC,    NP,    0}
59
+};
60
+#endif
61
+
62
+#ifdef HAL_I2C_MODULE_ENABLED
63
+WEAK const PinMap PinMap_I2C_SCL[] = {
64
+  {PA_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
65
+  {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
66
+  {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
67
+  {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
68
+  {NC,    NP,    0}
69
+};
70
+#endif
71
+
72
+//*** PWM ***
73
+
74
+#ifdef HAL_TIM_MODULE_ENABLED
75
+WEAK const PinMap PinMap_PWM[] = {
76
+  {PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
77
+  {PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
78
+  {PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
79
+  {PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
80
+  {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
81
+  {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
82
+  {PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
83
+  {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
84
+  {PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
85
+  {PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
86
+  {PA_5,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
87
+  {PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
88
+  {PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
89
+  {PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
90
+  {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
91
+  {PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
92
+  {PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
93
+  {PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
94
+  {PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
95
+  {PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
96
+  {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
97
+  {PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
98
+  {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
99
+  {PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
100
+  {PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
101
+  {PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
102
+  {PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
103
+  {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
104
+  {PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
105
+  {PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
106
+  {PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
107
+  {PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
108
+  {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
109
+  {PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
110
+  {PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
111
+  {PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
112
+  {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
113
+  {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
114
+  {PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
115
+  {PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
116
+  {NC,    NP,    0}
117
+};
118
+#endif
119
+
120
+//*** SERIAL ***
121
+
122
+#ifdef HAL_UART_MODULE_ENABLED
123
+WEAK const PinMap PinMap_UART_TX[] = {
124
+  {PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
125
+  {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
126
+  {PA_11, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
127
+  {PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
128
+  {PC_6,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
129
+  {NC,    NP,    0}
130
+};
131
+#endif
132
+
133
+#ifdef HAL_UART_MODULE_ENABLED
134
+WEAK const PinMap PinMap_UART_RX[] = {
135
+  {PA_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
136
+  {PA_10, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
137
+  {PA_12, USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
138
+  {PB_7,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
139
+  {PC_7,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
140
+  {NC,    NP,    0}
141
+};
142
+#endif
143
+
144
+#ifdef HAL_UART_MODULE_ENABLED
145
+WEAK const PinMap PinMap_UART_RTS[] = {
146
+  {PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
147
+  {PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
148
+  {NC,    NP,    0}
149
+};
150
+#endif
151
+
152
+#ifdef HAL_UART_MODULE_ENABLED
153
+WEAK const PinMap PinMap_UART_CTS[] = {
154
+  {PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
155
+  {PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
156
+  {NC,    NP,    0}
157
+};
158
+#endif
159
+
160
+//*** SPI ***
161
+
162
+#ifdef HAL_SPI_MODULE_ENABLED
163
+WEAK const PinMap PinMap_SPI_MOSI[] = {
164
+  {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
165
+  {PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
166
+  {PB_5,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
167
+  {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
168
+  {PC_3,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
169
+  {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
170
+  {NC,    NP,    0}
171
+};
172
+#endif
173
+
174
+#ifdef HAL_SPI_MODULE_ENABLED
175
+WEAK const PinMap PinMap_SPI_MISO[] = {
176
+  {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
177
+  {PB_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
178
+  {PB_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
179
+  {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
180
+  {PC_2,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
181
+  {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
182
+  {NC,    NP,    0}
183
+};
184
+#endif
185
+
186
+#ifdef HAL_SPI_MODULE_ENABLED
187
+WEAK const PinMap PinMap_SPI_SCLK[] = {
188
+  {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
189
+  {PB_3,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
190
+  {PB_3,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
191
+  {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
192
+  {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
193
+  {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
194
+  {NC,    NP,    0}
195
+};
196
+#endif
197
+
198
+#ifdef HAL_SPI_MODULE_ENABLED
199
+WEAK const PinMap PinMap_SPI_SSEL[] = {
200
+  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
201
+  {PA_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
202
+  {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
203
+  {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
204
+  {PB_9,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
205
+  {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
206
+  {NC,    NP,    0}
207
+};
208
+#endif
209
+
210
+//*** No CAN ***
211
+
212
+//*** No ETHERNET ***
213
+
214
+//*** No QUADSPI ***
215
+
216
+//*** USB ***
217
+
218
+#ifdef HAL_PCD_MODULE_ENABLED
219
+WEAK const PinMap PinMap_USB_OTG_FS[] = {
220
+  {PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
221
+  {PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
222
+  {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
223
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
224
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
225
+  {NC,    NP,    0}
226
+};
227
+#endif
228
+
229
+//*** No USB_OTG_HS ***
230
+
231
+//*** SD ***
232
+
233
+#ifdef HAL_SD_MODULE_ENABLED
234
+WEAK const PinMap PinMap_SD[] = {
235
+  {PB_8,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D4
236
+  {PB_9,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D5
237
+  {PC_6,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6
238
+  {PC_7,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7
239
+  {PC_8,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0
240
+  {PC_9,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1
241
+  {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2
242
+  {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3
243
+  {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK
244
+  {PD_2,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD
245
+  {NC,    NP,    0}
246
+};
247
+#endif

+ 33
- 0
buildroot/share/PlatformIO/variants/MARLIN_ARTILLERY_RUBY/PinNamesVar.h View File

@@ -0,0 +1,33 @@
1
+/* SYS_WKUP */
2
+#ifdef PWR_WAKEUP_PIN1
3
+SYS_WKUP1 = PA_0,
4
+#endif
5
+#ifdef PWR_WAKEUP_PIN2
6
+SYS_WKUP2 = NC,
7
+#endif
8
+#ifdef PWR_WAKEUP_PIN3
9
+SYS_WKUP3 = NC,
10
+#endif
11
+#ifdef PWR_WAKEUP_PIN4
12
+SYS_WKUP4 = NC,
13
+#endif
14
+#ifdef PWR_WAKEUP_PIN5
15
+SYS_WKUP5 = NC,
16
+#endif
17
+#ifdef PWR_WAKEUP_PIN6
18
+SYS_WKUP6 = NC,
19
+#endif
20
+#ifdef PWR_WAKEUP_PIN7
21
+SYS_WKUP7 = NC,
22
+#endif
23
+#ifdef PWR_WAKEUP_PIN8
24
+SYS_WKUP8 = NC,
25
+#endif
26
+/* USB */
27
+#ifdef USBCON
28
+USB_OTG_FS_SOF = PA_8,
29
+USB_OTG_FS_VBUS = PA_9,
30
+USB_OTG_FS_ID = PA_10,
31
+USB_OTG_FS_DM = PA_11,
32
+USB_OTG_FS_DP = PA_12,
33
+#endif

+ 496
- 0
buildroot/share/PlatformIO/variants/MARLIN_ARTILLERY_RUBY/hal_conf_custom.h View File

@@ -0,0 +1,496 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm32f4xx_hal_conf.h
4
+  * @brief   HAL configuration file.
5
+  ******************************************************************************
6
+  * @attention
7
+  *
8
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
9
+  * All rights reserved.</center></h2>
10
+  *
11
+  * This software component is licensed by ST under BSD 3-Clause license,
12
+  * the "License"; You may not use this file except in compliance with the
13
+  * License. You may obtain a copy of the License at:
14
+  *                        opensource.org/licenses/BSD-3-Clause
15
+  *
16
+  ******************************************************************************
17
+  */
18
+
19
+/* Define to prevent recursive inclusion -------------------------------------*/
20
+#ifndef __STM32F4xx_HAL_CONF_CUSTOM
21
+#define __STM32F4xx_HAL_CONF_CUSTOM
22
+
23
+#ifdef __cplusplus
24
+extern "C" {
25
+#endif
26
+
27
+/* Exported types ------------------------------------------------------------*/
28
+/* Exported constants --------------------------------------------------------*/
29
+
30
+/* ########################## Module Selection ############################## */
31
+ /**
32
+  * @brief This is the list of modules to be used in the HAL driver
33
+  */
34
+#define HAL_MODULE_ENABLED
35
+#define HAL_ADC_MODULE_ENABLED
36
+/* #define HAL_CAN_MODULE_ENABLED   */
37
+/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
38
+/* #define HAL_CRC_MODULE_ENABLED   */
39
+/* #define HAL_CEC_MODULE_ENABLED   */
40
+/* #define HAL_CRYP_MODULE_ENABLED   */
41
+//#define HAL_DAC_MODULE_ENABLED
42
+/* #define HAL_DCMI_MODULE_ENABLED   */
43
+#define HAL_DMA_MODULE_ENABLED
44
+/* #define HAL_DMA2D_MODULE_ENABLED   */
45
+/* #define HAL_ETH_MODULE_ENABLED   */
46
+#define HAL_FLASH_MODULE_ENABLED
47
+/* #define HAL_NAND_MODULE_ENABLED   */
48
+/* #define HAL_NOR_MODULE_ENABLED   */
49
+/* #define HAL_PCCARD_MODULE_ENABLED   */
50
+/* #define HAL_SRAM_MODULE_ENABLED   */
51
+/* #define HAL_SDRAM_MODULE_ENABLED   */
52
+/* #define HAL_HASH_MODULE_ENABLED   */
53
+#define HAL_GPIO_MODULE_ENABLED
54
+#define HAL_EXTI_MODULE_ENABLED
55
+#define HAL_I2C_MODULE_ENABLED
56
+/* #define HAL_SMBUS_MODULE_ENABLED   */
57
+/* #define HAL_I2S_MODULE_ENABLED   */
58
+/* #define HAL_IWDG_MODULE_ENABLED   */
59
+/* #define HAL_LTDC_MODULE_ENABLED   */
60
+/* #define HAL_DSI_MODULE_ENABLED   */
61
+#define HAL_PWR_MODULE_ENABLED
62
+/* #define HAL_QSPI_MODULE_ENABLED   */
63
+#define HAL_RCC_MODULE_ENABLED
64
+/* #define HAL_RNG_MODULE_ENABLED   */
65
+/* #define HAL_RTC_MODULE_ENABLED   */
66
+/* #define HAL_SAI_MODULE_ENABLED   */
67
+/* #define HAL_SD_MODULE_ENABLED    */
68
+#define HAL_SPI_MODULE_ENABLED
69
+#define HAL_TIM_MODULE_ENABLED
70
+/* #define HAL_UART_MODULE_ENABLED  */
71
+/* #define HAL_USART_MODULE_ENABLED  */
72
+/* #define HAL_IRDA_MODULE_ENABLED   */
73
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
74
+/* #define HAL_WWDG_MODULE_ENABLED   */
75
+#define HAL_CORTEX_MODULE_ENABLED
76
+#ifndef HAL_PCD_MODULE_ENABLED
77
+  #define HAL_PCD_MODULE_ENABLED //Since STM32 v3.10700.191028 this is automatically added if any type of USB is enabled (as in Arduino IDE)
78
+#endif
79
+/* #define HAL_HCD_MODULE_ENABLED   */
80
+/* #define HAL_FMPI2C_MODULE_ENABLED   */
81
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
82
+/* #define HAL_DFSDM_MODULE_ENABLED   */
83
+/* #define HAL_LPTIM_MODULE_ENABLED   */
84
+/* #define HAL_MMC_MODULE_ENABLED   */
85
+
86
+/* ########################## HSE/HSI Values adaptation ##################### */
87
+/**
88
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
89
+  *        This value is used by the RCC HAL module to compute the system frequency
90
+  *        (when HSE is used as system clock source, directly or through the PLL).
91
+  */
92
+#ifndef HSE_VALUE
93
+#define HSE_VALUE              8000000U /*!< Value of the External oscillator in Hz */
94
+#endif /* HSE_VALUE */
95
+
96
+#ifndef HSE_STARTUP_TIMEOUT
97
+#define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
98
+#endif /* HSE_STARTUP_TIMEOUT */
99
+
100
+/**
101
+  * @brief Internal High Speed oscillator (HSI) value.
102
+  *        This value is used by the RCC HAL module to compute the system frequency
103
+  *        (when HSI is used as system clock source, directly or through the PLL).
104
+  */
105
+#ifndef HSI_VALUE
106
+#define HSI_VALUE              16000000U /*!< Value of the Internal oscillator in Hz */
107
+#endif /* HSI_VALUE */
108
+
109
+/**
110
+  * @brief Internal Low Speed oscillator (LSI) value.
111
+  */
112
+#ifndef LSI_VALUE
113
+#define LSI_VALUE               32000U    /*!< LSI Typical Value in Hz */
114
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
115
+The real value may vary depending on the variations
116
+in voltage and temperature. */
117
+/**
118
+  * @brief External Low Speed oscillator (LSE) value.
119
+  */
120
+#ifndef LSE_VALUE
121
+#define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
122
+#endif /* LSE_VALUE */
123
+
124
+#ifndef LSE_STARTUP_TIMEOUT
125
+#define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
126
+#endif /* LSE_STARTUP_TIMEOUT */
127
+
128
+/**
129
+  * @brief External clock source for I2S peripheral
130
+  *        This value is used by the I2S HAL module to compute the I2S clock source
131
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
132
+  */
133
+#ifndef EXTERNAL_CLOCK_VALUE
134
+#define EXTERNAL_CLOCK_VALUE     12288000U /*!< Value of the External oscillator in Hz*/
135
+#endif /* EXTERNAL_CLOCK_VALUE */
136
+
137
+/* Tip: To avoid modifying this file each time you need to use different HSE,
138
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
139
+
140
+/* ########################### System Configuration ######################### */
141
+/**
142
+  * @brief This is the HAL system configuration section
143
+  */
144
+#if !defined (VDD_VALUE)
145
+#define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
146
+#endif
147
+#if !defined (TICK_INT_PRIORITY)
148
+#define  TICK_INT_PRIORITY            0x00U /*!< tick interrupt priority */
149
+#endif
150
+#if !defined (USE_RTOS)
151
+#define  USE_RTOS                     0U
152
+#endif
153
+#if !defined (PREFETCH_ENABLE)
154
+#define  PREFETCH_ENABLE              1U
155
+#endif
156
+#if !defined (INSTRUCTION_CACHE_ENABLE)
157
+#define  INSTRUCTION_CACHE_ENABLE     1U
158
+#endif
159
+#if !defined (DATA_CACHE_ENABLE)
160
+#define  DATA_CACHE_ENABLE            1U
161
+#endif
162
+
163
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
164
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
165
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
166
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
167
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
168
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
169
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
170
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
171
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
172
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
173
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
174
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
175
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
176
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
177
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
178
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
179
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
180
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
181
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
182
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
183
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
184
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
185
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
186
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
187
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
188
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
189
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
190
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
191
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
192
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
193
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
194
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
195
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
196
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
197
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
198
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
199
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
200
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
201
+
202
+/* ########################## Assert Selection ############################## */
203
+/**
204
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
205
+  *        HAL drivers code
206
+  */
207
+/* #define USE_FULL_ASSERT    1U */
208
+
209
+/* ################## Ethernet peripheral configuration ##################### */
210
+
211
+/* Section 1 : Ethernet peripheral configuration */
212
+
213
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
214
+#define MAC_ADDR0   2U
215
+#define MAC_ADDR1   0U
216
+#define MAC_ADDR2   0U
217
+#define MAC_ADDR3   0U
218
+#define MAC_ADDR4   0U
219
+#define MAC_ADDR5   0U
220
+
221
+/* Definition of the Ethernet driver buffers size and count */
222
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
223
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
224
+#define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
225
+#define ETH_TXBUFNB                    ((uint32_t)4U)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
226
+
227
+/* Section 2: PHY configuration section */
228
+
229
+/* DP83848_PHY_ADDRESS Address*/
230
+#define DP83848_PHY_ADDRESS           0x01U
231
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
232
+#define PHY_RESET_DELAY                 0x000000FFU
233
+/* PHY Configuration delay */
234
+#define PHY_CONFIG_DELAY                0x00000FFFU
235
+
236
+#define PHY_READ_TO                     0x0000FFFFU
237
+#define PHY_WRITE_TO                    0x0000FFFFU
238
+
239
+/* Section 3: Common PHY Registers */
240
+
241
+#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
242
+#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
243
+
244
+#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
245
+#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
246
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
247
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
248
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
249
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
250
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
251
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
252
+#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
253
+#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
254
+
255
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
256
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
257
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
258
+
259
+/* Section 4: Extended PHY Registers */
260
+#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
261
+
262
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
263
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
264
+
265
+/* ################## SPI peripheral configuration ########################## */
266
+
267
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
268
+ * Activated: CRC code is present inside driver
269
+ * Deactivated: CRC code cleaned from driver
270
+ */
271
+#ifndef USE_SPI_CRC
272
+#define USE_SPI_CRC                     0U
273
+#endif
274
+
275
+/* Includes ------------------------------------------------------------------*/
276
+/**
277
+  * @brief Include module's header file
278
+  */
279
+
280
+#ifdef HAL_RCC_MODULE_ENABLED
281
+#include "stm32f4xx_hal_rcc.h"
282
+#endif /* HAL_RCC_MODULE_ENABLED */
283
+
284
+#ifdef HAL_GPIO_MODULE_ENABLED
285
+#include "stm32f4xx_hal_gpio.h"
286
+#endif /* HAL_GPIO_MODULE_ENABLED */
287
+
288
+#ifdef HAL_EXTI_MODULE_ENABLED
289
+#include "stm32f4xx_hal_exti.h"
290
+#endif /* HAL_EXTI_MODULE_ENABLED */
291
+
292
+#ifdef HAL_DMA_MODULE_ENABLED
293
+#include "stm32f4xx_hal_dma.h"
294
+#endif /* HAL_DMA_MODULE_ENABLED */
295
+
296
+#ifdef HAL_CORTEX_MODULE_ENABLED
297
+#include "stm32f4xx_hal_cortex.h"
298
+#endif /* HAL_CORTEX_MODULE_ENABLED */
299
+
300
+#ifdef HAL_ADC_MODULE_ENABLED
301
+#include "stm32f4xx_hal_adc.h"
302
+#endif /* HAL_ADC_MODULE_ENABLED */
303
+
304
+#ifdef HAL_CAN_MODULE_ENABLED
305
+#include "stm32f4xx_hal_can.h"
306
+#endif /* HAL_CAN_MODULE_ENABLED */
307
+
308
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
309
+#include "stm32f4xx_hal_can_legacy.h"
310
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
311
+
312
+#ifdef HAL_CRC_MODULE_ENABLED
313
+#include "stm32f4xx_hal_crc.h"
314
+#endif /* HAL_CRC_MODULE_ENABLED */
315
+
316
+#ifdef HAL_CRYP_MODULE_ENABLED
317
+#include "stm32f4xx_hal_cryp.h"
318
+#endif /* HAL_CRYP_MODULE_ENABLED */
319
+
320
+#ifdef HAL_DMA2D_MODULE_ENABLED
321
+#include "stm32f4xx_hal_dma2d.h"
322
+#endif /* HAL_DMA2D_MODULE_ENABLED */
323
+
324
+#ifdef HAL_DAC_MODULE_ENABLED
325
+#include "stm32f4xx_hal_dac.h"
326
+#endif /* HAL_DAC_MODULE_ENABLED */
327
+
328
+#ifdef HAL_DCMI_MODULE_ENABLED
329
+#include "stm32f4xx_hal_dcmi.h"
330
+#endif /* HAL_DCMI_MODULE_ENABLED */
331
+
332
+#ifdef HAL_ETH_MODULE_ENABLED
333
+#include "stm32f4xx_hal_eth.h"
334
+#endif /* HAL_ETH_MODULE_ENABLED */
335
+
336
+#ifdef HAL_FLASH_MODULE_ENABLED
337
+#include "stm32f4xx_hal_flash.h"
338
+#endif /* HAL_FLASH_MODULE_ENABLED */
339
+
340
+#ifdef HAL_SRAM_MODULE_ENABLED
341
+#include "stm32f4xx_hal_sram.h"
342
+#endif /* HAL_SRAM_MODULE_ENABLED */
343
+
344
+#ifdef HAL_NOR_MODULE_ENABLED
345
+#include "stm32f4xx_hal_nor.h"
346
+#endif /* HAL_NOR_MODULE_ENABLED */
347
+
348
+#ifdef HAL_NAND_MODULE_ENABLED
349
+#include "stm32f4xx_hal_nand.h"
350
+#endif /* HAL_NAND_MODULE_ENABLED */
351
+
352
+#ifdef HAL_PCCARD_MODULE_ENABLED
353
+#include "stm32f4xx_hal_pccard.h"
354
+#endif /* HAL_PCCARD_MODULE_ENABLED */
355
+
356
+#ifdef HAL_SDRAM_MODULE_ENABLED
357
+#include "stm32f4xx_hal_sdram.h"
358
+#endif /* HAL_SDRAM_MODULE_ENABLED */
359
+
360
+#ifdef HAL_HASH_MODULE_ENABLED
361
+#include "stm32f4xx_hal_hash.h"
362
+#endif /* HAL_HASH_MODULE_ENABLED */
363
+
364
+#ifdef HAL_I2C_MODULE_ENABLED
365
+#include "stm32f4xx_hal_i2c.h"
366
+#endif /* HAL_I2C_MODULE_ENABLED */
367
+
368
+#ifdef HAL_SMBUS_MODULE_ENABLED
369
+#include "stm32f4xx_hal_smbus.h"
370
+#endif /* HAL_SMBUS_MODULE_ENABLED */
371
+
372
+#ifdef HAL_I2S_MODULE_ENABLED
373
+#include "stm32f4xx_hal_i2s.h"
374
+#endif /* HAL_I2S_MODULE_ENABLED */
375
+
376
+#ifdef HAL_IWDG_MODULE_ENABLED
377
+#include "stm32f4xx_hal_iwdg.h"
378
+#endif /* HAL_IWDG_MODULE_ENABLED */
379
+
380
+#ifdef HAL_LTDC_MODULE_ENABLED
381
+#include "stm32f4xx_hal_ltdc.h"
382
+#endif /* HAL_LTDC_MODULE_ENABLED */
383
+
384
+#ifdef HAL_PWR_MODULE_ENABLED
385
+#include "stm32f4xx_hal_pwr.h"
386
+#endif /* HAL_PWR_MODULE_ENABLED */
387
+
388
+#ifdef HAL_RNG_MODULE_ENABLED
389
+#include "stm32f4xx_hal_rng.h"
390
+#endif /* HAL_RNG_MODULE_ENABLED */
391
+
392
+#ifdef HAL_RTC_MODULE_ENABLED
393
+#include "stm32f4xx_hal_rtc.h"
394
+#endif /* HAL_RTC_MODULE_ENABLED */
395
+
396
+#ifdef HAL_SAI_MODULE_ENABLED
397
+#include "stm32f4xx_hal_sai.h"
398
+#endif /* HAL_SAI_MODULE_ENABLED */
399
+
400
+#ifdef HAL_SD_MODULE_ENABLED
401
+#include "stm32f4xx_hal_sd.h"
402
+#endif /* HAL_SD_MODULE_ENABLED */
403
+
404
+#ifdef HAL_SPI_MODULE_ENABLED
405
+#include "stm32f4xx_hal_spi.h"
406
+#endif /* HAL_SPI_MODULE_ENABLED */
407
+
408
+#ifdef HAL_TIM_MODULE_ENABLED
409
+#include "stm32f4xx_hal_tim.h"
410
+#endif /* HAL_TIM_MODULE_ENABLED */
411
+
412
+#ifdef HAL_UART_MODULE_ENABLED
413
+#include "stm32f4xx_hal_uart.h"
414
+#endif /* HAL_UART_MODULE_ENABLED */
415
+
416
+#ifdef HAL_USART_MODULE_ENABLED
417
+#include "stm32f4xx_hal_usart.h"
418
+#endif /* HAL_USART_MODULE_ENABLED */
419
+
420
+#ifdef HAL_IRDA_MODULE_ENABLED
421
+#include "stm32f4xx_hal_irda.h"
422
+#endif /* HAL_IRDA_MODULE_ENABLED */
423
+
424
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
425
+#include "stm32f4xx_hal_smartcard.h"
426
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
427
+
428
+#ifdef HAL_WWDG_MODULE_ENABLED
429
+#include "stm32f4xx_hal_wwdg.h"
430
+#endif /* HAL_WWDG_MODULE_ENABLED */
431
+
432
+#ifdef HAL_PCD_MODULE_ENABLED
433
+#include "stm32f4xx_hal_pcd.h"
434
+#endif /* HAL_PCD_MODULE_ENABLED */
435
+
436
+#ifdef HAL_HCD_MODULE_ENABLED
437
+#include "stm32f4xx_hal_hcd.h"
438
+#endif /* HAL_HCD_MODULE_ENABLED */
439
+
440
+#ifdef HAL_DSI_MODULE_ENABLED
441
+#include "stm32f4xx_hal_dsi.h"
442
+#endif /* HAL_DSI_MODULE_ENABLED */
443
+
444
+#ifdef HAL_QSPI_MODULE_ENABLED
445
+#include "stm32f4xx_hal_qspi.h"
446
+#endif /* HAL_QSPI_MODULE_ENABLED */
447
+
448
+#ifdef HAL_CEC_MODULE_ENABLED
449
+#include "stm32f4xx_hal_cec.h"
450
+#endif /* HAL_CEC_MODULE_ENABLED */
451
+
452
+#ifdef HAL_FMPI2C_MODULE_ENABLED
453
+#include "stm32f4xx_hal_fmpi2c.h"
454
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
455
+
456
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
457
+#include "stm32f4xx_hal_spdifrx.h"
458
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
459
+
460
+#ifdef HAL_DFSDM_MODULE_ENABLED
461
+#include "stm32f4xx_hal_dfsdm.h"
462
+#endif /* HAL_DFSDM_MODULE_ENABLED */
463
+
464
+#ifdef HAL_LPTIM_MODULE_ENABLED
465
+#include "stm32f4xx_hal_lptim.h"
466
+#endif /* HAL_LPTIM_MODULE_ENABLED */
467
+
468
+#ifdef HAL_MMC_MODULE_ENABLED
469
+#include "stm32f4xx_hal_mmc.h"
470
+#endif /* HAL_MMC_MODULE_ENABLED */
471
+
472
+/* Exported macro ------------------------------------------------------------*/
473
+#ifdef USE_FULL_ASSERT
474
+/**
475
+  * @brief  The assert_param macro is used for function's parameters check.
476
+  * @param  expr If expr is false, it calls assert_failed function
477
+  *         which reports the name of the source file and the source
478
+  *         line number of the call that failed.
479
+  *         If expr is true, it returns no value.
480
+  * @retval None
481
+  */
482
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
483
+/* Exported functions ------------------------------------------------------- */
484
+void assert_failed(uint8_t *file, uint32_t line);
485
+#else
486
+#define assert_param(expr) ((void)0U)
487
+#endif /* USE_FULL_ASSERT */
488
+
489
+#ifdef __cplusplus
490
+}
491
+#endif
492
+
493
+#endif /* __STM32F4xx_HAL_CONF_CUSTOM_H */
494
+
495
+
496
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 196
- 0
buildroot/share/PlatformIO/variants/MARLIN_ARTILLERY_RUBY/ldscript.ld View File

@@ -0,0 +1,196 @@
1
+/*
2
+*****************************************************************************
3
+**
4
+**  File        : ldscript.ld
5
+**
6
+**  Abstract    : Linker script for STM32F401RETx Device with
7
+**                512KByte FLASH, 96KByte RAM
8
+**
9
+**                Set heap size, stack size and stack location according
10
+**                to application requirements.
11
+**
12
+**                Set memory bank area and size if external memory is used.
13
+**
14
+**  Target      : STMicroelectronics STM32
15
+**
16
+**
17
+**  Distribution: The file is distributed as is, without any warranty
18
+**                of any kind.
19
+**
20
+*****************************************************************************
21
+** @attention
22
+**
23
+** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
24
+**
25
+** Redistribution and use in source and binary forms, with or without modification,
26
+** are permitted provided that the following conditions are met:
27
+**   1. Redistributions of source code must retain the above copyright notice,
28
+**      this list of conditions and the following disclaimer.
29
+**   2. Redistributions in binary form must reproduce the above copyright notice,
30
+**      this list of conditions and the following disclaimer in the documentation
31
+**      and/or other materials provided with the distribution.
32
+**   3. Neither the name of Ac6 nor the names of its contributors
33
+**      may be used to endorse or promote products derived from this software
34
+**      without specific prior written permission.
35
+**
36
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
37
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
38
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
39
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
40
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
41
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
42
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
43
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
44
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46
+**
47
+*****************************************************************************
48
+*/
49
+
50
+/* Entry Point */
51
+ENTRY(Reset_Handler)
52
+
53
+/* Highest address of the user mode stack */
54
+_estack = 0x20010000;    /* end of RAM */
55
+/* Generate a link error if heap and stack don't fit into RAM */
56
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
57
+_Min_Stack_Size = 0x400; /* required amount of stack */
58
+
59
+/* Specify the memory areas */
60
+MEMORY
61
+{
62
+BOOT (rx)             : ORIGIN = 0x08000000, LENGTH = 16K
63
+EMULATED_EEPROM (rx)  : ORIGIN = 0x08004000, LENGTH = 16K
64
+FLASH (rx)            : ORIGIN = 0x08008000, LENGTH = 256K - 16K * 2
65
+RAM (xrw)             : ORIGIN = 0x20000000, LENGTH = 64K
66
+}
67
+
68
+/* Define output sections */
69
+SECTIONS
70
+{
71
+  /* The startup code goes first into FLASH */
72
+  .isr_vector :
73
+  {
74
+    . = ALIGN(4);
75
+    KEEP(*(.isr_vector)) /* Startup code */
76
+    . = ALIGN(4);
77
+  } >BOOT
78
+
79
+  .boot :
80
+  {
81
+    . = ALIGN(4);
82
+    *(.text.Reset_Handler)
83
+    . = ALIGN(4);
84
+  } >BOOT
85
+
86
+  /* The program code and other data goes into FLASH */
87
+  .text :
88
+  {
89
+    . = ALIGN(4);
90
+    *(.text)           /* .text sections (code) */
91
+    *(.text*)          /* .text* sections (code) */
92
+    *(.glue_7)         /* glue arm to thumb code */
93
+    *(.glue_7t)        /* glue thumb to arm code */
94
+    *(.eh_frame)
95
+
96
+    KEEP (*(.init))
97
+    KEEP (*(.fini))
98
+
99
+    . = ALIGN(4);
100
+    _etext = .;        /* define a global symbols at end of code */
101
+  } >FLASH
102
+
103
+  /* Constant data goes into FLASH */
104
+  .rodata :
105
+  {
106
+    . = ALIGN(4);
107
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
108
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
109
+    . = ALIGN(4);
110
+  } >FLASH
111
+
112
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
113
+  .ARM : {
114
+    __exidx_start = .;
115
+    *(.ARM.exidx*)
116
+    __exidx_end = .;
117
+  } >FLASH
118
+
119
+  .preinit_array     :
120
+  {
121
+    PROVIDE_HIDDEN (__preinit_array_start = .);
122
+    KEEP (*(.preinit_array*))
123
+    PROVIDE_HIDDEN (__preinit_array_end = .);
124
+  } >FLASH
125
+  .init_array :
126
+  {
127
+    PROVIDE_HIDDEN (__init_array_start = .);
128
+    KEEP (*(SORT(.init_array.*)))
129
+    KEEP (*(.init_array*))
130
+    PROVIDE_HIDDEN (__init_array_end = .);
131
+  } >FLASH
132
+  .fini_array :
133
+  {
134
+    PROVIDE_HIDDEN (__fini_array_start = .);
135
+    KEEP (*(SORT(.fini_array.*)))
136
+    KEEP (*(.fini_array*))
137
+    PROVIDE_HIDDEN (__fini_array_end = .);
138
+  } >FLASH
139
+
140
+  /* used by the startup to initialize data */
141
+  _sidata = LOADADDR(.data);
142
+
143
+  /* Initialized data sections goes into RAM, load LMA copy after code */
144
+  .data :
145
+  {
146
+    . = ALIGN(4);
147
+    _sdata = .;        /* create a global symbol at data start */
148
+    *(.data)           /* .data sections */
149
+    *(.data*)          /* .data* sections */
150
+
151
+    . = ALIGN(4);
152
+    _edata = .;        /* define a global symbol at data end */
153
+  } >RAM AT> FLASH
154
+
155
+
156
+  /* Uninitialized data section */
157
+  . = ALIGN(4);
158
+  .bss :
159
+  {
160
+    /* This is used by the startup in order to initialize the .bss secion */
161
+    _sbss = .;         /* define a global symbol at bss start */
162
+    __bss_start__ = _sbss;
163
+    *(.bss)
164
+    *(.bss*)
165
+    *(COMMON)
166
+
167
+    . = ALIGN(4);
168
+    _ebss = .;         /* define a global symbol at bss end */
169
+    __bss_end__ = _ebss;
170
+  } >RAM
171
+
172
+  /* User_heap_stack section, used to check that there is enough RAM left */
173
+  ._user_heap_stack :
174
+  {
175
+    . = ALIGN(4);
176
+    PROVIDE ( end = . );
177
+    PROVIDE ( _end = . );
178
+    . = . + _Min_Heap_Size;
179
+    . = . + _Min_Stack_Size;
180
+    . = ALIGN(4);
181
+  } >RAM
182
+
183
+
184
+
185
+  /* Remove information from the standard libraries */
186
+  /DISCARD/ :
187
+  {
188
+    libc.a ( * )
189
+    libm.a ( * )
190
+    libgcc.a ( * )
191
+  }
192
+
193
+  .ARM.attributes 0 : { *(.ARM.attributes) }
194
+}
195
+
196
+

+ 172
- 0
buildroot/share/PlatformIO/variants/MARLIN_ARTILLERY_RUBY/variant.cpp View File

@@ -0,0 +1,172 @@
1
+/*
2
+  Copyright (c) 2011 Arduino.  All right reserved.
3
+
4
+  This library is free software; you can redistribute it and/or
5
+  modify it under the terms of the GNU Lesser General Public
6
+  License as published by the Free Software Foundation; either
7
+  version 2.1 of the License, or (at your option) any later version.
8
+
9
+  This library is distributed in the hope that it will be useful,
10
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+  See the GNU Lesser General Public License for more details.
13
+
14
+  You should have received a copy of the GNU Lesser General Public
15
+  License along with this library; if not, write to the Free Software
16
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+*/
18
+
19
+#include "pins_arduino.h"
20
+
21
+#ifdef __cplusplus
22
+extern "C" {
23
+#endif
24
+
25
+// Pin number
26
+const PinName digitalPin[] = {
27
+  PA_0,  //D0
28
+  PA_1,  //D1
29
+  PA_2,  //D2
30
+  PA_3,  //D3
31
+  PA_4,  //D4
32
+  PA_5,  //D5
33
+  PA_6,  //D6
34
+  PA_7,  //D7
35
+  PA_8,  //D8
36
+  PA_9,  //D9
37
+  PA_10, //D10
38
+  PA_11, //D11
39
+  PA_12, //D12
40
+  PA_13, //D13
41
+  PA_14, //D14
42
+  PA_15, //D15
43
+  PB_0,  //D16
44
+  PB_1,  //D17
45
+  PB_2,  //D18
46
+  PB_3,  //D19
47
+  PB_4,  //D20
48
+  PB_5,  //D21
49
+  PB_6,  //D22
50
+  PB_7,  //D23
51
+  PB_8,  //D24
52
+  PB_9,  //D25
53
+  PB_10, //D26
54
+  PB_12, //D27
55
+  PB_13, //D28
56
+  PB_14, //D29
57
+  PB_15, //D30
58
+  PC_0,  //D31
59
+  PC_1,  //D32
60
+  PC_2,  //D33
61
+  PC_3,  //D34
62
+  PC_4,  //D35
63
+  PC_5,  //D36
64
+  PC_6,  //D37
65
+  PC_7,  //D38
66
+  PC_8,  //D39
67
+  PC_9,  //D40
68
+  PC_10, //D41
69
+  PC_11, //D42
70
+  PC_12, //D43
71
+  PC_13, //D44
72
+  PC_14, //D45
73
+  PC_15, //D46
74
+  PD_2,  //D47
75
+  PH_0,  //D48
76
+  PH_1,  //D49
77
+
78
+  //Duplicated ADC Pins
79
+  PA_0,  //D50/A0
80
+  PA_1,  //D51/A1
81
+  PA_2,  //D52/A2
82
+  PA_3,  //D53/A3
83
+  PA_4,  //D54/A4
84
+  PA_5,  //D55/A5
85
+  PA_6,  //D56/A6
86
+  PA_7,  //D57/A7
87
+  PB_0,  //D58/A8
88
+  PB_1,  //D59/A9
89
+  PC_0,  //D60/A10
90
+  PC_1,  //D61/A11
91
+  PC_2,  //D62/A12
92
+  PC_3,  //D63/A13
93
+  PC_4,  //D64/A14
94
+  PC_5   //D65/A15
95
+};
96
+
97
+#ifdef __cplusplus
98
+}
99
+#endif
100
+
101
+// ----------------------------------------------------------------------------
102
+
103
+#ifdef __cplusplus
104
+extern "C" {
105
+#endif
106
+/**
107
+  * @brief  System Clock Configuration
108
+  *         The system Clock is configured as follow :
109
+  *            System Clock source            = PLL (HSE)
110
+  *            SYSCLK(Hz)                     = 84000000
111
+  *            HCLK(Hz)                       = 84000000
112
+  *            AHB Prescaler                  = 1
113
+  *            APB1 Prescaler                 = 2
114
+  *            APB2 Prescaler                 = 1
115
+  *            HSE Frequency(Hz)              = 8000000
116
+  *            PLL_M                          = 8
117
+  *            PLL_N                          = 336
118
+  *            PLL_P                          = 4
119
+  *            PLL_Q                          = 7
120
+  *            VDD(V)                         = 3.3
121
+  *            Main regulator output voltage  = Scale2 mode
122
+  *            Flash Latency(WS)              = 2
123
+  * @param  None
124
+  * @retval None
125
+  */
126
+WEAK void SystemClock_Config(void)
127
+{
128
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
129
+  RCC_OscInitTypeDef RCC_OscInitStruct;
130
+
131
+  /* Enable Power Control clock */
132
+  __HAL_RCC_PWR_CLK_ENABLE();
133
+
134
+  /* The voltage scaling allows optimizing the power consumption when the device is
135
+     clocked below the maximum system frequency, to update the voltage scaling value
136
+   regarding system frequency refer to product datasheet.  */
137
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
138
+
139
+  /* Enable HSI Oscillator and activate PLL with HSI as source */
140
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
141
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
142
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
143
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
144
+  RCC_OscInitStruct.PLL.PLLM = 8;
145
+  RCC_OscInitStruct.PLL.PLLN = 336;
146
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
147
+  RCC_OscInitStruct.PLL.PLLQ = 7;
148
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
149
+    /* Initialization Error */
150
+    while (1);
151
+  }
152
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
153
+     clocks dividers */
154
+  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
155
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
156
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
157
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
158
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
159
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
160
+    /* Initialization Error */
161
+    while (1);
162
+  }
163
+}
164
+
165
+#ifdef __cplusplus
166
+}
167
+#endif
168
+
169
+void flashFirmware(const int16_t) {
170
+  *((unsigned long *)0x2000FFF0) = 0xDEADBEEF; // End of RAM
171
+  NVIC_SystemReset();
172
+}

+ 148
- 0
buildroot/share/PlatformIO/variants/MARLIN_ARTILLERY_RUBY/variant.h View File

@@ -0,0 +1,148 @@
1
+/*
2
+  Copyright (c) 2011 Arduino.  All right reserved.
3
+
4
+  This library is free software; you can redistribute it and/or
5
+  modify it under the terms of the GNU Lesser General Public
6
+  License as published by the Free Software Foundation; either
7
+  version 2.1 of the License, or (at your option) any later version.
8
+
9
+  This library is distributed in the hope that it will be useful,
10
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+  See the GNU Lesser General Public License for more details.
13
+
14
+  You should have received a copy of the GNU Lesser General Public
15
+  License along with this library; if not, write to the Free Software
16
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+*/
18
+
19
+#ifndef _VARIANT_ARDUINO_STM32_
20
+#define _VARIANT_ARDUINO_STM32_
21
+
22
+#ifdef __cplusplus
23
+extern "C" {
24
+#endif // __cplusplus
25
+
26
+/*----------------------------------------------------------------------------
27
+ *        Pins
28
+ *----------------------------------------------------------------------------*/
29
+
30
+
31
+#define PA0   0  //D0
32
+#define PA1   1  //D1
33
+#define PA2   2  //D2
34
+#define PA3   3  //D3
35
+#define PA4   4  //D4
36
+#define PA5   5  //D5
37
+#define PA6   6  //D6
38
+#define PA7   7  //D7
39
+#define PA8   8  //D8
40
+#define PA9   9  //D9
41
+#define PA10  10 //D10
42
+#define PA11  11 //D11
43
+#define PA12  12 //D12
44
+#define PA13  13 //D13
45
+#define PA14  14 //D14
46
+#define PA15  15 //D15
47
+#define PB0   16 //D16
48
+#define PB1   17 //D17
49
+#define PB2   18 //D18
50
+#define PB3   19 //D19
51
+#define PB4   20 //D20
52
+#define PB5   21 //D21
53
+#define PB6   22 //D22
54
+#define PB7   23 //D23
55
+#define PB8   24 //D24
56
+#define PB9   25 //D25
57
+#define PB10  26 //D26
58
+#define PB12  27 //D27
59
+#define PB13  28 //D28
60
+#define PB14  29 //D29
61
+#define PB15  30 //D30
62
+#define PC0   31 //D31
63
+#define PC1   32 //D32
64
+#define PC2   33 //D33
65
+#define PC3   34 //D34
66
+#define PC4   35 //D35
67
+#define PC5   36 //D36
68
+#define PC6   37 //D37
69
+#define PC7   38 //D38
70
+#define PC8   39 //D39
71
+#define PC9   40 //D40
72
+#define PC10  41 //D41
73
+#define PC11  42 //D42
74
+#define PC12  43 //D43
75
+#define PC13  44 //D44
76
+#define PC14  45 //D45
77
+#define PC15  46 //D46
78
+#define PD2   47 //D47
79
+#define PH0   48 //D48
80
+#define PH1   49 //D49
81
+
82
+// This must be a literal
83
+#define NUM_DIGITAL_PINS        66
84
+// This must be a literal with a value less than or equal to to MAX_ANALOG_INPUTS
85
+#define NUM_ANALOG_INPUTS       16
86
+#define NUM_ANALOG_FIRST        50
87
+
88
+/*
89
+// PWM resolution
90
+#define PWM_RESOLUTION          8
91
+#define PWM_FREQUENCY           20000 // >= 20 Khz => inaudible noise for fans
92
+#define PWM_MAX_DUTY_CYCLE      255
93
+*/
94
+
95
+// SPI Definitions
96
+#define PIN_SPI_MOSI            PC12
97
+#define PIN_SPI_MISO            PC11
98
+#define PIN_SPI_SCK             PC10
99
+#define PIN_SPI_SS              PA15
100
+
101
+// Timer Definitions
102
+// TIM1  - Hardware PWM (HB)
103
+// TIM2  - TIMER_SERVO
104
+// TIM3  - Hardware PWM (FAN0/1/2, HE0)
105
+// TIM4  - Hardware PWM (LED_R/G/B)
106
+// TIM5  - TIMER_TONE
107
+// TIM9  - STEP_TIMER
108
+// TIM10 - TEMP_TIMER
109
+// TIM11 -
110
+#define TIMER_SERVO             TIM2
111
+#define TIMER_TONE              TIM5
112
+
113
+// UART Definitions
114
+#define SERIAL_UART_INSTANCE    1
115
+
116
+// Default pin used for 'Serial' instance (ex: ST-Link)
117
+// Mandatory for Firmata
118
+#define PIN_SERIAL_RX           PA10
119
+#define PIN_SERIAL_TX           PA9
120
+
121
+#ifdef __cplusplus
122
+} // extern "C"
123
+#endif
124
+/*----------------------------------------------------------------------------
125
+ *        Arduino objects - C++ only
126
+ *----------------------------------------------------------------------------*/
127
+
128
+#ifdef __cplusplus
129
+// These serial port names are intended to allow libraries and architecture-neutral
130
+// sketches to automatically default to the correct port name for a particular type
131
+// of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
132
+// the first hardware serial port whose RX/TX pins are not dedicated to another use.
133
+//
134
+// SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
135
+//
136
+// SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
137
+//
138
+// SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
139
+//
140
+// SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
141
+//
142
+// SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
143
+//                            pins are NOT connected to anything by default.
144
+#define SERIAL_PORT_MONITOR     Serial
145
+#define SERIAL_PORT_HARDWARE    Serial
146
+#endif
147
+
148
+#endif /* _VARIANT_ARDUINO_STM32_ */

+ 14
- 0
ini/stm32f4.ini View File

@@ -564,3 +564,17 @@ build_unflags               = ${stm32_variant.build_unflags}
564 564
                               -DUSBCON -DUSBD_USE_CDC
565 565
 debug_tool                  = jlink
566 566
 upload_protocol             = jlink
567
+
568
+#
569
+# Artillery Ruby
570
+#
571
+[env:Artillery_Ruby]
572
+platform          = ${common_stm32.platform}
573
+extends           = common_stm32
574
+board             = marlin_Artillery_Ruby
575
+build_flags       = ${common_stm32.build_flags}
576
+                    -DSTM32F401xC -DTARGET_STM32F4 -DDISABLE_GENERIC_SERIALUSB -DARDUINO_ARCH_STM32
577
+                    -DUSBD_USE_CDC_COMPOSITE -DUSE_USB_FS
578
+                    -DUSB_PRODUCT=\"Artillery_3D_Printer\"
579
+extra_scripts     = ${common_stm32.extra_scripts}
580
+  pre:buildroot/share/PlatformIO/scripts/generic_create_variant.py

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