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Fix Archim1 stepper timing (with new variant) (#19596)

Ryan V1 4 anni fa
parent
commit
8989353fab
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21 ha cambiato i file con 2322 aggiunte e 0 eliminazioni
  1. 59
    0
      buildroot/share/PlatformIO/boards/archim.json
  2. 2
    0
      buildroot/share/PlatformIO/variants/archim/.gitignore
  3. 42
    0
      buildroot/share/PlatformIO/variants/archim/build_gcc/Makefile
  4. 25
    0
      buildroot/share/PlatformIO/variants/archim/build_gcc/debug.mk
  5. 82
    0
      buildroot/share/PlatformIO/variants/archim/build_gcc/gcc.mk
  6. 184
    0
      buildroot/share/PlatformIO/variants/archim/build_gcc/libvariant_arduino_due_x.mk
  7. 25
    0
      buildroot/share/PlatformIO/variants/archim/build_gcc/release.mk
  8. 37
    0
      buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_flash.gdb
  9. 37
    0
      buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_sram.gdb
  10. 44
    0
      buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_flash.mac
  11. 44
    0
      buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_sram.mac
  12. BIN
      buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a
  13. 576
    0
      buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a.txt
  14. 146
    0
      buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/flash.ld
  15. 145
    0
      buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/sram.ld
  16. 49
    0
      buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/flash.icf
  17. 33
    0
      buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/sram.icf
  18. 21
    0
      buildroot/share/PlatformIO/variants/archim/pins_arduino.h
  19. 485
    0
      buildroot/share/PlatformIO/variants/archim/variant.cpp
  20. 284
    0
      buildroot/share/PlatformIO/variants/archim/variant.h
  21. 2
    0
      platformio.ini

+ 59
- 0
buildroot/share/PlatformIO/boards/archim.json Vedi File

@@ -0,0 +1,59 @@
1
+{
2
+  "build": {
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+    "core": "arduino",
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+    "cpu": "cortex-m3",
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+    "extra_flags": "-D__SAM3X8E__ -DARDUINO_ARCH_SAM -DARDUINO_SAM_DUE",
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+    "f_cpu": "84000000L",
7
+    "hwids": [
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+      [
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+        "0x27B1",
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+        "0x0001"
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+      ],
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+      [
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+        "0x2341",
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+        "0x003E"
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+      ],
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+      [
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+        "0x2341",
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+        "0x003D"
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+      ]
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+    ],
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+    "ldscript": "linker_scripts/gcc/flash.ld",
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+    "mcu": "at91sam3x8e",
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+    "usb_product": "Archim",
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+    "variant": "archim"
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+  },
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+  "connectivity": [
27
+    "can"
28
+  ],
29
+  "debug": {
30
+    "jlink_device": "ATSAM3X8E",
31
+    "openocd_chipname": "at91sam3X8E",
32
+    "openocd_target": "at91sam3XXX",
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+    "svd_path": "ATSAM3X8E.svd"
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+  },
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+  "frameworks": [
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+    "arduino",
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+    "simba"
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+  ],
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+  "name": "Archim",
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+  "upload": {
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+    "disable_flushing": true,
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+    "maximum_ram_size": 98304,
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+    "maximum_size": 524288,
44
+    "native_usb": true,
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+    "protocol": "sam-ba",
46
+    "protocols": [
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+      "sam-ba",
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+      "jlink",
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+      "blackmagic",
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+      "atmel-ice",
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+      "stlink"
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+    ],
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+    "require_upload_port": true,
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+    "use_1200bps_touch": true,
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+    "wait_for_upload_port": true
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+  },
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+  "url": "https://ultimachine.com",
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+  "vendor": "UltiMachine"
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+}

+ 2
- 0
buildroot/share/PlatformIO/variants/archim/.gitignore Vedi File

@@ -0,0 +1,2 @@
1
+# Exception for libsam
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+!libsam_sam3x8e_gcc_rel.a

+ 42
- 0
buildroot/share/PlatformIO/variants/archim/build_gcc/Makefile Vedi File

@@ -0,0 +1,42 @@
1
+#
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+#  Copyright (c) 2011 Arduino.  All right reserved.
3
+#
4
+#  This library is free software; you can redistribute it and/or
5
+#  modify it under the terms of the GNU Lesser General Public
6
+#  License as published by the Free Software Foundation; either
7
+#  version 2.1 of the License, or (at your option) any later version.
8
+#
9
+#  This library is distributed in the hope that it will be useful,
10
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+#  See the GNU Lesser General Public License for more details.
13
+#
14
+#  You should have received a copy of the GNU Lesser General Public
15
+#  License along with this library; if not, write to the Free Software
16
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+#
18
+
19
+SUBMAKE_OPTIONS=--no-builtin-rules --no-builtin-variables --no-print-directory
20
+
21
+#-------------------------------------------------------------------------------
22
+# Rules
23
+#-------------------------------------------------------------------------------
24
+
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+all: arduino_due_x
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+
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+.PHONY: arduino_due_x
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+arduino_due_x:
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+	@echo ------------------------------------------------------------------------------------
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+	@echo --- Making variant arduino_due_x
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+	@$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk
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+#	@$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk
33
+	@echo ------------------------------------------------------------------------------------
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+
35
+.PHONY: clean
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+clean:
37
+	@echo ------------------------------------------------------------------------------------
38
+	@echo --- Cleaning variant arduino_due_x
39
+	@$(MAKE) DEBUG=1 $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@
40
+#	@$(MAKE) $(SUBMAKE_OPTIONS) -f libvariant_arduino_due_x.mk $@
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+	@echo ------------------------------------------------------------------------------------
42
+

+ 25
- 0
buildroot/share/PlatformIO/variants/archim/build_gcc/debug.mk Vedi File

@@ -0,0 +1,25 @@
1
+#
2
+#  Copyright (c) 2011 Arduino.  All right reserved.
3
+#
4
+#  This library is free software; you can redistribute it and/or
5
+#  modify it under the terms of the GNU Lesser General Public
6
+#  License as published by the Free Software Foundation; either
7
+#  version 2.1 of the License, or (at your option) any later version.
8
+#
9
+#  This library is distributed in the hope that it will be useful,
10
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
12
+#  See the GNU Lesser General Public License for more details.
13
+#
14
+#  You should have received a copy of the GNU Lesser General Public
15
+#  License along with this library; if not, write to the Free Software
16
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+#
18
+
19
+# Optimization level
20
+# -O1 Optimize
21
+# -O2 Optimize even more
22
+# -O3 Optimize yet more
23
+# -O0 Reduce compilation time and make debugging produce the expected results
24
+# -Os Optimize for size
25
+OPTIMIZATION = -g -O0 -DDEBUG

+ 82
- 0
buildroot/share/PlatformIO/variants/archim/build_gcc/gcc.mk Vedi File

@@ -0,0 +1,82 @@
1
+#
2
+#  Copyright (c) 2011 Arduino.  All right reserved.
3
+#
4
+#  This library is free software; you can redistribute it and/or
5
+#  modify it under the terms of the GNU Lesser General Public
6
+#  License as published by the Free Software Foundation; either
7
+#  version 2.1 of the License, or (at your option) any later version.
8
+#
9
+#  This library is distributed in the hope that it will be useful,
10
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+#  See the GNU Lesser General Public License for more details.
13
+#
14
+#  You should have received a copy of the GNU Lesser General Public
15
+#  License along with this library; if not, write to the Free Software
16
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+#
18
+
19
+# Tool suffix when cross-compiling
20
+CROSS_COMPILE = $(ARM_GCC_TOOLCHAIN)/arm-none-eabi-
21
+
22
+# Compilation tools
23
+AR = $(CROSS_COMPILE)ar
24
+CC = $(CROSS_COMPILE)gcc
25
+CXX = $(CROSS_COMPILE)g++
26
+AS = $(CROSS_COMPILE)as
27
+NM = $(CROSS_COMPILE)nm
28
+ifeq ($(OS),Windows_NT)
29
+RM=cs-rm -Rf
30
+else
31
+RM=rm -Rf
32
+endif
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+
34
+SEP=\\
35
+
36
+# ---------------------------------------------------------------------------------------
37
+# C Flags
38
+
39
+CFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2 -Wimplicit-int
40
+CFLAGS += -Werror-implicit-function-declaration -Wmain -Wparentheses
41
+CFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
42
+CFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
43
+CFLAGS += -Wshadow -Wpointer-arith -Wbad-function-cast -Wwrite-strings
44
+CFLAGS += -Wsign-compare -Waggregate-return -Wstrict-prototypes
45
+CFLAGS += -Wmissing-prototypes -Wmissing-declarations
46
+CFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
47
+CFLAGS += -Wpacked -Wredundant-decls -Wnested-externs -Winline -Wlong-long
48
+CFLAGS += -Wunreachable-code
49
+CFLAGS += -Wcast-align
50
+#CFLAGS += -Wmissing-noreturn
51
+#CFLAGS += -Wconversion
52
+
53
+CFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -nostdlib -std=c99
54
+CFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP) -D$(VARIANT)
55
+
56
+# To reduce application size use only integer printf function.
57
+CFLAGS += -Dprintf=iprintf
58
+
59
+# ---------------------------------------------------------------------------------------
60
+# CPP Flags
61
+
62
+CPPFLAGS += -Wall -Wchar-subscripts -Wcomment -Wformat=2
63
+CPPFLAGS += -Wmain -Wparentheses -Wcast-align -Wunreachable-code
64
+CPPFLAGS += -Wsequence-point -Wreturn-type -Wswitch -Wtrigraphs -Wunused
65
+CPPFLAGS += -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef
66
+CPPFLAGS += -Wshadow -Wpointer-arith -Wwrite-strings
67
+CPPFLAGS += -Wsign-compare -Waggregate-return -Wmissing-declarations
68
+CPPFLAGS += -Wformat -Wmissing-format-attribute -Wno-deprecated-declarations
69
+CPPFLAGS += -Wpacked -Wredundant-decls -Winline -Wlong-long
70
+#CPPFLAGS += -Wmissing-noreturn
71
+#CPPFLAGS += -Wconversion
72
+
73
+CPPFLAGS += --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb -mlong-calls -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -std=c++98
74
+CPPFLAGS += $(OPTIMIZATION) $(INCLUDES) -D$(CHIP)
75
+
76
+# To reduce application size use only integer printf function.
77
+CPPFLAGS += -Dprintf=iprintf
78
+
79
+# ---------------------------------------------------------------------------------------
80
+# ASM Flags
81
+
82
+ASFLAGS = -mcpu=cortex-m3 -mthumb -Wall -g $(OPTIMIZATION) $(INCLUDES)

+ 184
- 0
buildroot/share/PlatformIO/variants/archim/build_gcc/libvariant_arduino_due_x.mk Vedi File

@@ -0,0 +1,184 @@
1
+#
2
+#  Copyright (c) 2012 Arduino.  All right reserved.
3
+#
4
+#  This library is free software; you can redistribute it and/or
5
+#  modify it under the terms of the GNU Lesser General Public
6
+#  License as published by the Free Software Foundation; either
7
+#  version 2.1 of the License, or (at your option) any later version.
8
+#
9
+#  This library is distributed in the hope that it will be useful,
10
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+#  See the GNU Lesser General Public License for more details.
13
+#
14
+#  You should have received a copy of the GNU Lesser General Public
15
+#  License along with this library; if not, write to the Free Software
16
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+#
18
+
19
+# Makefile for compiling libArduino
20
+.SUFFIXES: .o .a .c .s
21
+
22
+CHIP=__SAM3X8E__
23
+VARIANT=arduino_due_x
24
+LIBNAME=libvariant_$(VARIANT)
25
+TOOLCHAIN=gcc
26
+
27
+#-------------------------------------------------------------------------------
28
+# Path
29
+#-------------------------------------------------------------------------------
30
+
31
+# Output directories
32
+OUTPUT_BIN = ../../../cores/arduino
33
+
34
+# Libraries
35
+PROJECT_BASE_PATH = ..
36
+SYSTEM_PATH = ../../../system
37
+CMSIS_ROOT_PATH = $(SYSTEM_PATH)/CMSIS
38
+CMSIS_ARM_PATH=$(CMSIS_ROOT_PATH)/CMSIS/Include
39
+CMSIS_ATMEL_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL
40
+#CMSIS_CHIP_PATH=$(CMSIS_ROOT_PATH)/Device/ATMEL/$(CHIP_SERIE)
41
+
42
+ARDUINO_PATH = ../../../cores/arduino
43
+VARIANT_BASE_PATH = ../../../variants
44
+VARIANT_PATH = ../../../variants/$(VARIANT)
45
+
46
+#-------------------------------------------------------------------------------
47
+# Files
48
+#-------------------------------------------------------------------------------
49
+
50
+#vpath %.h $(PROJECT_BASE_PATH) $(SYSTEM_PATH) $(VARIANT_PATH)
51
+vpath %.cpp $(PROJECT_BASE_PATH)
52
+
53
+VPATH+=$(PROJECT_BASE_PATH)
54
+
55
+INCLUDES =
56
+#INCLUDES += -I$(PROJECT_BASE_PATH)
57
+INCLUDES += -I$(ARDUINO_PATH)
58
+INCLUDES += -I$(ARDUINO_PATH)/USB
59
+INCLUDES += -I$(SYSTEM_PATH)
60
+INCLUDES += -I$(SYSTEM_PATH)/libsam
61
+INCLUDES += -I$(SYSTEM_PATH)/USBHost
62
+INCLUDES += -I$(VARIANT_BASE_PATH)
63
+INCLUDES += -I$(VARIANT_PATH)
64
+INCLUDES += -I$(CMSIS_ARM_PATH)
65
+INCLUDES += -I$(CMSIS_ATMEL_PATH)
66
+
67
+#-------------------------------------------------------------------------------
68
+ifdef DEBUG
69
+include debug.mk
70
+else
71
+include release.mk
72
+endif
73
+
74
+#-------------------------------------------------------------------------------
75
+# Tools
76
+#-------------------------------------------------------------------------------
77
+
78
+include $(TOOLCHAIN).mk
79
+
80
+#-------------------------------------------------------------------------------
81
+ifdef DEBUG
82
+OUTPUT_OBJ=debug
83
+OUTPUT_LIB_POSTFIX=dbg
84
+else
85
+OUTPUT_OBJ=release
86
+OUTPUT_LIB_POSTFIX=rel
87
+endif
88
+
89
+OUTPUT_LIB=$(LIBNAME)_$(TOOLCHAIN)_$(OUTPUT_LIB_POSTFIX).a
90
+OUTPUT_PATH=$(OUTPUT_OBJ)_$(VARIANT)
91
+
92
+#-------------------------------------------------------------------------------
93
+# C source files and objects
94
+#-------------------------------------------------------------------------------
95
+C_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.c)
96
+
97
+C_OBJ_TEMP = $(patsubst %.c, %.o, $(notdir $(C_SRC)))
98
+
99
+# during development, remove some files
100
+C_OBJ_FILTER=
101
+
102
+C_OBJ=$(filter-out $(C_OBJ_FILTER), $(C_OBJ_TEMP))
103
+
104
+#-------------------------------------------------------------------------------
105
+# CPP source files and objects
106
+#-------------------------------------------------------------------------------
107
+CPP_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.cpp)
108
+
109
+CPP_OBJ_TEMP = $(patsubst %.cpp, %.o, $(notdir $(CPP_SRC)))
110
+
111
+# during development, remove some files
112
+CPP_OBJ_FILTER=
113
+
114
+CPP_OBJ=$(filter-out $(CPP_OBJ_FILTER), $(CPP_OBJ_TEMP))
115
+
116
+#-------------------------------------------------------------------------------
117
+# Assembler source files and objects
118
+#-------------------------------------------------------------------------------
119
+A_SRC=$(wildcard $(PROJECT_BASE_PATH)/*.s)
120
+
121
+A_OBJ_TEMP=$(patsubst %.s, %.o, $(notdir $(A_SRC)))
122
+
123
+# during development, remove some files
124
+A_OBJ_FILTER=
125
+
126
+A_OBJ=$(filter-out $(A_OBJ_FILTER), $(A_OBJ_TEMP))
127
+
128
+#-------------------------------------------------------------------------------
129
+# Rules
130
+#-------------------------------------------------------------------------------
131
+all: $(VARIANT)
132
+
133
+$(VARIANT): create_output $(OUTPUT_LIB)
134
+
135
+.PHONY: create_output
136
+create_output:
137
+	@echo ------------------------------------------------------------------------------------
138
+	@echo -------------------------
139
+	@echo --- Preparing variant $(VARIANT) files in $(OUTPUT_PATH) $(OUTPUT_BIN)
140
+	@echo -------------------------
141
+#	@echo *$(INCLUDES)
142
+#	@echo -------------------------
143
+#	@echo *$(C_SRC)
144
+#	@echo -------------------------
145
+#	@echo *$(C_OBJ)
146
+#	@echo -------------------------
147
+#	@echo *$(addprefix $(OUTPUT_PATH)/, $(C_OBJ))
148
+#	@echo -------------------------
149
+#	@echo *$(CPP_SRC)
150
+#	@echo -------------------------
151
+#	@echo *$(CPP_OBJ)
152
+#	@echo -------------------------
153
+#	@echo *$(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ))
154
+#	@echo -------------------------
155
+#	@echo *$(A_SRC)
156
+#	@echo -------------------------
157
+
158
+	-@mkdir $(OUTPUT_PATH) 1>NUL 2>&1
159
+	@echo ------------------------------------------------------------------------------------
160
+
161
+$(addprefix $(OUTPUT_PATH)/,$(C_OBJ)): $(OUTPUT_PATH)/%.o: %.c
162
+#	@"$(CC)" -v -c $(CFLAGS) $< -o $@
163
+	@"$(CC)" -c $(CFLAGS) $< -o $@
164
+
165
+$(addprefix $(OUTPUT_PATH)/,$(CPP_OBJ)): $(OUTPUT_PATH)/%.o: %.cpp
166
+#	@"$(CC)" -c $(CPPFLAGS) $< -o $@
167
+	@"$(CC)" -xc++ -c $(CPPFLAGS) $< -o $@
168
+
169
+$(addprefix $(OUTPUT_PATH)/,$(A_OBJ)): $(OUTPUT_PATH)/%.o: %.s
170
+	@"$(AS)" -c $(ASFLAGS) $< -o $@
171
+
172
+$(OUTPUT_LIB): $(addprefix $(OUTPUT_PATH)/, $(C_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(CPP_OBJ)) $(addprefix $(OUTPUT_PATH)/, $(A_OBJ))
173
+	@"$(AR)" -v -r "$(OUTPUT_BIN)/$@" $^
174
+	@"$(NM)" "$(OUTPUT_BIN)/$@" > "$(OUTPUT_BIN)/$@.txt"
175
+
176
+
177
+.PHONY: clean
178
+clean:
179
+	@echo ------------------------------------------------------------------------------------
180
+	@echo --- Cleaning $(VARIANT) files [$(OUTPUT_PATH)$(SEP)*.o]
181
+	-@$(RM) $(OUTPUT_PATH) 1>NUL 2>&1
182
+	-@$(RM) $(OUTPUT_BIN)/$(OUTPUT_LIB) 1>NUL 2>&1
183
+	@echo ------------------------------------------------------------------------------------
184
+

+ 25
- 0
buildroot/share/PlatformIO/variants/archim/build_gcc/release.mk Vedi File

@@ -0,0 +1,25 @@
1
+#
2
+#  Copyright (c) 2011 Arduino.  All right reserved.
3
+#
4
+#  This library is free software; you can redistribute it and/or
5
+#  modify it under the terms of the GNU Lesser General Public
6
+#  License as published by the Free Software Foundation; either
7
+#  version 2.1 of the License, or (at your option) any later version.
8
+#
9
+#  This library is distributed in the hope that it will be useful,
10
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
12
+#  See the GNU Lesser General Public License for more details.
13
+#
14
+#  You should have received a copy of the GNU Lesser General Public
15
+#  License along with this library; if not, write to the Free Software
16
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+#
18
+
19
+# Optimization level
20
+# -O1 Optimize
21
+# -O2 Optimize even more
22
+# -O3 Optimize yet more
23
+# -O0 Reduce compilation time and make debugging produce the expected results
24
+# -Os Optimize for size
25
+OPTIMIZATION = -Os

+ 37
- 0
buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_flash.gdb Vedi File

@@ -0,0 +1,37 @@
1
+#*******************************************************
2
+#
3
+#  Connect to J-Link and debug application in flash on SAM3X.
4
+#
5
+
6
+# Define 'reset' command
7
+define reset
8
+
9
+# Connect to the J-Link gdb server
10
+target remote localhost:2331
11
+
12
+# Reset the chip to get to a known state
13
+monitor reset
14
+
15
+# Select flash device
16
+monitor flash device = AT91SAM3X8E
17
+
18
+# Enable flash download and flash breakpoints
19
+monitor flash download = 1
20
+
21
+# Load the program
22
+load
23
+
24
+# Reset peripheral (RSTC_CR)
25
+set *0x400e1a00 = 0xA5000004
26
+
27
+# Initialize PC and stack pointer
28
+mon reg sp=(0x80000)
29
+#set *0x80004 = *0x80004 & 0xFFFFFFFE
30
+mon reg pc=(0x80004)
31
+
32
+info reg
33
+
34
+break main
35
+
36
+# End of 'reset' command
37
+end

+ 37
- 0
buildroot/share/PlatformIO/variants/archim/debug_scripts/gcc/arduino_due_x_sram.gdb Vedi File

@@ -0,0 +1,37 @@
1
+#*******************************************************
2
+#
3
+#  Connect to J-Link and debug application in sram on SAM3X.
4
+#
5
+
6
+# Define 'reset' command
7
+define reset
8
+
9
+# Connect to the J-Link gdb server
10
+target remote localhost:2331
11
+
12
+# Reset the chip to get to a known state
13
+monitor reset
14
+
15
+# Select flash device
16
+monitor flash device = AT91SAM3X8E
17
+
18
+# Enable flash download and flash breakpoints
19
+monitor flash download = 1
20
+
21
+# Load the program
22
+load
23
+
24
+# Reset peripheral (RSTC_CR)
25
+set *0x400e1a00 = 0xA5000004
26
+
27
+# Initialize PC and stack pointer
28
+mon reg sp=(0x20000000)
29
+#set *0x20000004 = *0x20000004 & 0xFFFFFFFE
30
+mon reg pc=(0x20000004)
31
+
32
+info reg
33
+
34
+break main
35
+
36
+# End of 'reset' command
37
+end

+ 44
- 0
buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_flash.mac Vedi File

@@ -0,0 +1,44 @@
1
+// ---------------------------------------------------------
2
+//   ATMEL Microcontroller Software Support  -  ROUSSET  -
3
+// ---------------------------------------------------------
4
+// The software is delivered "AS IS" without warranty or
5
+// condition of any  kind, either express, implied or
6
+// statutory. This includes without limitation any warranty
7
+// or condition with respect to merchantability or fitness
8
+// for any particular purpose, or against the infringements of
9
+// intellectual property rights of others.
10
+// ---------------------------------------------------------
11
+//  File: at91sam3u-ek-flash.mac
12
+//  User setup file for CSPY debugger.
13
+// ---------------------------------------------------------
14
+__var __mac_i;
15
+__var __mac_pt;
16
+
17
+/*********************************************************************
18
+*
19
+*       execUserReset()
20
+*/
21
+execUserReset()
22
+{
23
+    __message "------------------------------ execUserReset ---------------------------------";
24
+    __message "-------------------------------Set PC Reset ----------------------------------";
25
+
26
+    __hwReset(0);
27
+
28
+    // perpheral reset RSTC_CR
29
+    __writeMemory32(0xA5000004,0x400e1200,"Memory");
30
+}
31
+
32
+/*********************************************************************
33
+*
34
+*       execUserPreload()
35
+*/
36
+execUserPreload()
37
+{
38
+    __message "------------------------------ execUserPreload ---------------------------------";
39
+
40
+    __hwReset(0);                          //* Hardware Reset: CPU is automatically halted after the reset
41
+
42
+    // perpheral reset RSTC_CR
43
+    __writeMemory32(0xA5000004,0x400e1200,"Memory");
44
+}

+ 44
- 0
buildroot/share/PlatformIO/variants/archim/debug_scripts/iar/arduino_due_sram.mac Vedi File

@@ -0,0 +1,44 @@
1
+// ---------------------------------------------------------
2
+//   ATMEL Microcontroller Software Support  -  ROUSSET  -
3
+// ---------------------------------------------------------
4
+// The software is delivered "AS IS" without warranty or
5
+// condition of any  kind, either express, implied or
6
+// statutory. This includes without limitation any warranty
7
+// or condition with respect to merchantability or fitness
8
+// for any particular purpose, or against the infringements of
9
+// intellectual property rights of others.
10
+// ---------------------------------------------------------
11
+//  File: at91sam3u-ek-sram.mac
12
+//  User setup file for CSPY debugger.
13
+// ---------------------------------------------------------
14
+__var __mac_i;
15
+__var __mac_pt;
16
+
17
+/*********************************************************************
18
+*
19
+*       execUserReset()
20
+*/
21
+execUserReset()
22
+{
23
+    __message "------------------------------ execUserReset ---------------------------------";
24
+    __message "-------------------------------Set PC Reset ----------------------------------";
25
+
26
+     //__hwReset(50);
27
+
28
+    // perpheral reset RSTC_CR
29
+    __writeMemory32(0xA5000004,0x400e1200,"Memory");
30
+}
31
+
32
+/*********************************************************************
33
+*
34
+*       execUserPreload()
35
+*/
36
+execUserPreload()
37
+{
38
+    __message "------------------------------ execUserPreload ---------------------------------";
39
+
40
+    __hwReset(0);                          //* Hardware Reset: CPU is automatically halted after the reset
41
+    
42
+    // perpheral reset RSTC_CR
43
+    __writeMemory32(0xA5000004,0x400e1200,"Memory");
44
+}

BIN
buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a Vedi File


+ 576
- 0
buildroot/share/PlatformIO/variants/archim/libsam_sam3x8e_gcc_rel.a.txt Vedi File

@@ -0,0 +1,576 @@
1
+
2
+adc10_sam3u.o:
3
+
4
+adc12_sam3u.o:
5
+
6
+adc_sam3snxa.o:
7
+
8
+pio.o:
9
+00000000 T PIO_Clear
10
+00000000 T PIO_Configure
11
+00000000 T PIO_DisableInterrupt
12
+00000000 T PIO_Get
13
+00000000 T PIO_GetOutputDataStatus
14
+00000000 T PIO_PullUp
15
+00000000 T PIO_Set
16
+00000000 T PIO_SetDebounceFilter
17
+00000000 T PIO_SetInput
18
+00000000 T PIO_SetOutput
19
+00000000 T PIO_SetPeripheral
20
+
21
+pmc.o:
22
+00000000 T pmc_clr_fast_startup_input
23
+00000000 T pmc_disable_all_pck
24
+00000000 T pmc_disable_all_periph_clk
25
+00000000 T pmc_disable_interrupt
26
+00000000 T pmc_disable_pck
27
+00000000 T pmc_disable_periph_clk
28
+00000000 T pmc_disable_pllack
29
+00000000 T pmc_disable_udpck
30
+00000000 T pmc_disable_upll_clock
31
+00000000 T pmc_enable_all_pck
32
+00000000 T pmc_enable_all_periph_clk
33
+00000000 T pmc_enable_backupmode
34
+00000000 T pmc_enable_interrupt
35
+00000000 T pmc_enable_pck
36
+00000000 T pmc_enable_periph_clk
37
+00000000 T pmc_enable_pllack
38
+00000000 T pmc_enable_sleepmode
39
+00000000 T pmc_enable_udpck
40
+00000000 T pmc_enable_upll_clock
41
+00000000 T pmc_enable_waitmode
42
+00000000 T pmc_get_interrupt_mask
43
+00000000 T pmc_get_status
44
+00000000 T pmc_get_writeprotect_status
45
+00000000 T pmc_is_locked_pllack
46
+00000000 T pmc_is_locked_upll
47
+00000000 T pmc_is_pck_enabled
48
+00000000 T pmc_is_periph_clk_enabled
49
+00000000 T pmc_mck_set_prescaler
50
+00000000 T pmc_mck_set_source
51
+00000000 T pmc_osc_disable_fastrc
52
+00000000 T pmc_osc_disable_xtal
53
+00000000 T pmc_osc_enable_fastrc
54
+00000000 T pmc_osc_is_ready_32kxtal
55
+00000000 T pmc_osc_is_ready_mainck
56
+00000000 T pmc_pck_set_prescaler
57
+00000000 T pmc_pck_set_source
58
+00000000 T pmc_set_fast_startup_input
59
+00000000 T pmc_set_writeprotect
60
+00000000 T pmc_switch_mainck_to_fastrc
61
+00000000 T pmc_switch_mainck_to_xtal
62
+00000000 T pmc_switch_mck_to_mainck
63
+00000000 T pmc_switch_mck_to_pllack
64
+00000000 T pmc_switch_mck_to_sclk
65
+00000000 T pmc_switch_mck_to_upllck
66
+00000000 T pmc_switch_pck_to_mainck
67
+00000000 T pmc_switch_pck_to_pllack
68
+00000000 T pmc_switch_pck_to_sclk
69
+00000000 T pmc_switch_pck_to_upllck
70
+00000000 T pmc_switch_sclk_to_32kxtal
71
+00000000 T pmc_switch_udpck_to_pllack
72
+00000000 T pmc_switch_udpck_to_upllck
73
+
74
+pwmc.o:
75
+00000000 t FindClockConfiguration
76
+00000000 T PWMC_ConfigureChannel
77
+00000000 T PWMC_ConfigureChannelExt
78
+00000000 T PWMC_ConfigureClocks
79
+00000000 T PWMC_ConfigureComparisonUnit
80
+00000000 T PWMC_ConfigureEventLineMode
81
+00000000 T PWMC_ConfigureSyncChannel
82
+00000000 T PWMC_DisableChannel
83
+00000000 T PWMC_DisableChannelIt
84
+00000000 T PWMC_DisableIt
85
+00000000 T PWMC_DisableOverrideOutput
86
+00000000 T PWMC_EnableChannel
87
+00000000 T PWMC_EnableChannelIt
88
+00000000 T PWMC_EnableFaultProtection
89
+00000000 T PWMC_EnableIt
90
+00000000 T PWMC_EnableOverrideOutput
91
+00000000 T PWMC_FaultClear
92
+00000000 T PWMC_SetDeadTime
93
+00000000 T PWMC_SetDutyCycle
94
+00000000 T PWMC_SetFaultMode
95
+00000000 T PWMC_SetFaultProtectionValue
96
+00000000 T PWMC_SetOverrideValue
97
+00000000 T PWMC_SetPeriod
98
+00000000 T PWMC_SetSyncChannelUpdatePeriod
99
+00000000 T PWMC_SetSyncChannelUpdateUnlock
100
+00000000 T PWMC_WriteBuffer
101
+         U __assert_func
102
+00000000 r __func__.6793
103
+00000000 r __func__.6804
104
+00000000 r __func__.6819
105
+00000000 r __func__.6830
106
+00000000 r __func__.6841
107
+00000000 r __func__.6848
108
+00000000 r __func__.6932
109
+00000000 r __func__.6938
110
+
111
+rtc.o:
112
+00000000 T RTC_ClearSCCR
113
+00000000 T RTC_DisableIt
114
+00000000 T RTC_EnableIt
115
+00000000 T RTC_GetDate
116
+00000000 T RTC_GetHourMode
117
+00000000 T RTC_GetSR
118
+00000000 T RTC_GetTime
119
+00000000 T RTC_SetDate
120
+00000000 T RTC_SetDateAlarm
121
+00000000 T RTC_SetHourMode
122
+00000000 T RTC_SetTime
123
+00000000 T RTC_SetTimeAlarm
124
+         U __assert_func
125
+00000000 r __func__.6790
126
+00000000 r __func__.6799
127
+00000000 r __func__.6804
128
+
129
+rtt.o:
130
+00000000 T RTT_EnableIT
131
+00000000 T RTT_GetStatus
132
+00000000 T RTT_GetTime
133
+00000000 T RTT_SetAlarm
134
+00000000 T RTT_SetPrescaler
135
+         U __assert_func
136
+00000000 r __func__.6797
137
+00000000 r __func__.6805
138
+
139
+spi.o:
140
+00000000 T SPI_Configure
141
+00000000 T SPI_ConfigureNPCS
142
+00000000 T SPI_Disable
143
+00000000 T SPI_DisableIt
144
+00000000 T SPI_Enable
145
+00000000 T SPI_EnableIt
146
+00000000 T SPI_GetStatus
147
+00000000 T SPI_IsFinished
148
+00000000 T SPI_Read
149
+00000000 T SPI_Write
150
+         U pmc_enable_periph_clk
151
+
152
+tc.o:
153
+00000000 T TC_Configure
154
+00000000 T TC_FindMckDivisor
155
+00000000 T TC_GetStatus
156
+00000000 T TC_ReadCV
157
+00000000 T TC_SetRA
158
+00000000 T TC_SetRB
159
+00000000 T TC_SetRC
160
+00000000 T TC_Start
161
+00000000 T TC_Stop
162
+         U __assert_func
163
+00000000 r __func__.6792
164
+00000000 r __func__.6798
165
+00000000 r __func__.6804
166
+
167
+timetick.o:
168
+00000000 T GetTickCount
169
+00000000 T Sleep
170
+00000000 T TimeTick_Configure
171
+00000000 T TimeTick_Increment
172
+00000000 T Wait
173
+00000000 b _dwTickCount
174
+
175
+twi.o:
176
+00000000 T TWI_ByteReceived
177
+00000000 T TWI_ByteSent
178
+00000000 T TWI_ConfigureMaster
179
+00000000 T TWI_ConfigureSlave
180
+00000000 T TWI_Disable
181
+00000000 T TWI_DisableIt
182
+00000000 T TWI_EnableIt
183
+00000000 T TWI_GetMaskedStatus
184
+00000000 T TWI_GetStatus
185
+00000000 T TWI_ReadByte
186
+00000000 T TWI_SendSTOPCondition
187
+00000000 T TWI_SetClock
188
+00000000 T TWI_StartRead
189
+00000000 T TWI_StartWrite
190
+00000000 T TWI_Stop
191
+00000000 T TWI_TransferComplete
192
+00000000 T TWI_WriteByte
193
+         U __assert_func
194
+00000000 r __func__.7151
195
+00000000 r __func__.7157
196
+00000000 r __func__.7172
197
+00000000 r __func__.7176
198
+00000000 r __func__.7184
199
+00000000 r __func__.7191
200
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201
+00000000 r __func__.7200
202
+00000000 r __func__.7208
203
+00000000 r __func__.7222
204
+00000000 r __func__.7227
205
+00000000 r __func__.7231
206
+00000000 r __func__.7236
207
+00000000 r __func__.7240
208
+
209
+usart.o:
210
+00000000 T USART_Configure
211
+00000000 T USART_DisableIt
212
+00000000 T USART_EnableIt
213
+00000000 T USART_GetChar
214
+00000000 T USART_GetStatus
215
+00000000 T USART_IsDataAvailable
216
+00000000 T USART_IsRxReady
217
+00000000 T USART_PutChar
218
+00000000 T USART_Read
219
+00000000 T USART_ReadBuffer
220
+00000000 T USART_SetIrdaFilter
221
+00000000 T USART_SetReceiverEnabled
222
+00000000 T USART_SetTransmitterEnabled
223
+00000000 T USART_Write
224
+00000000 T USART_WriteBuffer
225
+         U __assert_func
226
+00000000 r __func__.7068
227
+
228
+wdt.o:
229
+00000000 T WDT_Disable
230
+00000000 T WDT_Enable
231
+00000000 T WDT_GetPeriod
232
+00000000 T WDT_GetStatus
233
+00000000 T WDT_Restart
234
+
235
+system_sam3xa.o:
236
+00000000 D SystemCoreClock
237
+00000000 T SystemCoreClockUpdate
238
+00000000 T SystemInit
239
+00000000 T system_init_flash
240
+
241
+startup_sam3xa.o:
242
+         U ADC_Handler
243
+         U BusFault_Handler
244
+         U CAN0_Handler
245
+         U CAN1_Handler
246
+         U DACC_Handler
247
+         U DMAC_Handler
248
+         U DebugMon_Handler
249
+         U EFC0_Handler
250
+         U EFC1_Handler
251
+         U EMAC_Handler
252
+         U HSMCI_Handler
253
+         U HardFault_Handler
254
+         U MemManage_Handler
255
+         U NMI_Handler
256
+         U PIOA_Handler
257
+         U PIOB_Handler
258
+         U PIOC_Handler
259
+         U PIOD_Handler
260
+         U PMC_Handler
261
+         U PWM_Handler
262
+         U PendSV_Handler
263
+         U RSTC_Handler
264
+         U RTC_Handler
265
+         U RTT_Handler
266
+00000000 T Reset_Handler
267
+         U SMC_Handler
268
+         U SPI0_Handler
269
+         U SSC_Handler
270
+         U SUPC_Handler
271
+         U SVC_Handler
272
+         U SysTick_Handler
273
+         U TC0_Handler
274
+         U TC1_Handler
275
+         U TC2_Handler
276
+         U TC3_Handler
277
+         U TC4_Handler
278
+         U TC5_Handler
279
+         U TC6_Handler
280
+         U TC7_Handler
281
+         U TC8_Handler
282
+         U TRNG_Handler
283
+         U TWI0_Handler
284
+         U TWI1_Handler
285
+         U UART_Handler
286
+         U UOTGHS_Handler
287
+         U USART0_Handler
288
+         U USART1_Handler
289
+         U USART2_Handler
290
+         U USART3_Handler
291
+         U UsageFault_Handler
292
+         U WDT_Handler
293
+         U _erelocate
294
+         U _estack
295
+         U _etext
296
+         U _ezero
297
+         U _sfixed
298
+         U _srelocate
299
+         U _szero
300
+00000000 R exception_table
301
+         U main
302
+
303
+adc.o:
304
+00000000 T adc_configure_power_save
305
+00000000 T adc_configure_sequence
306
+00000000 T adc_configure_timing
307
+00000000 T adc_configure_trigger
308
+00000000 T adc_disable_all_channel
309
+00000000 T adc_disable_anch
310
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311
+00000000 T adc_disable_channel_differential_input
312
+00000000 T adc_disable_channel_input_offset
313
+00000000 T adc_disable_interrupt
314
+00000000 T adc_disable_tag
315
+00000000 T adc_disable_ts
316
+00000000 T adc_enable_all_channel
317
+00000000 T adc_enable_anch
318
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319
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320
+00000000 T adc_enable_channel_input_offset
321
+00000000 T adc_enable_interrupt
322
+00000000 T adc_enable_tag
323
+00000000 T adc_enable_ts
324
+00000000 T adc_get_actual_adc_clock
325
+00000000 T adc_get_channel_status
326
+00000000 T adc_get_channel_value
327
+00000000 T adc_get_comparison_mode
328
+00000000 T adc_get_interrupt_mask
329
+00000000 T adc_get_latest_value
330
+00000000 T adc_get_overrun_status
331
+00000000 T adc_get_pdc_base
332
+00000000 T adc_get_status
333
+00000000 T adc_get_tag
334
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335
+00000000 T adc_init
336
+00000000 T adc_set_bias_current
337
+00000000 T adc_set_channel_input_gain
338
+00000000 T adc_set_comparison_channel
339
+00000000 T adc_set_comparison_mode
340
+00000000 T adc_set_comparison_window
341
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342
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343
+00000000 T adc_start
344
+00000000 T adc_start_sequencer
345
+00000000 T adc_stop
346
+00000000 T adc_stop_sequencer
347
+
348
+udp.o:
349
+
350
+udphs.o:
351
+
352
+uotghs.o:
353
+00000000 T UOTGHS_Handler
354
+00000000 B gpf_isr
355
+
356
+interrupt_sam_nvic.o:
357
+00000000 D g_interrupt_enabled
358
+
359
+uotghs_device.o:
360
+00000000 T UDD_Attach
361
+00000000 T UDD_ClearIN
362
+00000000 T UDD_ClearOUT
363
+00000000 T UDD_ClearSetupInt
364
+00000000 T UDD_Detach
365
+00000000 T UDD_FifoByteCount
366
+00000000 T UDD_GetFrameNumber
367
+00000000 T UDD_Init
368
+00000000 T UDD_InitEP
369
+00000000 T UDD_InitEndpoints
370
+00000000 T UDD_ReadWriteAllowed
371
+00000000 T UDD_ReceivedSetupInt
372
+00000000 T UDD_Recv
373
+00000000 T UDD_Recv8
374
+00000000 T UDD_ReleaseRX
375
+00000000 T UDD_ReleaseTX
376
+00000000 T UDD_Send
377
+00000000 T UDD_Send8
378
+00000000 T UDD_SetAddress
379
+00000000 T UDD_SetStack
380
+00000000 T UDD_Stall
381
+00000000 T UDD_WaitForINOrOUT
382
+00000000 T UDD_WaitIN
383
+00000000 T UDD_WaitOUT
384
+         U g_interrupt_enabled
385
+         U gpf_isr
386
+         U pmc_enable_periph_clk
387
+         U pmc_enable_udpck
388
+         U pmc_enable_upll_clock
389
+         U pmc_switch_udpck_to_upllck
390
+00000000 b ul_recv_fifo_ptr
391
+00000000 b ul_send_fifo_ptr
392
+
393
+uotghs_host.o:
394
+00000000 T UHD_BusReset
395
+00000000 T UHD_GetVBUSState
396
+00000000 t UHD_ISR
397
+00000000 T UHD_Init
398
+00000000 T UHD_Pipe0_Alloc
399
+00000000 T UHD_Pipe_Alloc
400
+00000000 T UHD_Pipe_Free
401
+00000000 T UHD_Pipe_Is_Transfer_Complete
402
+00000000 T UHD_Pipe_Read
403
+00000000 T UHD_Pipe_Send
404
+00000000 T UHD_Pipe_Write
405
+00000000 T UHD_SetStack
406
+         U g_interrupt_enabled
407
+         U gpf_isr
408
+         U pmc_enable_periph_clk
409
+         U pmc_enable_udpck
410
+         U pmc_enable_upll_clock
411
+         U pmc_switch_udpck_to_upllck
412
+00000000 b uhd_state
413
+
414
+dacc.o:
415
+00000000 T dacc_disable_channel
416
+00000000 T dacc_disable_interrupt
417
+00000000 T dacc_disable_trigger
418
+00000000 T dacc_enable_channel
419
+00000000 T dacc_enable_flexible_selection
420
+00000000 T dacc_enable_interrupt
421
+00000000 T dacc_get_analog_control
422
+00000000 T dacc_get_channel_status
423
+00000000 T dacc_get_interrupt_mask
424
+00000000 T dacc_get_interrupt_status
425
+00000000 T dacc_get_pdc_base
426
+00000000 T dacc_get_writeprotect_status
427
+00000000 T dacc_reset
428
+00000000 T dacc_set_analog_control
429
+00000000 T dacc_set_channel_selection
430
+00000000 T dacc_set_power_save
431
+00000000 T dacc_set_timing
432
+00000000 T dacc_set_transfer_mode
433
+00000000 T dacc_set_trigger
434
+00000000 T dacc_set_writeprotect
435
+00000000 T dacc_write_conversion_data
436
+
437
+can.o:
438
+00000000 R can_bit_time
439
+00000000 T can_disable
440
+00000000 T can_disable_autobaud_listen_mode
441
+00000000 T can_disable_interrupt
442
+00000000 T can_disable_low_power_mode
443
+00000000 T can_disable_overload_frame
444
+00000000 T can_disable_time_triggered_mode
445
+00000000 T can_disable_timer_freeze
446
+00000000 T can_disable_tx_repeat
447
+00000000 T can_enable
448
+00000000 T can_enable_autobaud_listen_mode
449
+00000000 T can_enable_interrupt
450
+00000000 T can_enable_low_power_mode
451
+00000000 T can_enable_overload_frame
452
+00000000 T can_enable_time_triggered_mode
453
+00000000 T can_enable_timer_freeze
454
+00000000 T can_enable_tx_repeat
455
+00000000 T can_get_internal_timer_value
456
+00000000 T can_get_interrupt_mask
457
+00000000 T can_get_rx_error_cnt
458
+00000000 T can_get_status
459
+00000000 T can_get_timestamp_value
460
+00000000 T can_get_tx_error_cnt
461
+00000000 T can_global_send_abort_cmd
462
+00000000 T can_global_send_transfer_cmd
463
+00000000 T can_init
464
+00000000 T can_mailbox_get_status
465
+00000000 T can_mailbox_init
466
+00000000 T can_mailbox_read
467
+00000000 T can_mailbox_send_abort_cmd
468
+00000000 T can_mailbox_send_transfer_cmd
469
+00000000 T can_mailbox_set_timemark
470
+00000000 T can_mailbox_tx_remote_frame
471
+00000000 T can_mailbox_write
472
+00000000 T can_reset_all_mailbox
473
+00000000 T can_reset_internal_timer
474
+00000000 T can_reset_mailbox_data
475
+00000000 T can_set_rx_sync_stage
476
+00000000 T can_set_timestamp_capture_point
477
+         U memset
478
+
479
+efc.o:
480
+00000000 T efc_disable_frdy_interrupt
481
+00000000 T efc_enable_frdy_interrupt
482
+00000000 T efc_get_flash_access_mode
483
+00000000 T efc_get_result
484
+00000000 T efc_get_status
485
+00000000 T efc_get_wait_state
486
+00000000 T efc_init
487
+00000000 T efc_perform_command
488
+0000006c T efc_perform_fcr
489
+00000000 T efc_perform_read_sequence
490
+00000000 T efc_set_flash_access_mode
491
+00000000 T efc_set_wait_state
492
+00000068 T efc_write_fmr
493
+00000000 b iap_perform_command.7049
494
+
495
+gpbr.o:
496
+00000000 T gpbr_read
497
+00000000 T gpbr_write
498
+
499
+ssc.o:
500
+         U memset
501
+00000000 T ssc_disable_interrupt
502
+00000000 T ssc_disable_rx
503
+00000000 T ssc_disable_tx
504
+00000000 T ssc_disable_tx_frame_sync_data
505
+00000000 T ssc_enable_interrupt
506
+00000000 T ssc_enable_rx
507
+00000000 T ssc_enable_tx
508
+00000000 T ssc_enable_tx_frame_sync_data
509
+00000000 T ssc_get_interrupt_mask
510
+00000000 T ssc_get_rx_access
511
+00000000 T ssc_get_rx_compare
512
+00000000 T ssc_get_status
513
+00000000 T ssc_get_tx_access
514
+00000000 T ssc_get_writeprotect_status
515
+00000000 T ssc_i2s_set_receiver
516
+00000000 T ssc_i2s_set_transmitter
517
+00000000 T ssc_is_rx_enabled
518
+00000000 T ssc_is_rx_ready
519
+00000000 T ssc_is_tx_empty
520
+00000000 T ssc_is_tx_enabled
521
+00000000 T ssc_is_tx_ready
522
+00000000 T ssc_read
523
+00000000 T ssc_read_sync_data
524
+00000000 T ssc_reset
525
+00000000 T ssc_set_clock_divider
526
+00000000 T ssc_set_loop_mode
527
+00000000 T ssc_set_normal_mode
528
+00000000 T ssc_set_receiver
529
+00000000 T ssc_set_rx_compare
530
+00000000 T ssc_set_rx_stop_selection
531
+00000000 T ssc_set_td_default_level
532
+00000000 T ssc_set_transmitter
533
+00000000 T ssc_set_writeprotect
534
+00000000 T ssc_write
535
+00000000 T ssc_write_sync_data
536
+
537
+trng.o:
538
+00000000 T trng_disable
539
+00000000 T trng_disable_interrupt
540
+00000000 T trng_enable
541
+00000000 T trng_enable_interrupt
542
+00000000 T trng_get_interrupt_mask
543
+00000000 T trng_get_interrupt_status
544
+00000000 T trng_read_output_data
545
+
546
+rstc.o:
547
+00000000 T rstc_disable_user_reset
548
+00000000 T rstc_disable_user_reset_interrupt
549
+00000000 T rstc_enable_user_reset
550
+00000000 T rstc_enable_user_reset_interrupt
551
+00000000 T rstc_get_reset_cause
552
+00000000 T rstc_get_status
553
+00000000 T rstc_reset_extern
554
+00000000 T rstc_set_external_reset
555
+00000000 T rstc_start_software_reset
556
+
557
+emac.o:
558
+00000000 t circ_inc
559
+00000000 T emac_dev_get_tx_load
560
+00000000 T emac_dev_init
561
+00000000 T emac_dev_read
562
+00000000 T emac_dev_reset
563
+00000000 T emac_dev_set_rx_callback
564
+00000000 T emac_dev_set_tx_wakeup_callback
565
+00000000 T emac_dev_write
566
+00000000 T emac_handler
567
+00000000 T emac_phy_read
568
+00000000 T emac_phy_write
569
+00000000 t emac_reset_rx_mem
570
+00000000 t emac_reset_tx_mem
571
+00000000 b gs_rx_desc
572
+00000000 b gs_tx_callback
573
+00000000 b gs_tx_desc
574
+00000000 b gs_uc_rx_buffer
575
+00000000 b gs_uc_tx_buffer
576
+         U memcpy

+ 146
- 0
buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/flash.ld Vedi File

@@ -0,0 +1,146 @@
1
+/* ----------------------------------------------------------------------------
2
+ *         SAM Software Package License
3
+ * ----------------------------------------------------------------------------
4
+ * Copyright (c) 2012, Atmel Corporation
5
+ *
6
+ * All rights reserved.
7
+ *
8
+ * Redistribution and use in source and binary forms, with or without
9
+ * modification, are permitted provided that the following condition is met:
10
+ *
11
+ * - Redistributions of source code must retain the above copyright notice,
12
+ * this list of conditions and the disclaimer below.
13
+ *
14
+ * Atmel's name may not be used to endorse or promote products derived from
15
+ * this software without specific prior written permission.
16
+ *
17
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
+ * ----------------------------------------------------------------------------
28
+ */
29
+
30
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
31
+OUTPUT_ARCH(arm)
32
+SEARCH_DIR(.)
33
+
34
+/* Memory Spaces Definitions */
35
+MEMORY
36
+{
37
+	rom (rx)    : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */
38
+	sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */
39
+	sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */
40
+	ram (rwx)   : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */
41
+}
42
+
43
+/* Section Definitions */
44
+SECTIONS
45
+{
46
+    .text :
47
+    {
48
+        . = ALIGN(4);
49
+        _sfixed = .;
50
+        KEEP(*(.vectors .vectors.*))
51
+        *(.text .text.* .gnu.linkonce.t.*)
52
+        *(.glue_7t) *(.glue_7)
53
+        *(.rodata .rodata* .gnu.linkonce.r.*)
54
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
55
+
56
+        /* Support C constructors, and C destructors in both user code
57
+           and the C library. This also provides support for C++ code. */
58
+        . = ALIGN(4);
59
+        KEEP(*(.init))
60
+        . = ALIGN(4);
61
+        __preinit_array_start = .;
62
+        KEEP (*(.preinit_array))
63
+        __preinit_array_end = .;
64
+
65
+        . = ALIGN(4);
66
+        __init_array_start = .;
67
+        KEEP (*(SORT(.init_array.*)))
68
+        KEEP (*(.init_array))
69
+        __init_array_end = .;
70
+
71
+        . = ALIGN(0x4);
72
+        KEEP (*crtbegin.o(.ctors))
73
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
74
+        KEEP (*(SORT(.ctors.*)))
75
+        KEEP (*crtend.o(.ctors))
76
+
77
+        . = ALIGN(4);
78
+        KEEP(*(.fini))
79
+
80
+        . = ALIGN(4);
81
+        __fini_array_start = .;
82
+        KEEP (*(.fini_array))
83
+        KEEP (*(SORT(.fini_array.*)))
84
+        __fini_array_end = .;
85
+
86
+        KEEP (*crtbegin.o(.dtors))
87
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
88
+        KEEP (*(SORT(.dtors.*)))
89
+        KEEP (*crtend.o(.dtors))
90
+
91
+        . = ALIGN(4);
92
+        _efixed = .;            /* End of text section */
93
+    } > rom
94
+
95
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
96
+    PROVIDE_HIDDEN (__exidx_start = .);
97
+    .ARM.exidx :
98
+    {
99
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
100
+    } > rom
101
+    PROVIDE_HIDDEN (__exidx_end = .);
102
+
103
+    . = ALIGN(4);
104
+    _etext = .;
105
+
106
+    .relocate : AT (_etext)
107
+    {
108
+        . = ALIGN(4);
109
+        _srelocate = .;
110
+        *(.ramfunc .ramfunc.*);
111
+        *(.data .data.*);
112
+        . = ALIGN(4);
113
+        _erelocate = .;
114
+    } > ram
115
+
116
+    /* .bss section which is used for uninitialized data */
117
+    .bss ALIGN(4) (NOLOAD) :
118
+    {
119
+        . = ALIGN(4);
120
+        _sbss = . ;
121
+        _szero = .;
122
+        *(.bss .bss.*)
123
+        *(COMMON)
124
+        . = ALIGN(4);
125
+        _ebss = . ;
126
+        _ezero = .;
127
+    } > ram
128
+
129
+    . = ALIGN(4);
130
+    _end = . ;
131
+
132
+    /* .stack_dummy section doesn't contains any symbols. It is only
133
+       used for linker to calculate size of stack sections, and assign
134
+       values to stack symbols later */
135
+    .stack_dummy :
136
+    {
137
+        *(.stack*)
138
+    } > ram
139
+
140
+    /* Set stack top to end of ram, and stack limit move down by
141
+     * size of stack_dummy section */
142
+    __StackTop = ORIGIN(ram) + LENGTH(ram);
143
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
144
+    PROVIDE(_sstack = __StackLimit);
145
+    PROVIDE(_estack = __StackTop);
146
+}

+ 145
- 0
buildroot/share/PlatformIO/variants/archim/linker_scripts/gcc/sram.ld Vedi File

@@ -0,0 +1,145 @@
1
+/* ----------------------------------------------------------------------------
2
+ *         SAM Software Package License
3
+ * ----------------------------------------------------------------------------
4
+ * Copyright (c) 2012, Atmel Corporation
5
+ *
6
+ * All rights reserved.
7
+ *
8
+ * Redistribution and use in source and binary forms, with or without
9
+ * modification, are permitted provided that the following condition is met:
10
+ *
11
+ * - Redistributions of source code must retain the above copyright notice,
12
+ * this list of conditions and the disclaimer below.
13
+ *
14
+ * Atmel's name may not be used to endorse or promote products derived from
15
+ * this software without specific prior written permission.
16
+ *
17
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
+ * ----------------------------------------------------------------------------
28
+ */
29
+
30
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
31
+OUTPUT_ARCH(arm)
32
+SEARCH_DIR(.)
33
+
34
+/* Memory Spaces Definitions */
35
+MEMORY
36
+{
37
+	rom (rx)    : ORIGIN = 0x00080000, LENGTH = 0x00080000 /* Flash, 512K */
38
+	sram0 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* sram0, 64K */
39
+	sram1 (rwx) : ORIGIN = 0x20080000, LENGTH = 0x00008000 /* sram1, 32K */
40
+	ram (rwx)   : ORIGIN = 0x20070000, LENGTH = 0x00018000 /* sram, 96K */
41
+}
42
+
43
+/* The stack size used by the application. NOTE: you need to adjust  */
44
+STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x2000 ;
45
+
46
+/* Section Definitions */
47
+SECTIONS
48
+{
49
+    .text :
50
+    {
51
+        . = ALIGN(4);
52
+        _sfixed = .;
53
+        KEEP(*(.vectors .vectors.*))
54
+        *(.text .text.* .gnu.linkonce.t.*)
55
+        *(.glue_7t) *(.glue_7)
56
+        *(.rodata .rodata* .gnu.linkonce.r.*)
57
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
58
+
59
+        /* Support C constructors, and C destructors in both user code
60
+           and the C library. This also provides support for C++ code. */
61
+        . = ALIGN(4);
62
+        KEEP(*(.init))
63
+        . = ALIGN(4);
64
+        __preinit_array_start = .;
65
+        KEEP (*(.preinit_array))
66
+        __preinit_array_end = .;
67
+
68
+        . = ALIGN(4);
69
+        __init_array_start = .;
70
+        KEEP (*(SORT(.init_array.*)))
71
+        KEEP (*(.init_array))
72
+        __init_array_end = .;
73
+
74
+        . = ALIGN(0x4);
75
+        KEEP (*crtbegin.o(.ctors))
76
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
77
+        KEEP (*(SORT(.ctors.*)))
78
+        KEEP (*crtend.o(.ctors))
79
+
80
+        . = ALIGN(4);
81
+        KEEP(*(.fini))
82
+
83
+        . = ALIGN(4);
84
+        __fini_array_start = .;
85
+        KEEP (*(.fini_array))
86
+        KEEP (*(SORT(.fini_array.*)))
87
+        __fini_array_end = .;
88
+
89
+        KEEP (*crtbegin.o(.dtors))
90
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
91
+        KEEP (*(SORT(.dtors.*)))
92
+        KEEP (*crtend.o(.dtors))
93
+
94
+        . = ALIGN(4);
95
+        _efixed = .;            /* End of text section */
96
+    } > ram
97
+
98
+    . = ALIGN(4);
99
+    _etext = .;
100
+
101
+    .relocate : AT (_etext)
102
+    {
103
+        . = ALIGN(4);
104
+        _srelocate = .;
105
+        *(.ramfunc .ramfunc.*);
106
+        *(.data .data.*);
107
+        . = ALIGN(4);
108
+        _erelocate = .;
109
+    } > ram
110
+
111
+    /* .bss section which is used for uninitialized data */
112
+    .bss (NOLOAD) :
113
+    {
114
+        . = ALIGN(4);
115
+        _sbss = . ;
116
+        _szero = .;
117
+        *(.bss .bss.*)
118
+        *(COMMON)
119
+        . = ALIGN(4);
120
+        _ebss = . ;
121
+        _ezero = .;
122
+    } > ram
123
+
124
+    /* stack section */
125
+    .stack (NOLOAD):
126
+    {
127
+        . = ALIGN(8);
128
+        _sstack = .;
129
+        . = . + STACK_SIZE;
130
+        . = ALIGN(8);
131
+        _estack = .;
132
+    } > ram
133
+
134
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
135
+    PROVIDE_HIDDEN (__exidx_start = .);
136
+    .ARM.exidx :
137
+    {
138
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
139
+    } > ram
140
+    PROVIDE_HIDDEN (__exidx_end = .);
141
+
142
+    . = ALIGN(4);
143
+    _end = . ;
144
+}
145
+

+ 49
- 0
buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/flash.icf Vedi File

@@ -0,0 +1,49 @@
1
+/*###ICF### Section handled by ICF editor, don't touch! ****/
2
+/*-Editor annotation file-*/
3
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
4
+/*-Vector table start*/
5
+define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/
6
+/*-Memory Regions-*/
7
+define symbol __ICFEDIT_region_RAM0_start__  = 0x20000000;
8
+define symbol __ICFEDIT_region_RAM0_end__    = 0x20007FFF;
9
+define symbol __ICFEDIT_region_RAM1_start__  = 0x20080000;
10
+define symbol __ICFEDIT_region_RAM1_end__    = 0x20083FFF;
11
+define symbol __ICFEDIT_region_ROM0_start__  = 0x00080000;
12
+define symbol __ICFEDIT_region_ROM0_end__    = 0x0009FFFF;
13
+define symbol __ICFEDIT_region_ROM1_start__  = 0x00100000;
14
+define symbol __ICFEDIT_region_ROM1_end__    = 0x0011FFFF;
15
+/*-Sizes-*/
16
+/*define symbol __ICFEDIT_size_cstack__        = 0x1000;*//*for nandflash*/
17
+define symbol __ICFEDIT_size_cstack__        = 0x2000;
18
+define symbol __ICFEDIT_size_heap__          = 0x200;
19
+/*-Specials-*/
20
+/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/
21
+/*define symbol __ICFEDIT_size_vectors__          = 0x100;*/ /*Referenced for CMSIS*/
22
+/*-Exports-*/
23
+/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/
24
+export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/
25
+/**** End of ICF editor section. ###ICF###*/
26
+
27
+define memory mem with size   = 4G;
28
+/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/
29
+/*define region RAM0_region     = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/
30
+define region RAM0_region     = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
31
+define region RAM1_region     = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
32
+/*define region RAM_region      = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
33
+                                mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/
34
+define region ROM0_region     = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__];
35
+define region ROM1_region     = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__];
36
+
37
+/*define block RamVect   with alignment = 8, size = __ICFEDIT_size_vectors__  { };*/
38
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
39
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
40
+
41
+initialize by copy { readwrite };
42
+do not initialize  { section .noinit };
43
+
44
+/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/
45
+place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec }; /*Add for CMSIS*/
46
+place in ROM0_region          { readonly };
47
+place in RAM0_region          { readwrite, block HEAP };
48
+place in RAM1_region          { block CSTACK }; /* for nandflash*/
49
+/*place in RAM_VECT_region      { block RamVect };*/ /*Referenced for CMSIS*/

+ 33
- 0
buildroot/share/PlatformIO/variants/archim/linker_scripts/iar/sram.icf Vedi File

@@ -0,0 +1,33 @@
1
+/*###ICF### Section handled by ICF editor, don't touch! ****/
2
+/*-Editor annotation file-*/
3
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
4
+/*-Vector table start*/
5
+define symbol __ICFEDIT_vector_start__ = 0x20000000;
6
+/*-Memory Regions-*/
7
+define symbol __ICFEDIT_region_RAM0_start__  = 0x20000000;
8
+define symbol __ICFEDIT_region_RAM0_end__    = 0x20007FFF;
9
+define symbol __ICFEDIT_region_RAM1_start__  = 0x20080000;
10
+define symbol __ICFEDIT_region_RAM1_end__    = 0x20083FFF;
11
+/*-Sizes-*/
12
+define symbol __ICFEDIT_size_cstack__        = 0x900;
13
+define symbol __ICFEDIT_size_heap__          = 0x200;
14
+/*-Exports-*/
15
+export symbol __ICFEDIT_vector_start__;
16
+/**** End of ICF editor section. ###ICF###*/
17
+
18
+define memory mem with size   = 4G;
19
+define region RAM0_region     = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
20
+define region RAM1_region     = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
21
+/*define region RAM_region      = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
22
+                                mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/
23
+
24
+/* define block RamVect   with alignment = 8, size = __ICFEDIT_size_vectors__  { }; */
25
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
26
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
27
+
28
+initialize by copy { readwrite };
29
+do not initialize  { section .noinit };
30
+
31
+place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec };
32
+place in RAM0_region          { readonly };
33
+place in RAM1_region          { readwrite, block CSTACK, block HEAP };

+ 21
- 0
buildroot/share/PlatformIO/variants/archim/pins_arduino.h Vedi File

@@ -0,0 +1,21 @@
1
+/*
2
+  Copyright (c) 2011 Arduino.  All right reserved.
3
+
4
+  This library is free software; you can redistribute it and/or
5
+  modify it under the terms of the GNU Lesser General Public
6
+  License as published by the Free Software Foundation; either
7
+  version 2.1 of the License, or (at your option) any later version.
8
+
9
+  This library is distributed in the hope that it will be useful,
10
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+  See the GNU Lesser General Public License for more details.
13
+
14
+  You should have received a copy of the GNU Lesser General Public
15
+  License along with this library; if not, write to the Free Software
16
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+*/
18
+
19
+// API compatibility
20
+#include "variant.h"
21
+

+ 485
- 0
buildroot/share/PlatformIO/variants/archim/variant.cpp Vedi File

@@ -0,0 +1,485 @@
1
+/*
2
+  Copyright (c) 2011 Arduino.  All right reserved.
3
+
4
+  This library is free software; you can redistribute it and/or
5
+  modify it under the terms of the GNU Lesser General Public
6
+  License as published by the Free Software Foundation; either
7
+  version 2.1 of the License, or (at your option) any later version.
8
+
9
+  This library is distributed in the hope that it will be useful,
10
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+  See the GNU Lesser General Public License for more details.
13
+
14
+  You should have received a copy of the GNU Lesser General Public
15
+  License along with this library; if not, write to the Free Software
16
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+*/
18
+
19
+#include "variant.h"
20
+
21
+/*
22
+ * DUE Board pin   |  PORT  | Label
23
+ * ----------------+--------+-------
24
+ *   0             |  PA8   | "RX0"
25
+ *   1             |  PA9   | "TX0"
26
+ *   2       TIOA0 |  PB25  |
27
+ *   3       TIOA7 |  PC28  |
28
+ *   4       NPCS1 |  PA29  |
29
+ *           TIOB6 |  PC26  |
30
+ *   5       TIOA6 |  PC25  |
31
+ *   6       PWML7 |  PC24  |
32
+ *   7       PWML6 |  PC23  |
33
+ *   8       PWML5 |  PC22  |
34
+ *   9       PWML4 |  PC21  |
35
+ *  10       NPCS0 |  PA28  |
36
+ *           TIOB7 |  PC29  |
37
+ *  11       TIOA8 |  PD7   |
38
+ *  12       TIOB8 |  PD8   |
39
+ *  13       TIOB0 |  PB27  | LED AMBER "L"
40
+ *  14       TXD3  |  PD4   | "TX3"
41
+ *  15       RXD3  |  PD5   | "RX3"
42
+ *  16       TXD1  |  PA13  | "TX2"
43
+ *  17       RXD1  |  PA12  | "RX2"
44
+ *  18       TXD0  |  PA11  | "TX1"
45
+ *  19       RXD0  |  PA10  | "RX1"
46
+ *  20             |  PB12  | "SDA"
47
+ *  21             |  PB13  | "SCL"
48
+ *  22             |  PB26  |
49
+ *  23             |  PA14  |
50
+ *  24             |  PA15  |
51
+ *  25             |  PD0   |
52
+ *  26             |  PD1   |
53
+ *  27             |  PD2   |
54
+ *  28             |  PD3   |
55
+ *  29             |  PD6   |
56
+ *  30             |  PD9   |
57
+ *  31             |  PA7   |
58
+ *  32             |  PD10  |
59
+ *  33             |  PC1   |
60
+ *  34             |  PC2   |
61
+ *  35             |  PC3   |
62
+ *  36             |  PC4   |
63
+ *  37             |  PC5   |
64
+ *  38             |  PC6   |
65
+ *  39             |  PC7   |
66
+ *  40             |  PC8   |
67
+ *  41             |  PC9   |
68
+ *  42             |  PA19  |
69
+ *  43             |  PA20  |
70
+ *  44             |  PC19  |
71
+ *  45             |  PC18  |
72
+ *  46             |  PC17  |
73
+ *  47             |  PC16  |
74
+ *  48             |  PC15  |
75
+ *  49             |  PC14  |
76
+ *  50             |  PC13  |
77
+ *  51             |  PC12  |
78
+ *  52       NPCS2 |  PB21  |
79
+ *  53             |  PB14  |
80
+ *  54             |  PA16  | "A0"
81
+ *  55             |  PA24  | "A1"
82
+ *  56             |  PA23  | "A2"
83
+ *  57             |  PA22  | "A3"
84
+ *  58       TIOB2 |  PA6   | "A4"
85
+ *  69             |  PA4   | "A5"
86
+ *  60       TIOB1 |  PA3   | "A6"
87
+ *  61       TIOA1 |  PA2   | "A7"
88
+ *  62             |  PB17  | "A8"
89
+ *  63             |  PB18  | "A9"
90
+ *  64             |  PB19  | "A10"
91
+ *  65             |  PB20  | "A11"
92
+ *  66             |  PB15  | "DAC0"
93
+ *  67             |  PB16  | "DAC1"
94
+ *  68             |  PA1   | "CANRX"
95
+ *  69             |  PA0   | "CANTX"
96
+ *  70             |  PA17  | "SDA1"
97
+ *  71             |  PA18  | "SCL1"
98
+ *  72             |  PC30  | LED AMBER "RX"
99
+ *  73             |  PA21  | LED AMBER "TX"
100
+ *  74       MISO  |  PA25  |
101
+ *  75       MOSI  |  PA26  |
102
+ *  76       SCLK  |  PA27  |
103
+ *  77       NPCS0 |  PA28  |
104
+ *  78       NPCS3 |  PB23  | unconnected!
105
+ *
106
+ * USB pin         |  PORT
107
+ * ----------------+--------
108
+ *  ID             |  PB11
109
+ *  VBOF           |  PB10
110
+ *
111
+ */
112
+
113
+#ifdef __cplusplus
114
+extern "C" {
115
+#endif
116
+
117
+/*
118
+ * Pins descriptions
119
+ */
120
+extern const PinDescription g_APinDescription[]=
121
+{
122
+  // 0 .. 53 - Digital pins
123
+  // ----------------------
124
+  // 0/1 - UART (Serial)
125
+  { PIOA, PIO_PA8A_URXD,     ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT,  PIN_ATTR_DIGITAL,                 NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // URXD
126
+  { PIOA, PIO_PA9A_UTXD,     ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT,  PIN_ATTR_DIGITAL,                 NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // UTXD
127
+
128
+  // 2
129
+  { PIOB, PIO_PB25B_TIOA0,   ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM,  TC0_CHA0     }, // TIOA0
130
+  { PIOC, PIO_PC28B_TIOA7,   ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM,  TC2_CHA7     }, // TIOA7
131
+  { PIOC, PIO_PC26B_TIOB6,   ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM,  TC2_CHB6     }, // TIOB6
132
+
133
+  // 5
134
+  { PIOC, PIO_PC25B_TIOA6,   ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM,  TC2_CHA6     }, // TIOA6
135
+  { PIOC, PIO_PC24B_PWML7,   ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM),   NO_ADC, NO_ADC, PWM_CH7,     NOT_ON_TIMER }, // PWML7
136
+  { PIOC, PIO_PC23B_PWML6,   ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM),   NO_ADC, NO_ADC, PWM_CH6,     NOT_ON_TIMER }, // PWML6
137
+  { PIOC, PIO_PC22B_PWML5,   ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM),   NO_ADC, NO_ADC, PWM_CH5,     NOT_ON_TIMER }, // PWML5
138
+  { PIOC, PIO_PC21B_PWML4,   ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM),   NO_ADC, NO_ADC, PWM_CH4,     NOT_ON_TIMER }, // PWML4
139
+  // 10
140
+  { PIOC, PIO_PC29B_TIOB7,   ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM,  TC2_CHB7     }, // TIOB7
141
+  { PIOD, PIO_PD7B_TIOA8,    ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM,  TC2_CHA8     }, // TIOA8
142
+  { PIOD, PIO_PD8B_TIOB8,    ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM,  TC2_CHB8     }, // TIOB8
143
+
144
+  // 13 - AMBER LED
145
+  { PIOB, PIO_PB27B_TIOB0,   ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_TIMER), NO_ADC, NO_ADC, NOT_ON_PWM,  TC0_CHB0     }, // TIOB0
146
+
147
+  // 14/15 - USART3 (Serial3)
148
+  { PIOD, PIO_PD4B_TXD3,     ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // TXD3
149
+  { PIOD, PIO_PD5B_RXD3,     ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // RXD3
150
+
151
+  // 16/17 - USART1 (Serial2)
152
+  { PIOA, PIO_PA13A_TXD1,    ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // TXD1
153
+  { PIOA, PIO_PA12A_RXD1,    ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // RXD1
154
+
155
+  // 18/19 - USART0 (Serial1)
156
+  { PIOA, PIO_PA11A_TXD0,    ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // TXD0
157
+  { PIOA, PIO_PA10A_RXD0,    ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // RXD0
158
+
159
+  // 20/21 - TWI1
160
+  { PIOB, PIO_PB12A_TWD1,    ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // TWD1 - SDA0
161
+  { PIOB, PIO_PB13A_TWCK1,   ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // TWCK1 - SCL0
162
+
163
+  // 22
164
+  { PIOB, PIO_PB26,          ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 22
165
+  { PIOA, PIO_PA14,          ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 23
166
+  { PIOA, PIO_PA15,          ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 24
167
+  { PIOD, PIO_PD0,           ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 25
168
+
169
+  // 26
170
+  { PIOD, PIO_PD1,           ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 26
171
+  { PIOD, PIO_PD2,           ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 27
172
+  { PIOD, PIO_PD3,           ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 28
173
+  { PIOD, PIO_PD6,           ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 29
174
+
175
+  // 30
176
+  { PIOD, PIO_PD9,           ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 30
177
+  { PIOA, PIO_PA7,           ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 31
178
+  { PIOD, PIO_PD10,          ID_PIOD, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 32
179
+  { PIOC, PIO_PC1,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 33
180
+
181
+  // 34
182
+  { PIOC, PIO_PC2,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 34
183
+  { PIOC, PIO_PC3,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 35
184
+//{ PIOC, PIO_PC3B_PWMH0,    ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM),   NO_ADC, NO_ADC, PWM_CH0,     NOT_ON_TIMER }, // PWMH0 PIN 35
185
+  { PIOC, PIO_PC4,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 36
186
+  { PIOC, PIO_PC5,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 37
187
+//{ PIOC, PIO_PC5B_PWMH1,    ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM),   NO_ADC, NO_ADC, PWM_CH1,     NOT_ON_TIMER }, // PWMH1 PIN 37
188
+
189
+  // 38
190
+  { PIOC, PIO_PC6,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 38
191
+  { PIOC, PIO_PC7,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 39
192
+//{ PIOC, PIO_PC7B_PWMH2,    ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM),   NO_ADC, NO_ADC, PWM_CH2,     NOT_ON_TIMER }, // PWMH2 PIN 39
193
+  { PIOC, PIO_PC8,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 40
194
+//{ PIOC, PIO_PC8B_PWML3,    ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM),   NO_ADC, NO_ADC, PWM_CH3,     NOT_ON_TIMER }, // PWML3 PIN 40
195
+  { PIOC, PIO_PC9,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 41
196
+
197
+  // 42
198
+  { PIOA, PIO_PA19,          ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 42
199
+  { PIOA, PIO_PA20,          ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 43
200
+  { PIOC, PIO_PC19,          ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 44
201
+//{ PIOC, PIO_PC19B_PWMH5,    ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_PWM),   NO_ADC, NO_ADC, PWM_CH5,     NOT_ON_TIMER }, // PWMH5 PIN 44
202
+  { PIOC, PIO_PC18,          ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 45
203
+
204
+  // 46
205
+  { PIOC, PIO_PC17,          ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 46
206
+  { PIOC, PIO_PC16,          ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 47
207
+  { PIOC, PIO_PC15,          ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 48
208
+  { PIOC, PIO_PC14,          ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 49
209
+
210
+  // 50
211
+  { PIOC, PIO_PC13,          ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 50
212
+  { PIOC, PIO_PC12,          ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 51
213
+  { PIOB, PIO_PB21,          ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 52
214
+  { PIOB, PIO_PB14,          ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // PIN 53
215
+
216
+
217
+  // 54 .. 65 - Analog pins
218
+  // ----------------------
219
+  { PIOA, PIO_PA16X1_AD7,    ID_PIOA, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC0,   ADC7,   NOT_ON_PWM,  NOT_ON_TIMER }, // AD0
220
+  { PIOA, PIO_PA24X1_AD6,    ID_PIOA, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC1,   ADC6,   NOT_ON_PWM,  NOT_ON_TIMER }, // AD1
221
+  { PIOA, PIO_PA23X1_AD5,    ID_PIOA, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC2,   ADC5,   NOT_ON_PWM,  NOT_ON_TIMER }, // AD2
222
+  { PIOA, PIO_PA22X1_AD4,    ID_PIOA, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC3,   ADC4,   NOT_ON_PWM,  NOT_ON_TIMER }, // AD3
223
+  // 58
224
+//{ PIOA, PIO_PA6X1_AD3,     ID_PIOA, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC4,   ADC3,   NOT_ON_PWM,  TC0_CHB2     }, // AD4
225
+  { PIOA, PIO_PA6A_TIOB2,    ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_TIMER|PIN_ATTR_DIGITAL), ADC4,   ADC3,   NOT_ON_PWM,  TC0_CHB2     }, // TIOB2
226
+  { PIOA, PIO_PA4X1_AD2,     ID_PIOA, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC5,   ADC2,   NOT_ON_PWM,  NOT_ON_TIMER }, // AD5
227
+  { PIOA, PIO_PA3X1_AD1,     ID_PIOA, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC6,   ADC1,   NOT_ON_PWM,  TC0_CHB1     }, // AD6
228
+  { PIOA, PIO_PA2X1_AD0,     ID_PIOA, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC7,   ADC0,   NOT_ON_PWM,  TC0_CHA1     }, // AD7
229
+  // 62
230
+  { PIOB, PIO_PB17X1_AD10,   ID_PIOB, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC8,   ADC10,  NOT_ON_PWM,  NOT_ON_TIMER }, // AD8
231
+  { PIOB, PIO_PB18X1_AD11,   ID_PIOB, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC9,   ADC11,  NOT_ON_PWM,  NOT_ON_TIMER }, // AD9
232
+  { PIOB, PIO_PB19X1_AD12,   ID_PIOB, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC10,  ADC12,  NOT_ON_PWM,  NOT_ON_TIMER }, // AD10
233
+  { PIOB, PIO_PB20X1_AD13,   ID_PIOB, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC11,  ADC13,  NOT_ON_PWM,  NOT_ON_TIMER }, // AD11
234
+
235
+  // 66/67 - DAC0/DAC1
236
+  { PIOB, PIO_PB15X1_DAC0,   ID_PIOB, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC12,  DA0,    NOT_ON_PWM,  NOT_ON_TIMER }, // DAC0
237
+  { PIOB, PIO_PB16X1_DAC1,   ID_PIOB, PIO_INPUT,    PIO_DEFAULT, PIN_ATTR_ANALOG,                   ADC13,  DA1,    NOT_ON_PWM,  NOT_ON_TIMER }, // DAC1
238
+
239
+  // 68/69 - CANRX0/CANTX0
240
+  { PIOA, PIO_PA1A_CANRX0,   ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  ADC14,  NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // CANRX
241
+  { PIOA, PIO_PA0A_CANTX0,   ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  ADC15,  NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // CANTX
242
+
243
+  // 70/71 - TWI0
244
+  { PIOA, PIO_PA17A_TWD0,    ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // TWD0 - SDA1
245
+  { PIOA, PIO_PA18A_TWCK0,   ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // TWCK0 - SCL1
246
+
247
+  // 72/73 - LEDs
248
+  { PIOC, PIO_PC30,          ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // LED AMBER RXL
249
+  { PIOA, PIO_PA21,          ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // LED AMBER TXL
250
+
251
+  // 74/75/76 - SPI
252
+  { PIOA, PIO_PA25A_SPI0_MISO,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // MISO
253
+  { PIOA, PIO_PA26A_SPI0_MOSI,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // MOSI
254
+  { PIOA, PIO_PA27A_SPI0_SPCK,ID_PIOA,PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // SPCK
255
+
256
+  // 77 - SPI CS0
257
+  { PIOA, PIO_PA28A_SPI0_NPCS0,ID_PIOA,PIO_PERIPH_A,PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // NPCS0
258
+
259
+  // 78 - SPI CS3 (unconnected)
260
+  { PIOB, PIO_PB23B_SPI0_NPCS3,ID_PIOB,PIO_PERIPH_B,PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // NPCS3
261
+
262
+  // 79 .. 84 - "All pins" masks
263
+
264
+  // 79 - TWI0 all pins
265
+  { PIOA, PIO_PA17A_TWD0|PIO_PA18A_TWCK0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
266
+  // 80 - TWI1 all pins
267
+  { PIOB, PIO_PB12A_TWD1|PIO_PB13A_TWCK1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
268
+  // 81 - UART (Serial) all pins
269
+  { PIOA, PIO_PA8A_URXD|PIO_PA9A_UTXD, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
270
+  // 82 - USART0 (Serial1) all pins
271
+  { PIOA, PIO_PA11A_TXD0|PIO_PA10A_RXD0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
272
+  // 83 - USART1 (Serial2) all pins
273
+  { PIOA, PIO_PA13A_TXD1|PIO_PA12A_RXD1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
274
+  // 84 - USART3 (Serial3) all pins
275
+  { PIOD, PIO_PD4B_TXD3|PIO_PD5B_RXD3, ID_PIOD, PIO_PERIPH_B, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER },
276
+
277
+  // 85 - USB
278
+//{ PIOB, PIO_PB11A_UOTGID|PIO_PB10A_UOTGVBOF, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // ID - VBOF
279
+  // 85 - PB11 only
280
+  { PIOB, PIO_PB11A_UOTGID, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // ID - VBOF
281
+
282
+  // 86 - SPI CS2
283
+  { PIOB, PIO_PB21B_SPI0_NPCS2, ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // NPCS2
284
+
285
+  // 87 - SPI CS1
286
+  { PIOA, PIO_PA29A_SPI0_NPCS1, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // NPCS1
287
+
288
+  // 88/89 - CANRX1/CANTX1 (same physical pin for 66/53)
289
+  { PIOB, PIO_PB15A_CANRX1,     ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // CANRX1
290
+  { PIOB, PIO_PB14A_CANTX1,     ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // CANTX1
291
+
292
+  // 90 .. 91 - "All CAN pins" masks
293
+  // 90 - CAN0 all pins
294
+  { PIOA, PIO_PA1A_CANRX0|PIO_PA0A_CANTX0, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC,  NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER },
295
+  // 91 - CAN1 all pins
296
+  { PIOB, PIO_PB15A_CANRX1|PIO_PB14A_CANTX1, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT, (PIN_ATTR_DIGITAL|PIN_ATTR_COMBO), NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER },
297
+
298
+  // 92 - Extra AMBIT Pins
299
+  { PIOC, PIO_PC11,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 92
300
+  { PIOB, PIO_PB2,            ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 93
301
+  { PIOB, PIO_PB1,            ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 94
302
+  { PIOB, PIO_PB0,            ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 95
303
+  { PIOC, PIO_PC10,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 96
304
+  { PIOB, PIO_PB24,           ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 97
305
+  { PIOB, PIO_PB7,            ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 98
306
+  { PIOB, PIO_PB6,            ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 99
307
+  { PIOB, PIO_PB8,            ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 100
308
+  { PIOB, PIO_PB5,            ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 101
309
+  { PIOB, PIO_PB4,            ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 102
310
+  { PIOB, PIO_PB3,            ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 103
311
+  { PIOC, PIO_PC20,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 104
312
+  { PIOB, PIO_PB22,           ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 105
313
+  { PIOC, PIO_PC27,           ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 106
314
+  { PIOB, PIO_PB10B_A18,      ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 107
315
+  { PIOB, PIO_PB9,            ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 108
316
+  { PIOA, PIO_PA5,            ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL,                  NO_ADC, NO_ADC, NOT_ON_PWM,  NOT_ON_TIMER }, // DIO PIN 109
317
+
318
+  // END
319
+  { NULL, 0, 0, PIO_NOT_A_PIN, PIO_DEFAULT, 0, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }
320
+} ;
321
+
322
+
323
+uint8_t g_pinStatus[PINS_COUNT] = {0};
324
+
325
+#ifdef __cplusplus
326
+}
327
+#endif
328
+
329
+/*
330
+ * UART objects
331
+ */
332
+RingBuffer rx_buffer1;
333
+RingBuffer tx_buffer1;
334
+
335
+UARTClass Serial(UART, UART_IRQn, ID_UART, &rx_buffer1, &tx_buffer1);
336
+void serialEvent() __attribute__((weak));
337
+void serialEvent() { }
338
+
339
+// IT handlers
340
+void UART_Handler(void)
341
+{
342
+  Serial.IrqHandler();
343
+}
344
+
345
+// ----------------------------------------------------------------------------
346
+/*
347
+ * USART objects
348
+ */
349
+RingBuffer rx_buffer2;
350
+RingBuffer rx_buffer3;
351
+RingBuffer rx_buffer4;
352
+RingBuffer tx_buffer2;
353
+RingBuffer tx_buffer3;
354
+RingBuffer tx_buffer4;
355
+
356
+USARTClass Serial1(USART0, USART0_IRQn, ID_USART0, &rx_buffer2, &tx_buffer2);
357
+void serialEvent1() __attribute__((weak));
358
+void serialEvent1() { }
359
+USARTClass Serial2(USART1, USART1_IRQn, ID_USART1, &rx_buffer3, &tx_buffer3);
360
+void serialEvent2() __attribute__((weak));
361
+void serialEvent2() { }
362
+USARTClass Serial3(USART3, USART3_IRQn, ID_USART3, &rx_buffer4, &tx_buffer4);
363
+void serialEvent3() __attribute__((weak));
364
+void serialEvent3() { }
365
+
366
+// IT handlers
367
+void USART0_Handler(void)
368
+{
369
+  Serial1.IrqHandler();
370
+}
371
+
372
+void USART1_Handler(void)
373
+{
374
+  Serial2.IrqHandler();
375
+}
376
+
377
+void USART3_Handler(void)
378
+{
379
+  Serial3.IrqHandler();
380
+}
381
+
382
+// ----------------------------------------------------------------------------
383
+
384
+void serialEventRun(void)
385
+{
386
+  if (Serial.available()) serialEvent();
387
+  if (Serial1.available()) serialEvent1();
388
+  if (Serial2.available()) serialEvent2();
389
+  if (Serial3.available()) serialEvent3();
390
+}
391
+
392
+// ----------------------------------------------------------------------------
393
+
394
+#ifdef __cplusplus
395
+extern "C" {
396
+#endif
397
+
398
+void __libc_init_array(void);
399
+
400
+void init( void )
401
+{
402
+  SystemInit();
403
+
404
+  // Set Systick to 1ms interval, common to all SAM3 variants
405
+  if (SysTick_Config(SystemCoreClock / 1000))
406
+  {
407
+    // Capture error
408
+    while (true);
409
+  }
410
+
411
+  // Initialize C library
412
+  __libc_init_array();
413
+
414
+  // Disable pull-up on every pin
415
+  for (unsigned i = 0; i < PINS_COUNT; i++)
416
+	  digitalWrite(i, LOW);
417
+
418
+  // Enable parallel access on PIO output data registers
419
+  PIOA->PIO_OWER = 0xFFFFFFFF;
420
+  PIOB->PIO_OWER = 0xFFFFFFFF;
421
+  PIOC->PIO_OWER = 0xFFFFFFFF;
422
+  PIOD->PIO_OWER = 0xFFFFFFFF;
423
+
424
+  // Set USB Full Speed for Archim
425
+  udd_low_speed_disable();
426
+  udd_high_speed_disable();
427
+
428
+  // Initialize Serial port U(S)ART pins
429
+  PIO_Configure(
430
+    g_APinDescription[PINS_UART].pPort,
431
+    g_APinDescription[PINS_UART].ulPinType,
432
+    g_APinDescription[PINS_UART].ulPin,
433
+    g_APinDescription[PINS_UART].ulPinConfiguration);
434
+  digitalWrite(0, HIGH); // Enable pullup for RX0
435
+  PIO_Configure(
436
+    g_APinDescription[PINS_USART0].pPort,
437
+    g_APinDescription[PINS_USART0].ulPinType,
438
+    g_APinDescription[PINS_USART0].ulPin,
439
+    g_APinDescription[PINS_USART0].ulPinConfiguration);
440
+  PIO_Configure(
441
+    g_APinDescription[PINS_USART1].pPort,
442
+    g_APinDescription[PINS_USART1].ulPinType,
443
+    g_APinDescription[PINS_USART1].ulPin,
444
+    g_APinDescription[PINS_USART1].ulPinConfiguration);
445
+  PIO_Configure(
446
+    g_APinDescription[PINS_USART3].pPort,
447
+    g_APinDescription[PINS_USART3].ulPinType,
448
+    g_APinDescription[PINS_USART3].ulPin,
449
+    g_APinDescription[PINS_USART3].ulPinConfiguration);
450
+
451
+  // Initialize USB pins
452
+  PIO_Configure(
453
+    g_APinDescription[PINS_USB].pPort,
454
+    g_APinDescription[PINS_USB].ulPinType,
455
+    g_APinDescription[PINS_USB].ulPin,
456
+    g_APinDescription[PINS_USB].ulPinConfiguration);
457
+
458
+  // Initialize CAN pins
459
+  PIO_Configure(
460
+    g_APinDescription[PINS_CAN0].pPort,
461
+    g_APinDescription[PINS_CAN0].ulPinType,
462
+    g_APinDescription[PINS_CAN0].ulPin,
463
+    g_APinDescription[PINS_CAN0].ulPinConfiguration);
464
+  PIO_Configure(
465
+    g_APinDescription[PINS_CAN1].pPort,
466
+    g_APinDescription[PINS_CAN1].ulPinType,
467
+    g_APinDescription[PINS_CAN1].ulPin,
468
+    g_APinDescription[PINS_CAN1].ulPinConfiguration);
469
+
470
+  // Initialize Analog Controller
471
+  pmc_enable_periph_clk(ID_ADC);
472
+  adc_init(ADC, SystemCoreClock, ADC_FREQ_MAX, ADC_STARTUP_FAST);
473
+  adc_configure_timing(ADC, 0, ADC_SETTLING_TIME_3, 1);
474
+  adc_configure_trigger(ADC, ADC_TRIG_SW, 0); // Disable hardware trigger.
475
+  adc_disable_interrupt(ADC, 0xFFFFFFFF); // Disable all ADC interrupts.
476
+  adc_disable_all_channel(ADC);
477
+
478
+  // Initialize analogOutput module
479
+  analogOutputInit();
480
+}
481
+
482
+#ifdef __cplusplus
483
+}
484
+#endif
485
+

+ 284
- 0
buildroot/share/PlatformIO/variants/archim/variant.h Vedi File

@@ -0,0 +1,284 @@
1
+/*
2
+  Copyright (c) 2011 Arduino.  All right reserved.
3
+
4
+  This library is free software; you can redistribute it and/or
5
+  modify it under the terms of the GNU Lesser General Public
6
+  License as published by the Free Software Foundation; either
7
+  version 2.1 of the License, or (at your option) any later version.
8
+
9
+  This library is distributed in the hope that it will be useful,
10
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+  See the GNU Lesser General Public License for more details.
13
+
14
+  You should have received a copy of the GNU Lesser General Public
15
+  License along with this library; if not, write to the Free Software
16
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+*/
18
+
19
+#ifndef _VARIANT_ARDUINO_DUE_X_
20
+#define _VARIANT_ARDUINO_DUE_X_
21
+
22
+/*----------------------------------------------------------------------------
23
+ *        Definitions
24
+ *----------------------------------------------------------------------------*/
25
+
26
+/** Frequency of the board main oscillator */
27
+#define VARIANT_MAINOSC		12000000
28
+
29
+/** Master clock frequency */
30
+#define VARIANT_MCK			84000000
31
+
32
+/*----------------------------------------------------------------------------
33
+ *        Headers
34
+ *----------------------------------------------------------------------------*/
35
+
36
+#include "Arduino.h"
37
+#ifdef __cplusplus
38
+#include "UARTClass.h"
39
+#include "USARTClass.h"
40
+#endif
41
+
42
+#ifdef __cplusplus
43
+extern "C"{
44
+#endif // __cplusplus
45
+
46
+/**
47
+ * Libc porting layers
48
+ */
49
+#if defined (  __GNUC__  ) /* GCC CS3 */
50
+#    include <syscalls.h> /** RedHat Newlib minimal stub */
51
+#endif
52
+
53
+/*----------------------------------------------------------------------------
54
+ *        Pins
55
+ *----------------------------------------------------------------------------*/
56
+
57
+// Number of pins defined in PinDescription array
58
+#define PINS_COUNT           (79u)
59
+#define NUM_DIGITAL_PINS     (66u)
60
+#define NUM_ANALOG_INPUTS    (12u)
61
+#define analogInputToDigitalPin(p)  ((p < 12u) ? (p) + 54u : -1)
62
+
63
+#define digitalPinToPort(P)        ( g_APinDescription[P].pPort )
64
+#define digitalPinToBitMask(P)     ( g_APinDescription[P].ulPin )
65
+//#define analogInPinToBit(P)        ( )
66
+#define portOutputRegister(port)   ( &(port->PIO_ODSR) )
67
+#define portInputRegister(port)    ( &(port->PIO_PDSR) )
68
+#define digitalPinHasPWM(P)        ( g_APinDescription[P].ulPWMChannel != NOT_ON_PWM || g_APinDescription[P].ulTCChannel != NOT_ON_TIMER )
69
+
70
+/*
71
+ * portModeRegister(..) should return a register to set pin mode
72
+ * INPUT or OUTPUT by setting the corresponding bit to 0 or 1.
73
+ * Unfortunately on SAM architecture the PIO_OSR register is
74
+ * read-only and can be set only through the enable/disable registers
75
+ * pair PIO_OER/PIO_ODR.
76
+ */
77
+// #define portModeRegister(port)   ( &(port->PIO_OSR) )
78
+
79
+/*
80
+ * digitalPinToTimer(..) is AVR-specific and is not defined for SAM
81
+ * architecture. If you need to check if a pin supports PWM you must
82
+ * use digitalPinHasPWM(..).
83
+ *
84
+ * https://github.com/arduino/Arduino/issues/1833
85
+ */
86
+// #define digitalPinToTimer(P)
87
+
88
+// Interrupts
89
+#define digitalPinToInterrupt(p)  ((p) < NUM_DIGITAL_PINS ? (p) : -1)
90
+
91
+// LEDs
92
+#define PIN_LED_13           (13u)
93
+#define PIN_LED_RXL          (72u)
94
+#define PIN_LED_TXL          (73u)
95
+#define PIN_LED              PIN_LED_13
96
+#define PIN_LED2             PIN_LED_RXL
97
+#define PIN_LED3             PIN_LED_TXL
98
+#define LED_BUILTIN          13
99
+
100
+/*
101
+ * SPI Interfaces
102
+ */
103
+#define SPI_INTERFACES_COUNT 1
104
+
105
+#define SPI_INTERFACE        SPI0
106
+#define SPI_INTERFACE_ID     ID_SPI0
107
+#define SPI_CHANNELS_NUM 4
108
+#define PIN_SPI_SS0          (77u)
109
+#define PIN_SPI_SS1          (87u)
110
+#define PIN_SPI_SS2          (86u)
111
+#define PIN_SPI_SS3          (78u)
112
+#define PIN_SPI_MOSI         (75u)
113
+#define PIN_SPI_MISO         (74u)
114
+#define PIN_SPI_SCK          (76u)
115
+#define BOARD_SPI_SS0        (77u) //(10u)
116
+#define BOARD_SPI_SS1        (4u)
117
+#define BOARD_SPI_SS2        (52u)
118
+#define BOARD_SPI_SS3        PIN_SPI_SS3
119
+#define BOARD_SPI_DEFAULT_SS BOARD_SPI_SS3
120
+
121
+#define BOARD_PIN_TO_SPI_PIN(x) \
122
+	(x==BOARD_SPI_SS0 ? PIN_SPI_SS0 : \
123
+	(x==BOARD_SPI_SS1 ? PIN_SPI_SS1 : \
124
+	(x==BOARD_SPI_SS2 ? PIN_SPI_SS2 : PIN_SPI_SS3 )))
125
+#define BOARD_PIN_TO_SPI_CHANNEL(x) \
126
+	(x==BOARD_SPI_SS0 ? 0 : \
127
+	(x==BOARD_SPI_SS1 ? 1 : \
128
+	(x==BOARD_SPI_SS2 ? 2 : 3)))
129
+
130
+static const uint8_t SS   = BOARD_SPI_SS0;
131
+static const uint8_t SS1  = BOARD_SPI_SS1;
132
+static const uint8_t SS2  = BOARD_SPI_SS2;
133
+static const uint8_t SS3  = BOARD_SPI_SS3;
134
+static const uint8_t MOSI = PIN_SPI_MOSI;
135
+static const uint8_t MISO = PIN_SPI_MISO;
136
+static const uint8_t SCK  = PIN_SPI_SCK;
137
+
138
+/*
139
+ * Wire Interfaces
140
+ */
141
+#define WIRE_INTERFACES_COUNT 2
142
+
143
+#define PIN_WIRE_SDA         (20u)
144
+#define PIN_WIRE_SCL         (21u)
145
+#define WIRE_INTERFACE       TWI1
146
+#define WIRE_INTERFACE_ID    ID_TWI1
147
+#define WIRE_ISR_HANDLER     TWI1_Handler
148
+#define WIRE_ISR_ID          TWI1_IRQn
149
+
150
+#define PIN_WIRE1_SDA        (70u)
151
+#define PIN_WIRE1_SCL        (71u)
152
+#define WIRE1_INTERFACE      TWI0
153
+#define WIRE1_INTERFACE_ID   ID_TWI0
154
+#define WIRE1_ISR_HANDLER    TWI0_Handler
155
+#define WIRE1_ISR_ID         TWI0_IRQn
156
+
157
+static const uint8_t SDA  = PIN_WIRE_SDA;
158
+static const uint8_t SCL  = PIN_WIRE_SCL;
159
+static const uint8_t SDA1 = PIN_WIRE1_SDA;
160
+static const uint8_t SCL1 = PIN_WIRE1_SCL;
161
+
162
+/*
163
+ * UART/USART Interfaces
164
+ */
165
+// Serial
166
+#define PINS_UART            (81u)
167
+// Serial1
168
+#define PINS_USART0          (82u)
169
+// Serial2
170
+#define PINS_USART1          (83u)
171
+// Serial3
172
+#define PINS_USART3          (84u)
173
+
174
+/*
175
+ * USB Interfaces
176
+ */
177
+#define PINS_USB             (85u)
178
+
179
+/*
180
+ * Analog pins
181
+ */
182
+static const uint8_t A0  = 54;
183
+static const uint8_t A1  = 55;
184
+static const uint8_t A2  = 56;
185
+static const uint8_t A3  = 57;
186
+static const uint8_t A4  = 58;
187
+static const uint8_t A5  = 59;
188
+static const uint8_t A6  = 60;
189
+static const uint8_t A7  = 61;
190
+static const uint8_t A8  = 62;
191
+static const uint8_t A9  = 63;
192
+static const uint8_t A10 = 64;
193
+static const uint8_t A11 = 65;
194
+static const uint8_t DAC0 = 66;
195
+static const uint8_t DAC1 = 67;
196
+static const uint8_t CANRX = 68;
197
+static const uint8_t CANTX = 69;
198
+#define ADC_RESOLUTION		12
199
+
200
+/*
201
+ * Complementary CAN pins
202
+ */
203
+static const uint8_t CAN1RX = 88;
204
+static const uint8_t CAN1TX = 89;
205
+
206
+// CAN0
207
+#define PINS_CAN0            (90u)
208
+// CAN1
209
+#define PINS_CAN1            (91u)
210
+
211
+
212
+/*
213
+ * DACC
214
+ */
215
+#define DACC_INTERFACE		DACC
216
+#define DACC_INTERFACE_ID	ID_DACC
217
+#define DACC_RESOLUTION		12
218
+#define DACC_ISR_HANDLER    DACC_Handler
219
+#define DACC_ISR_ID         DACC_IRQn
220
+
221
+/*
222
+ * PWM
223
+ */
224
+#define PWM_INTERFACE		PWM
225
+#define PWM_INTERFACE_ID	ID_PWM
226
+#define PWM_FREQUENCY		31000
227
+#define PWM_MAX_DUTY_CYCLE	255
228
+#define PWM_MIN_DUTY_CYCLE	0
229
+#define PWM_RESOLUTION		8
230
+
231
+/*
232
+ * TC
233
+ */
234
+#define TC_INTERFACE        TC0
235
+#define TC_INTERFACE_ID     ID_TC0
236
+#define TC_FREQUENCY        100000
237
+#define TC_MAX_DUTY_CYCLE   255
238
+#define TC_MIN_DUTY_CYCLE   0
239
+#define TC_RESOLUTION		8
240
+
241
+#ifdef __cplusplus
242
+}
243
+#endif
244
+
245
+/*----------------------------------------------------------------------------
246
+ *        Arduino objects - C++ only
247
+ *----------------------------------------------------------------------------*/
248
+
249
+#ifdef __cplusplus
250
+
251
+extern UARTClass Serial;
252
+extern USARTClass Serial1;
253
+extern USARTClass Serial2;
254
+extern USARTClass Serial3;
255
+
256
+#endif
257
+
258
+// These serial port names are intended to allow libraries and architecture-neutral
259
+// sketches to automatically default to the correct port name for a particular type
260
+// of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
261
+// the first hardware serial port whose RX/TX pins are not dedicated to another use.
262
+//
263
+// SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
264
+//
265
+// SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
266
+//
267
+// SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
268
+//
269
+// SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
270
+//
271
+// SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
272
+//                            pins are NOT connected to anything by default.
273
+#define SERIAL_PORT_MONITOR         Serial
274
+#define SERIAL_PORT_USBVIRTUAL      SerialUSB
275
+#define SERIAL_PORT_HARDWARE_OPEN   Serial1
276
+#define SERIAL_PORT_HARDWARE_OPEN1  Serial2
277
+#define SERIAL_PORT_HARDWARE_OPEN2  Serial3
278
+#define SERIAL_PORT_HARDWARE        Serial
279
+#define SERIAL_PORT_HARDWARE1       Serial1
280
+#define SERIAL_PORT_HARDWARE2       Serial2
281
+#define SERIAL_PORT_HARDWARE3       Serial3
282
+
283
+#endif /* _VARIANT_ARDUINO_DUE_X_ */
284
+

+ 2
- 0
platformio.ini Vedi File

@@ -576,8 +576,10 @@ build_flags   = ${common.build_flags}
576 576
 [common_DUE_archim]
577 577
 platform      = atmelsam
578 578
 extends       = env:DUE
579
+board         = archim
579 580
 build_flags   = ${common.build_flags}
580 581
   -DARDUINO_SAM_ARCHIM -DARDUINO_ARCH_SAM -D__SAM3X8E__ -DUSBCON
582
+board_build.variants_dir = buildroot/share/PlatformIO/variants/
581 583
 extra_scripts = ${common.extra_scripts}
582 584
   Marlin/src/HAL/DUE/upload_extra_script.py
583 585
 

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