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✨ New board TH3D_EZBOARD_LITE_V2 (#22621)

Scott Lahteine 3 years ago
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commit
8cf7dc960f
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+ 1
- 0
Marlin/src/core/boards.h View File

@@ -393,6 +393,7 @@
393 393
 #define BOARD_ANET_ET4                4229  // ANET ET4 V1.x (STM32F407VGT6)
394 394
 #define BOARD_ANET_ET4P               4230  // ANET ET4P V1.x (STM32F407VGT6)
395 395
 #define BOARD_FYSETC_CHEETAH_V20      4231  // FYSETC Cheetah V2.0
396
+#define BOARD_TH3D_EZBOARD_LITE_V2    4232  // TH3D EZBoard Lite v2.0
396 397
 
397 398
 //
398 399
 // ARM Cortex M7

+ 2
- 0
Marlin/src/pins/pins.h View File

@@ -641,6 +641,8 @@
641 641
   #include "stm32f4/pins_FYSETC_CHEETAH_V20.h"  // STM32F4                                env:FYSETC_CHEETAH_V20
642 642
 #elif MB(MKS_MONSTER8)
643 643
   #include "stm32f4/pins_MKS_MONSTER8.h"        // STM32F4                                env:mks_monster8 env:mks_monster8_usb_flash_drive env:mks_monster8_usb_flash_drive_msc
644
+#elif MB(TH3D_EZBOARD_LITE_V2)
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+  #include "stm32f4/pins_TH3D_EZBOARD_LITE_V2.h" // STM32F4                               env:TH3D_EZBoard_Lite_V2
644 646
 
645 647
 //
646 648
 // ARM Cortex M7

+ 264
- 0
Marlin/src/pins/stm32f4/pins_TH3D_EZBOARD_LITE_V2.h View File

@@ -0,0 +1,264 @@
1
+/**
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+ * Marlin 3D Printer Firmware
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+ * Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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+ *
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+ * Based on Sprinter and grbl.
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+ * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
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+ *
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+ * This program is free software: you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation, either version 3 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program.  If not, see <https://www.gnu.org/licenses/>.
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+ *
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+ */
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+#pragma once
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+
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+#define ALLOW_STM32DUINO
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+#include "env_validate.h"
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+
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+#define BOARD_INFO_NAME   "TH3D EZBoard Lite V2"
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+#define BOARD_WEBSITE_URL "th3dstudio.com"
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+
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+//#define V3_EZABL_ON_SERVO                       // As in TH3D Firmware Config
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+
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+#define DISABLE_JTAGSWD                           // Disabling J-tag and Debug via SWD
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+
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+// Onboard I2C EEPROM
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+#if NO_EEPROM_SELECTED
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+  #define I2C_EEPROM
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+  #define MARLIN_EEPROM_SIZE              0x1000  // 4KB
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+  #define I2C_SCL_PIN                       PB6
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+  #define I2C_SDA_PIN                       PB7
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+  #undef NO_EEPROM_SELECTED
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+#endif
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+
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+//
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+// Neopixels
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+//
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+#define NEOPIXEL_PIN                        PA8
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+
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+//
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+// Servos
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+//
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+#if ENABLED(V3_EZABL_ON_SERVO)
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+  #define SERVO0_PIN                        -1
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+#else
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+  #define SERVO0_PIN                        PA2
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+#endif
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+
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+//
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+// Limit Switches
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+//
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+#if EITHER(SENSORLESS_HOMING, SENSORLESS_PROBING)
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+  // Sensorless homing pins
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+  #if ENABLED(X_AXIS_SENSORLESS_HOMING)
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+    #define X_STOP_PIN                      PB4
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+  #else
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+    #define X_STOP_PIN                      PC1
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+  #endif
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+
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+  #if ENABLED(Y_AXIS_SENSORLESS_HOMING)
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+    #define Y_STOP_PIN                      PB9
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+  #else
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+    #define Y_STOP_PIN                      PC2
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+  #endif
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+
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+  //#define Z_STOP_PIN                      PC15  // Don't use sensorless homing on Z!
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+
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+  #define E_STOP_PIN                        PB10
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+#else
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+  // Standard Endstop Pins
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+  #define X_STOP_PIN                        PC1
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+  #define Y_STOP_PIN                        PC2
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+#endif
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+
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+#if ENABLED(V3_EZABL_ON_SERVO)
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+  #define Z_STOP_PIN                        PA2
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+#else
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+  #define Z_STOP_PIN                        PC3
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+#endif
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+
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+//
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+// Filament Runout Sensor
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+//
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+#ifndef FIL_RUNOUT_PIN
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+  #define FIL_RUNOUT_PIN                    PC0
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+#endif
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+
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+//
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+// Steppers
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+//
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+#define X_STEP_PIN                          PB3
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+#define X_DIR_PIN                           PD2
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+#define X_ENABLE_PIN                        PB5
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+
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+#define Y_STEP_PIN                          PB8
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+#define Y_DIR_PIN                           PC13
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+#define Y_ENABLE_PIN                        PC12
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+
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+#define Z_STEP_PIN                          PA3
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+#define Z_DIR_PIN                           PB1
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+#define Z_ENABLE_PIN                        PC14
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+
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+#define E0_STEP_PIN                         PA15
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+#define E0_DIR_PIN                          PB11
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+#define E0_ENABLE_PIN                       PB2
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+
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+#if HAS_TMC_UART
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+  //
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+  // Hardware Serial on UART4, Single Wire, 0-3 addresses
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+  //
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+  #define X_SERIAL_TX_PIN                   PC10
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+  #define X_SERIAL_RX_PIN                   PC11
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+
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+  #define Y_SERIAL_TX_PIN                   PC10
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+  #define Y_SERIAL_RX_PIN                   PC11
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+
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+  #define Z_SERIAL_TX_PIN                   PC10
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+  #define Z_SERIAL_RX_PIN                   PC11
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+
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+  #define E0_SERIAL_TX_PIN                  PC10
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+  #define E0_SERIAL_RX_PIN                  PC11
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+
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+  // Reduce baud rate to improve software serial reliability
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+  #define TMC_BAUD_RATE                    19200
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+#endif
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+
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+//
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+// Temp Sensors
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+//  3.3V max when defined as an Analog Input!
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+//
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+#define TEMP_0_PIN                          PA1   // Analog Input PA1
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+#define TEMP_BED_PIN                        PA0   // Analog Input PA0
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+
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+//
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+// Heaters / Fans
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+//
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+#define HEATER_BED_PIN                      PC9
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+#define HEATER_0_PIN                        PC8
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+#ifndef FAN_PIN
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+  #define FAN_PIN                           PC6
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+#endif
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+#define FAN1_PIN                            PC7
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+
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+//
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+// Auto fans
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+//
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+#define AUTO_FAN_PIN                        PC7
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+#ifndef E0_AUTO_FAN_PIN
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+  #define E0_AUTO_FAN_PIN           AUTO_FAN_PIN
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+#endif
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+#ifndef E1_AUTO_FAN_PIN
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+  #define E1_AUTO_FAN_PIN           AUTO_FAN_PIN
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+#endif
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+#ifndef E2_AUTO_FAN_PIN
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+  #define E2_AUTO_FAN_PIN           AUTO_FAN_PIN
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+#endif
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+
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+//
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+// SD Card
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+//
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+
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+#define SDCARD_CONNECTION                ONBOARD
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+
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+//#define SOFTWARE_SPI
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+#define CUSTOM_SPI_PINS
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+#define SDSS                                PA4
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+#define SD_SCK_PIN                          PA5
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+#define SD_MISO_PIN                         PA6
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+#define SD_MOSI_PIN                         PA7
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+#define SD_SS_PIN                           SDSS
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+//#define SD_DETECT_PIN                     -1
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+//#define ONBOARD_SD_CS_PIN                 SDSS
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+
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+//
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+// LCD / Controller
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+//
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+
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+/**
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+ *        ______
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+ *    5V | 1  2 | GND
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+ *  PB15 | 3  4 | PB12
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+ *  PB13 | 5  6   PC5
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+ *  ---- | 7  8 | PC4
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+ *  PB0  | 9 10 | PA14
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+ *        ------
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+ *         EXP1
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+ *
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+ * LCD_PINS_D5, D6, and D7 are not present in the EXP1 connector, and will need to be
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+ * defined to use the REPRAP_DISCOUNT_SMART_CONTROLLER.
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+ *
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+ * A remote SD card is currently not supported because the pins routed to the EXP2
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+ * connector are shared with the onboard SD card.
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+ */
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+#define EXP1_03_PIN                         PB15
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+#define EXP1_04_PIN                         PB12
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+#define EXP1_05_PIN                         PB13
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+#define EXP1_06_PIN                         PC5
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+//#define EXP1_07_PIN                       -1
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+#define EXP1_08_PIN                         PC4
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+#define EXP1_09_PIN                         PB0
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+#define EXP1_10_PIN                         PA14
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+
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+#if ENABLED(CR10_STOCKDISPLAY)
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+  /**          ______
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+   *       5V | 1  2 | GND
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+   *   LCD_EN | 3  4 | LCD_RS
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+   *   LCD_D4 | 5  6   EN2
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+   *    RESET | 7  8 | EN1
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+   *      ENC | 9 10 | BEEPER
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+   *           ------
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+   */
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+  #ifdef DISABLE_JTAGSWD
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+    #define BEEPER_PIN               EXP1_10_PIN  // Not connected in dev board
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+  #endif
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+  #define LCD_PINS_RS                EXP1_04_PIN
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+  #define LCD_PINS_ENABLE            EXP1_03_PIN
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+  #define LCD_PINS_D4                EXP1_05_PIN
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+  //#define KILL_PIN                        -1
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+
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+  #undef BOARD_ST7920_DELAY_1
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+  #undef BOARD_ST7920_DELAY_2
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+  #undef BOARD_ST7920_DELAY_3
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+  #define BOARD_ST7920_DELAY_1 DELAY_NS(600)
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+  #define BOARD_ST7920_DELAY_2 DELAY_NS(750)
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+  #define BOARD_ST7920_DELAY_3 DELAY_NS(750)
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+
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+#elif ENABLED(MKS_MINI_12864)
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+  /**          ______
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+   *       5V | 1  2 | GND
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+   * SPI-MOSI | 3  4 | SPI-CS
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+   *       A0 | 5  6   EN2
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+   *       -- | 7  8 | EN1
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+   *      ENC | 9 10 | SPI-SCK
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+   *           ------
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+   */
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+  #define DOGLCD_CS                  EXP1_04_PIN
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+  #define DOGLCD_A0                  EXP1_05_PIN
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+  #define DOGLCD_SCK                 EXP1_10_PIN
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+  #define DOGLCD_MOSI                EXP1_03_PIN
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+  #define LCD_CONTRAST_INIT                  160
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+  #define LCD_CONTRAST_MIN                   120
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+  #define LCD_CONTRAST_MAX                   180
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+  #define FORCE_SOFT_SPI
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+  #define LCD_BACKLIGHT_PIN                 -1
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+
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+#elif HAS_WIRED_LCD
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+
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+  #error "Only CR10_STOCKDISPLAY or MKS_MINI_12864 are supported with TH3D EZBoard V2."
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+
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+#endif
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+
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+#if EITHER(CR10_STOCKDISPLAY, MKS_MINI_12864)
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+  #define BTN_EN1                    EXP1_08_PIN
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+  #define BTN_EN2                    EXP1_06_PIN
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+  #define BTN_ENC                    EXP1_09_PIN
264
+#endif

+ 314
- 0
buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_LITE_V2/PeripheralPins.c View File

@@ -0,0 +1,314 @@
1
+/*
2
+ *******************************************************************************
3
+ * Copyright (c) 2020, STMicroelectronics
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+ * All rights reserved.
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+ *
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+ * This software component is licensed by ST under BSD 3-Clause license,
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+ * the "License"; You may not use this file except in compliance with the
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+ * License. You may obtain a copy of the License at:
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+ *                        opensource.org/licenses/BSD-3-Clause
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+ *
11
+ *******************************************************************************
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+ * Automatically generated from STM32F405RGTx.xml
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+ */
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+#include "Arduino.h"
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+#include "PeripheralPins.h"
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+
17
+/* =====
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+ * Note: Commented lines are alternative possibilities which are not used per default.
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+ *       If you change them, you will have to know what you do
20
+ * =====
21
+ */
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+
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+//*** ADC ***
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+
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+#ifdef HAL_ADC_MODULE_ENABLED
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+WEAK const PinMap PinMap_ADC[] = {
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+  {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},    // ADC1_IN0  TEMP_BED
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+  //{PA_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC2_IN0  TEMP_BED
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+  //{PA_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC3_IN0  TEMP_BED
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+  {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)},    // ADC1_IN1  TEMP_0
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+  //{PA_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)},  // ADC2_IN1
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+  //{PA_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)},  // ADC3_IN1
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+  {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)},    // ADC1_IN2  SERVO0
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+  //{PA_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)},  // ADC2_IN2
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+  //{PA_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)},  // ADC3_IN2
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+  //{PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)},  // ADC1_IN3  Z_STEP
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+  //{PA_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)},  // ADC2_IN3
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+  //{PA_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)},  // ADC3_IN3
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+  //{PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)},  // ADC1_IN4  SPI-SEL ONBOARD SD
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+  //{PA_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)},  // ADC2_IN4
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+  //{PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)},  // ADC1_IN5  SPI-SCK
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+  //{PA_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)},  // ADC2_IN5
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+  //{PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)},  // ADC1_IN6  SPI-MISO
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+  //{PA_6,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)},  // ADC2_IN6
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+  //{PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)},  // ADC1_IN7  SPI-MOSI
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+  //{PA_7,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)},  // ADC2_IN7
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+  //{PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)},  // ADC1_IN8  BTN_ENC
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+  //{PB_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)},  // ADC2_IN8
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+  //{PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)},  // ADC1_IN9  I2C1 EEPROM
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+  //{PB_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)},  // ADC2_IN9
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+  //{PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10  FIL_RUNOUT
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+  //{PC_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
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+  //{PC_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
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+  //{PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11  X_STOP
55
+  //{PC_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
56
+  //{PC_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
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+  //{PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12  Y_STOP
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+  //{PC_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
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+  //{PC_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
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+  //{PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13  Z_STOP
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+  //{PC_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
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+  //{PC_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
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+  //{PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14  BTN_EN1
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+  //{PC_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
65
+  //{PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15  BTN_EN2
66
+  //{PC_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
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+  {NC,    NP,    0}
68
+};
69
+#endif
70
+
71
+//*** DAC ***
72
+
73
+#ifdef HAL_DAC_MODULE_ENABLED
74
+WEAK const PinMap PinMap_DAC[] = {
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+  //{PA_4,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
76
+  //{PA_5,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
77
+  {NC,    NP,    0}
78
+};
79
+#endif
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+
81
+//*** I2C ***
82
+
83
+#ifdef HAL_I2C_MODULE_ENABLED
84
+WEAK const PinMap PinMap_I2C_SDA[] = {
85
+  {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},    // I2C1 SDA (EEPROM)
86
+  //{PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},  // YDIAG
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+  //{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},  // E0_DIR
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+  //{PC_9,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},  // BED / HEATER1
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+  {NC,    NP,    0}
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+};
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+
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+WEAK const PinMap PinMap_I2C_SCL[] = {
93
+  //{PA_8,  I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},  // NEOPIXEL
94
+  {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},    // I2C1 SCL (EEPROM)
95
+  //{PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},  // Y_STEP
96
+  //{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},  // EDIAG
97
+  {NC,    NP,    0}
98
+};
99
+#endif
100
+
101
+//*** PWM ***
102
+
103
+#ifdef HAL_TIM_MODULE_ENABLED
104
+WEAK const PinMap PinMap_PWM[] = {
105
+  //{PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)},  // TIM2_CH1   TEMP_BED
106
+  //{PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)},  // TIM5_CH1
107
+
108
+  //{PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)},  // TIM2_CH2   TEMP_0
109
+  //{PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)},  // TIM5_CH2
110
+
111
+  //{PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)},  // TIM2_CH3   SERVO0
112
+  //{PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)},  // TIM5_CH3
113
+  //{PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)},  // TIM9_CH1
114
+
115
+  //{PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)},  // TIM2_CH4   Z_STEP
116
+  //{PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)},  // TIM5_CH4
117
+  //{PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)},  // TIM9_CH2
118
+
119
+  //{PA_5,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)},  // TIM2_CH1   SPI-SCK
120
+  //{PA_5,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)},  // TIM8_CH1N
121
+
122
+  //{PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)},  // TIM3_CH1   SPI-MISO
123
+  //{PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
124
+
125
+  //{PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)},  // TIM1_CH1N  SPI-MOSI
126
+  //{PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)},  // TIM3_CH2
127
+  //{PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)},  // TIM8_CH1N
128
+  //{PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
129
+
130
+  //{PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)},  // TIM1_CH1   NEOPIXEL
131
+  //{PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)},  // TIM1_CH2   SERIAL_TX (HEADER)
132
+  //{PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)},  // TIM1_CH3   SERIAL_RX (HEADER)
133
+  //{PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)},  // TIM1_CH4   USB H
134
+  //{PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)},  // TIM2_CH1   E0_STEP
135
+
136
+  //{PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)},  // TIM1_CH2N  BTN_ENC
137
+  //{PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)},  // TIM3_CH3
138
+  //{PB_0,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)},  // TIM8_CH2N
139
+
140
+  //{PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)},  // TIM1_CH3N  Z_DIR
141
+  //{PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)},  // TIM3_CH4
142
+  //{PB_1,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)},  // TIM8_CH3N
143
+
144
+  //{PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)},  // TIM2_CH2   X_STEP
145
+  //{PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)},  // TIM3_CH1   XDIAG
146
+  //{PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)},  // TIM3_CH2   X_ENABLE
147
+  //{PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)},  // TIM4_CH1   I2C1_SCL (EEPROM)
148
+  //{PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)},  // TIM4_CH2   I2C1_SDA (EEPROM)
149
+
150
+  //{PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)},  // TIM4_CH3   Y_STEP
151
+  //{PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
152
+
153
+  //{PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)},  // TIM4_CH4   YDIAG
154
+  //{PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
155
+
156
+  //{PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)},  // TIM2_CH3   EDIAG
157
+  //{PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)},  // TIM2_CH4   E0_DIR
158
+  //{PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)},  // TIM1_CH1N  LCD_PINS_D4
159
+
160
+  //{PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)},  // TIM1_CH2N  LCD-MISO
161
+  //{PB_14, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)},  // TIM8_CH2N
162
+  //{PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
163
+
164
+  //{PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)},  // TIM1_CH3N  LCD_PINS_ENABLE
165
+  //{PB_15, TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)},  // TIM8_CH3N
166
+  //{PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
167
+
168
+  {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)},    // TIM3_CH1  FAN
169
+  //{PC_6,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)},  // TIM8_CH1
170
+
171
+  {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)},    // TIM3_CH2  FAN1 / AUTO_FAN
172
+  //{PC_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)},  // TIM8_CH2
173
+
174
+  {PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)},    // TIM3_CH3  HEATER0
175
+  //{PC_8,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)},  // TIM8_CH3
176
+
177
+  {PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)},    // TIM3_CH4  BED / HEATER1
178
+  //{PC_9,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)},  // TIM8_CH4
179
+  {NC,    NP,    0}
180
+};
181
+#endif
182
+
183
+//*** SERIAL ***
184
+
185
+#ifdef HAL_UART_MODULE_ENABLED
186
+WEAK const PinMap PinMap_UART_TX[] = {
187
+  //{PA_0,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},   // TEMP_BED
188
+  //{PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},  // SERVO0
189
+  {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},    // SERIAL_TX (HEADER)
190
+  //{PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},  // I2C1_SCL (EEPROM)
191
+  //{PB_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},  // EDIAG
192
+  //{PC_6,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},  // FAN
193
+  {PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},     // SERIAL_TX (TMC)
194
+  //{PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},  // SERIAL_TX (TMC)
195
+  //{PC_12, UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},   // Y_ENABLE
196
+  {NC,    NP,    0}
197
+};
198
+
199
+WEAK const PinMap PinMap_UART_RX[] = {
200
+  //{PA_1,  UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},   // TEMP_0
201
+  //{PA_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},  // Z_STEP
202
+  {PA_10, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},    // SERIAL_RX (HEADER)
203
+  //{PB_7,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},  // I2C1 SDA (EEPROM)
204
+  //{PB_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},  // E_DIR
205
+  //{PC_7,  USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},  // FAN1 / AUTO_FAN
206
+  {PC_11, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},     // SERIAL_RX (TMC)
207
+  //{PC_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},  // SERIAL_RX (TMC)
208
+  //{PD_2,  UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},   // X_DIR
209
+  {NC,    NP,    0}
210
+};
211
+
212
+WEAK const PinMap PinMap_UART_RTS[] = {
213
+  //{PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // TEMP_0
214
+  //{PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // USB D
215
+  //{PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // LCD-MISO
216
+  {NC,    NP,    0}
217
+};
218
+
219
+WEAK const PinMap PinMap_UART_CTS[] = {
220
+  //{PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},  // TEMP_BED / WKUP
221
+  //{PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},  // USB H
222
+  //{PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},  // LCD-SCK
223
+  {NC,    NP,    0}
224
+};
225
+#endif
226
+
227
+//*** SPI ***
228
+
229
+#ifdef HAL_SPI_MODULE_ENABLED
230
+WEAK const PinMap PinMap_SPI_MOSI[] = {
231
+  {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},    // SPI1 MOSI (SD)
232
+  //{PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},  // X_ENABLE
233
+  //{PB_5,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
234
+  {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},    // SPI2 MOSI (LCD)
235
+  //{PC_3,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},  // Z_STOP
236
+  //{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},  // Y_ENABLE
237
+  {NC,    NP,    0}
238
+};
239
+
240
+WEAK const PinMap PinMap_SPI_MISO[] = {
241
+  {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},    // SPI1 MOSI (SD)
242
+  //{PB_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},  // XDIAG
243
+  //{PB_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
244
+  {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},    // SPI2 MISO (LCD)
245
+  //{PC_2,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},  // Y_STOP
246
+  //{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},  // SERIAL_RX (TMC)
247
+  {NC,    NP,    0}
248
+};
249
+
250
+WEAK const PinMap PinMap_SPI_SCLK[] = {
251
+  {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},    // SPI1 CLK (SD)
252
+  //{PB_3,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},  // X_STEP
253
+  //{PB_3,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
254
+  //{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},  // EDIAG
255
+  {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},    // SPI2 SCK (LCD)
256
+  //{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},  // SERIAL_TX (TMC)
257
+  {NC,    NP,    0}
258
+};
259
+
260
+WEAK const PinMap PinMap_SPI_SSEL[] = {
261
+  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},    // SPI1 CS (SD)
262
+  //{PA_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
263
+  //{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},  // E0_STEP
264
+  //{PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
265
+  //{PB_9,  SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},  // YDIAG
266
+  {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},    // SPI2 CS (LCD)
267
+  {NC,    NP,    0}
268
+};
269
+#endif
270
+
271
+//*** No CAN ***
272
+
273
+//*** No ETHERNET ***
274
+
275
+//*** No QUADSPI ***
276
+
277
+//*** USB ***
278
+
279
+#ifdef HAL_PCD_MODULE_ENABLED
280
+WEAK const PinMap PinMap_USB_OTG_FS[] = {
281
+  //{PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF  NEOPIXEL
282
+  //{PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS  SERIAL_TX (HEADER)
283
+  //{PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID  SERIAL_RX (HEADER)
284
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM  USB H
285
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP  USB D
286
+  {NC,    NP,    0}
287
+};
288
+
289
+WEAK const PinMap PinMap_USB_OTG_HS[] = {
290
+#ifdef USE_USB_HS_IN_FS
291
+  //{PA_4,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF  CS (SD)
292
+  //{PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID   CS (LCD)
293
+  //{PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS        LCD_PINS_D4
294
+  //{PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM   MISO (LCD)
295
+  //{PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP   LCD_PINS_ENABLE
296
+#else
297
+  //{PA_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0  Z_STEP
298
+  //{PA_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK  SPI-SCK
299
+  //{PB_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1  BTN_ENC
300
+  //{PB_1,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2  I2C1 (EEPROM)
301
+  //{PB_5,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7  X_ENABLE
302
+  //{PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3  EDIAG
303
+  //{PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4  FAN
304
+  //{PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5  CS (LCD)
305
+  //{PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6  LCD_PINS_D4
306
+  //{PC_0,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP  FIL_RUNOUT
307
+  //{PC_2,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR  Y_STOP
308
+  //{PC_3,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT  Z_STOP
309
+#endif /* USE_USB_HS_IN_FS */
310
+  {NC,    NP,    0}
311
+};
312
+#endif
313
+
314
+//*** No SDIO ***

+ 50
- 0
buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_LITE_V2/PinNamesVar.h View File

@@ -0,0 +1,50 @@
1
+/* SYS_WKUP */
2
+#ifdef PWR_WAKEUP_PIN1
3
+  SYS_WKUP1 = PA_0,
4
+#endif
5
+#ifdef PWR_WAKEUP_PIN2
6
+  SYS_WKUP2 = NC,
7
+#endif
8
+#ifdef PWR_WAKEUP_PIN3
9
+  SYS_WKUP3 = NC,
10
+#endif
11
+#ifdef PWR_WAKEUP_PIN4
12
+  SYS_WKUP4 = NC,
13
+#endif
14
+#ifdef PWR_WAKEUP_PIN5
15
+  SYS_WKUP5 = NC,
16
+#endif
17
+#ifdef PWR_WAKEUP_PIN6
18
+  SYS_WKUP6 = NC,
19
+#endif
20
+#ifdef PWR_WAKEUP_PIN7
21
+  SYS_WKUP7 = NC,
22
+#endif
23
+#ifdef PWR_WAKEUP_PIN8
24
+  SYS_WKUP8 = NC,
25
+#endif
26
+/* USB */
27
+#ifdef USBCON
28
+  USB_OTG_FS_SOF = PA_8,
29
+  USB_OTG_FS_VBUS = PA_9,
30
+  USB_OTG_FS_ID = PA_10,
31
+  USB_OTG_FS_DM = PA_11,
32
+  USB_OTG_FS_DP = PA_12,
33
+  USB_OTG_HS_ULPI_D0 = PA_3,
34
+  USB_OTG_HS_SOF = PA_4,
35
+  USB_OTG_HS_ULPI_CK = PA_5,
36
+  USB_OTG_HS_ULPI_D1 = PB_0,
37
+  USB_OTG_HS_ULPI_D2 = PB_1,
38
+  USB_OTG_HS_ULPI_D7 = PB_5,
39
+  USB_OTG_HS_ULPI_D3 = PB_10,
40
+  USB_OTG_HS_ULPI_D4 = PB_11,
41
+  USB_OTG_HS_ID = PB_12,
42
+  USB_OTG_HS_ULPI_D5 = PB_12,
43
+  USB_OTG_HS_ULPI_D6 = PB_13,
44
+  USB_OTG_HS_VBUS = PB_13,
45
+  USB_OTG_HS_DM = PB_14,
46
+  USB_OTG_HS_DP = PB_15,
47
+  USB_OTG_HS_ULPI_STP = PC_0,
48
+  USB_OTG_HS_ULPI_DIR = PC_2,
49
+  USB_OTG_HS_ULPI_NXT = PC_3,
50
+#endif

+ 495
- 0
buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_LITE_V2/hal_conf_extra.h View File

@@ -0,0 +1,495 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm32f4xx_hal_conf_template.h
4
+  * @author  MCD Application Team
5
+  * @brief   HAL configuration template file.
6
+  *          This file should be copied to the application folder and renamed
7
+  *          to stm32f4xx_hal_conf.h.
8
+  ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
12
+  * All rights reserved.</center></h2>
13
+  *
14
+  * This software component is licensed by ST under BSD 3-Clause license,
15
+  * the "License"; You may not use this file except in compliance with the
16
+  * License. You may obtain a copy of the License at:
17
+  *                        opensource.org/licenses/BSD-3-Clause
18
+  *
19
+  ******************************************************************************
20
+  */
21
+
22
+/* Define to prevent recursive inclusion -------------------------------------*/
23
+#ifndef __STM32F4xx_HAL_CONF_H
24
+#define __STM32F4xx_HAL_CONF_H
25
+
26
+#ifdef __cplusplus
27
+ extern "C" {
28
+#endif
29
+
30
+/* Exported types ------------------------------------------------------------*/
31
+/* Exported constants --------------------------------------------------------*/
32
+
33
+/* ########################## Module Selection ############################## */
34
+/**
35
+  * @brief This is the list of modules to be used in the HAL driver
36
+  */
37
+#define HAL_MODULE_ENABLED
38
+#define HAL_ADC_MODULE_ENABLED
39
+//#define HAL_CAN_MODULE_ENABLED
40
+//#define HAL_CAN_LEGACY_MODULE_ENABLED
41
+//#define HAL_CRC_MODULE_ENABLED
42
+//#define HAL_CEC_MODULE_ENABLED
43
+//#define HAL_CRYP_MODULE_ENABLED
44
+//#define HAL_DAC_MODULE_ENABLED
45
+//#define HAL_DCMI_MODULE_ENABLED
46
+#define HAL_DMA_MODULE_ENABLED
47
+//#define HAL_DMA2D_MODULE_ENABLED
48
+//#define HAL_ETH_MODULE_ENABLED
49
+#define HAL_FLASH_MODULE_ENABLED
50
+//#define HAL_NAND_MODULE_ENABLED
51
+//#define HAL_NOR_MODULE_ENABLED
52
+//#define HAL_PCCARD_MODULE_ENABLED
53
+//#define HAL_SRAM_MODULE_ENABLED
54
+//#define HAL_SDRAM_MODULE_ENABLED
55
+//#define HAL_HASH_MODULE_ENABLED
56
+#define HAL_GPIO_MODULE_ENABLED
57
+//#define HAL_EXTI_MODULE_ENABLED
58
+//#define HAL_I2C_MODULE_ENABLED
59
+//#define HAL_SMBUS_MODULE_ENABLED
60
+//#define HAL_I2S_MODULE_ENABLED
61
+//#define HAL_IWDG_MODULE_ENABLED
62
+//#define HAL_LTDC_MODULE_ENABLED
63
+//#define HAL_DSI_MODULE_ENABLED
64
+#define HAL_PWR_MODULE_ENABLED
65
+//#define HAL_QSPI_MODULE_ENABLED
66
+#define HAL_RCC_MODULE_ENABLED
67
+//#define HAL_RNG_MODULE_ENABLED
68
+//#define HAL_RTC_MODULE_ENABLED
69
+//#define HAL_SAI_MODULE_ENABLED
70
+//#define HAL_SD_MODULE_ENABLED
71
+#define HAL_SPI_MODULE_ENABLED
72
+#define HAL_TIM_MODULE_ENABLED
73
+//#define HAL_UART_MODULE_ENABLED // by default
74
+#define HAL_USART_MODULE_ENABLED
75
+//#define HAL_IRDA_MODULE_ENABLED
76
+//#define HAL_SMARTCARD_MODULE_ENABLED
77
+//#define HAL_WWDG_MODULE_ENABLED
78
+#define HAL_CORTEX_MODULE_ENABLED
79
+#define HAL_PCD_MODULE_ENABLED
80
+//#define HAL_HCD_MODULE_ENABLED
81
+//#define HAL_FMPI2C_MODULE_ENABLED
82
+//#define HAL_SPDIFRX_MODULE_ENABLED
83
+//#define HAL_DFSDM_MODULE_ENABLED
84
+//#define HAL_LPTIM_MODULE_ENABLED
85
+//#define HAL_MMC_MODULE_ENABLED
86
+
87
+/* ########################## HSE/HSI Values adaptation ##################### */
88
+/**
89
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
90
+  *        This value is used by the RCC HAL module to compute the system frequency
91
+  *        (when HSE is used as system clock source, directly or through the PLL).
92
+  */
93
+#if !defined  (HSE_VALUE)
94
+  #define HSE_VALUE              25000000U /*!< Value of the External oscillator in Hz */
95
+#endif /* HSE_VALUE */
96
+
97
+#if !defined  (HSE_STARTUP_TIMEOUT)
98
+  #define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
99
+#endif /* HSE_STARTUP_TIMEOUT */
100
+
101
+/**
102
+  * @brief Internal High Speed oscillator (HSI) value.
103
+  *        This value is used by the RCC HAL module to compute the system frequency
104
+  *        (when HSI is used as system clock source, directly or through the PLL).
105
+  */
106
+#if !defined  (HSI_VALUE)
107
+  #define HSI_VALUE              16000000U /*!< Value of the Internal oscillator in Hz */
108
+#endif /* HSI_VALUE */
109
+
110
+/**
111
+  * @brief Internal Low Speed oscillator (LSI) value.
112
+  */
113
+#if !defined  (LSI_VALUE)
114
+ #define LSI_VALUE               32000U    /*!< LSI Typical Value in Hz */
115
+#endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
116
+                                                The real value may vary depending on the variations
117
+                                                in voltage and temperature. */
118
+/**
119
+  * @brief External Low Speed oscillator (LSE) value.
120
+  */
121
+#if !defined  (LSE_VALUE)
122
+ #define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
123
+#endif /* LSE_VALUE */
124
+
125
+#if !defined  (LSE_STARTUP_TIMEOUT)
126
+  #define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
127
+#endif /* LSE_STARTUP_TIMEOUT */
128
+
129
+/**
130
+  * @brief External clock source for I2S peripheral
131
+  *        This value is used by the I2S HAL module to compute the I2S clock source
132
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
133
+  */
134
+#if !defined  (EXTERNAL_CLOCK_VALUE)
135
+  #define EXTERNAL_CLOCK_VALUE     12288000U /*!< Value of the External oscillator in Hz*/
136
+#endif /* EXTERNAL_CLOCK_VALUE */
137
+
138
+/* Tip: To avoid modifying this file each time you need to use different HSE,
139
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
140
+
141
+/* ########################### System Configuration ######################### */
142
+/**
143
+  * @brief This is the HAL system configuration section
144
+  */
145
+#define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
146
+#define  TICK_INT_PRIORITY            0x00U /*!< tick interrupt priority */
147
+#define  USE_RTOS                     0U
148
+#define  PREFETCH_ENABLE              1U
149
+#define  INSTRUCTION_CACHE_ENABLE     1U
150
+#define  DATA_CACHE_ENABLE            1U
151
+
152
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
153
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
154
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
155
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
156
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
157
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
158
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
159
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
160
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
161
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
162
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
163
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
164
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
165
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
166
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
167
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
168
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
169
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
170
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
171
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
172
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
173
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
174
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
175
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
176
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
177
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
178
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
179
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
180
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
181
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
182
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
183
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
184
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
185
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
186
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
187
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
188
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
189
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
190
+
191
+/* ########################## Assert Selection ############################## */
192
+/**
193
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
194
+  *        HAL drivers code
195
+  */
196
+//#define USE_FULL_ASSERT    1U
197
+
198
+/* ################## Ethernet peripheral configuration ##################### */
199
+
200
+/* Section 1 : Ethernet peripheral configuration */
201
+
202
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
203
+#define MAC_ADDR0   2U
204
+#define MAC_ADDR1   0U
205
+#define MAC_ADDR2   0U
206
+#define MAC_ADDR3   0U
207
+#define MAC_ADDR4   0U
208
+#define MAC_ADDR5   0U
209
+
210
+/* Definition of the Ethernet driver buffers size and count */
211
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
212
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
213
+#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
214
+#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
215
+
216
+/* Section 2: PHY configuration section */
217
+
218
+/* DP83848 PHY Address*/
219
+#define DP83848_PHY_ADDRESS             0x01U
220
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
221
+#define PHY_RESET_DELAY                 0x000000FFU
222
+/* PHY Configuration delay */
223
+#define PHY_CONFIG_DELAY                0x00000FFFU
224
+
225
+#define PHY_READ_TO                     0x0000FFFFU
226
+#define PHY_WRITE_TO                    0x0000FFFFU
227
+
228
+/* Section 3: Common PHY Registers */
229
+
230
+#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
231
+#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
232
+
233
+#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
234
+#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
235
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
236
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
237
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
238
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
239
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
240
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
241
+#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
242
+#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
243
+
244
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
245
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
246
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
247
+
248
+/* Section 4: Extended PHY Registers */
249
+
250
+#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
251
+#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
252
+#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
253
+
254
+#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
255
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
256
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
257
+
258
+#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
259
+#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
260
+
261
+#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
262
+#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
263
+
264
+/* ################## SPI peripheral configuration ########################## */
265
+
266
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
267
+* Activated: CRC code is present inside driver
268
+* Deactivated: CRC code cleaned from driver
269
+*/
270
+
271
+#define USE_SPI_CRC                     0U
272
+
273
+/* Includes ------------------------------------------------------------------*/
274
+/**
275
+  * @brief Include module's header file
276
+  */
277
+
278
+#ifdef HAL_RCC_MODULE_ENABLED
279
+  #include "stm32f4xx_hal_rcc.h"
280
+#endif /* HAL_RCC_MODULE_ENABLED */
281
+
282
+#ifdef HAL_GPIO_MODULE_ENABLED
283
+  #include "stm32f4xx_hal_gpio.h"
284
+#endif /* HAL_GPIO_MODULE_ENABLED */
285
+
286
+#ifdef HAL_EXTI_MODULE_ENABLED
287
+  #include "stm32f4xx_hal_exti.h"
288
+#endif /* HAL_EXTI_MODULE_ENABLED */
289
+
290
+#ifdef HAL_DMA_MODULE_ENABLED
291
+  #include "stm32f4xx_hal_dma.h"
292
+#endif /* HAL_DMA_MODULE_ENABLED */
293
+
294
+#ifdef HAL_CORTEX_MODULE_ENABLED
295
+  #include "stm32f4xx_hal_cortex.h"
296
+#endif /* HAL_CORTEX_MODULE_ENABLED */
297
+
298
+#ifdef HAL_ADC_MODULE_ENABLED
299
+  #include "stm32f4xx_hal_adc.h"
300
+#endif /* HAL_ADC_MODULE_ENABLED */
301
+
302
+#ifdef HAL_CAN_MODULE_ENABLED
303
+  #include "stm32f4xx_hal_can.h"
304
+#endif /* HAL_CAN_MODULE_ENABLED */
305
+
306
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
307
+  #include "stm32f4xx_hal_can_legacy.h"
308
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
309
+
310
+#ifdef HAL_CRC_MODULE_ENABLED
311
+  #include "stm32f4xx_hal_crc.h"
312
+#endif /* HAL_CRC_MODULE_ENABLED */
313
+
314
+#ifdef HAL_CRYP_MODULE_ENABLED
315
+  #include "stm32f4xx_hal_cryp.h"
316
+#endif /* HAL_CRYP_MODULE_ENABLED */
317
+
318
+#ifdef HAL_DMA2D_MODULE_ENABLED
319
+  #include "stm32f4xx_hal_dma2d.h"
320
+#endif /* HAL_DMA2D_MODULE_ENABLED */
321
+
322
+#ifdef HAL_DAC_MODULE_ENABLED
323
+  #include "stm32f4xx_hal_dac.h"
324
+#endif /* HAL_DAC_MODULE_ENABLED */
325
+
326
+#ifdef HAL_DCMI_MODULE_ENABLED
327
+  #include "stm32f4xx_hal_dcmi.h"
328
+#endif /* HAL_DCMI_MODULE_ENABLED */
329
+
330
+#ifdef HAL_ETH_MODULE_ENABLED
331
+  #include "stm32f4xx_hal_eth.h"
332
+#endif /* HAL_ETH_MODULE_ENABLED */
333
+
334
+#ifdef HAL_FLASH_MODULE_ENABLED
335
+  #include "stm32f4xx_hal_flash.h"
336
+#endif /* HAL_FLASH_MODULE_ENABLED */
337
+
338
+#ifdef HAL_SRAM_MODULE_ENABLED
339
+  #include "stm32f4xx_hal_sram.h"
340
+#endif /* HAL_SRAM_MODULE_ENABLED */
341
+
342
+#ifdef HAL_NOR_MODULE_ENABLED
343
+  #include "stm32f4xx_hal_nor.h"
344
+#endif /* HAL_NOR_MODULE_ENABLED */
345
+
346
+#ifdef HAL_NAND_MODULE_ENABLED
347
+  #include "stm32f4xx_hal_nand.h"
348
+#endif /* HAL_NAND_MODULE_ENABLED */
349
+
350
+#ifdef HAL_PCCARD_MODULE_ENABLED
351
+  #include "stm32f4xx_hal_pccard.h"
352
+#endif /* HAL_PCCARD_MODULE_ENABLED */
353
+
354
+#ifdef HAL_SDRAM_MODULE_ENABLED
355
+  #include "stm32f4xx_hal_sdram.h"
356
+#endif /* HAL_SDRAM_MODULE_ENABLED */
357
+
358
+#ifdef HAL_HASH_MODULE_ENABLED
359
+ #include "stm32f4xx_hal_hash.h"
360
+#endif /* HAL_HASH_MODULE_ENABLED */
361
+
362
+#ifdef HAL_I2C_MODULE_ENABLED
363
+ #include "stm32f4xx_hal_i2c.h"
364
+#endif /* HAL_I2C_MODULE_ENABLED */
365
+
366
+#ifdef HAL_SMBUS_MODULE_ENABLED
367
+ #include "stm32f4xx_hal_smbus.h"
368
+#endif /* HAL_SMBUS_MODULE_ENABLED */
369
+
370
+#ifdef HAL_I2S_MODULE_ENABLED
371
+ #include "stm32f4xx_hal_i2s.h"
372
+#endif /* HAL_I2S_MODULE_ENABLED */
373
+
374
+#ifdef HAL_IWDG_MODULE_ENABLED
375
+ #include "stm32f4xx_hal_iwdg.h"
376
+#endif /* HAL_IWDG_MODULE_ENABLED */
377
+
378
+#ifdef HAL_LTDC_MODULE_ENABLED
379
+ #include "stm32f4xx_hal_ltdc.h"
380
+#endif /* HAL_LTDC_MODULE_ENABLED */
381
+
382
+#ifdef HAL_PWR_MODULE_ENABLED
383
+ #include "stm32f4xx_hal_pwr.h"
384
+#endif /* HAL_PWR_MODULE_ENABLED */
385
+
386
+#ifdef HAL_RNG_MODULE_ENABLED
387
+ #include "stm32f4xx_hal_rng.h"
388
+#endif /* HAL_RNG_MODULE_ENABLED */
389
+
390
+#ifdef HAL_RTC_MODULE_ENABLED
391
+ #include "stm32f4xx_hal_rtc.h"
392
+#endif /* HAL_RTC_MODULE_ENABLED */
393
+
394
+#ifdef HAL_SAI_MODULE_ENABLED
395
+ #include "stm32f4xx_hal_sai.h"
396
+#endif /* HAL_SAI_MODULE_ENABLED */
397
+
398
+#ifdef HAL_SD_MODULE_ENABLED
399
+ #include "stm32f4xx_hal_sd.h"
400
+#endif /* HAL_SD_MODULE_ENABLED */
401
+
402
+#ifdef HAL_SPI_MODULE_ENABLED
403
+ #include "stm32f4xx_hal_spi.h"
404
+#endif /* HAL_SPI_MODULE_ENABLED */
405
+
406
+#ifdef HAL_TIM_MODULE_ENABLED
407
+ #include "stm32f4xx_hal_tim.h"
408
+#endif /* HAL_TIM_MODULE_ENABLED */
409
+
410
+#ifdef HAL_UART_MODULE_ENABLED
411
+ #include "stm32f4xx_hal_uart.h"
412
+#endif /* HAL_UART_MODULE_ENABLED */
413
+
414
+#ifdef HAL_USART_MODULE_ENABLED
415
+ #include "stm32f4xx_hal_usart.h"
416
+#endif /* HAL_USART_MODULE_ENABLED */
417
+
418
+#ifdef HAL_IRDA_MODULE_ENABLED
419
+ #include "stm32f4xx_hal_irda.h"
420
+#endif /* HAL_IRDA_MODULE_ENABLED */
421
+
422
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
423
+ #include "stm32f4xx_hal_smartcard.h"
424
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
425
+
426
+#ifdef HAL_WWDG_MODULE_ENABLED
427
+ #include "stm32f4xx_hal_wwdg.h"
428
+#endif /* HAL_WWDG_MODULE_ENABLED */
429
+
430
+#ifdef HAL_PCD_MODULE_ENABLED
431
+ #include "stm32f4xx_hal_pcd.h"
432
+#endif /* HAL_PCD_MODULE_ENABLED */
433
+
434
+#ifdef HAL_HCD_MODULE_ENABLED
435
+ #include "stm32f4xx_hal_hcd.h"
436
+#endif /* HAL_HCD_MODULE_ENABLED */
437
+
438
+#ifdef HAL_DSI_MODULE_ENABLED
439
+ #include "stm32f4xx_hal_dsi.h"
440
+#endif /* HAL_DSI_MODULE_ENABLED */
441
+
442
+#ifdef HAL_QSPI_MODULE_ENABLED
443
+ #include "stm32f4xx_hal_qspi.h"
444
+#endif /* HAL_QSPI_MODULE_ENABLED */
445
+
446
+#ifdef HAL_CEC_MODULE_ENABLED
447
+ #include "stm32f4xx_hal_cec.h"
448
+#endif /* HAL_CEC_MODULE_ENABLED */
449
+
450
+#ifdef HAL_FMPI2C_MODULE_ENABLED
451
+ #include "stm32f4xx_hal_fmpi2c.h"
452
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
453
+
454
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
455
+ #include "stm32f4xx_hal_spdifrx.h"
456
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
457
+
458
+#ifdef HAL_DFSDM_MODULE_ENABLED
459
+ #include "stm32f4xx_hal_dfsdm.h"
460
+#endif /* HAL_DFSDM_MODULE_ENABLED */
461
+
462
+#ifdef HAL_LPTIM_MODULE_ENABLED
463
+ #include "stm32f4xx_hal_lptim.h"
464
+#endif /* HAL_LPTIM_MODULE_ENABLED */
465
+
466
+#ifdef HAL_MMC_MODULE_ENABLED
467
+ #include "stm32f4xx_hal_mmc.h"
468
+#endif /* HAL_MMC_MODULE_ENABLED */
469
+
470
+/* Exported macro ------------------------------------------------------------*/
471
+#ifdef  USE_FULL_ASSERT
472
+/**
473
+  * @brief  The assert_param macro is used for function's parameters check.
474
+  * @param  expr If expr is false, it calls assert_failed function
475
+  *         which reports the name of the source file and the source
476
+  *         line number of the call that failed.
477
+  *         If expr is true, it returns no value.
478
+  * @retval None
479
+  */
480
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
481
+/* Exported functions ------------------------------------------------------- */
482
+  void assert_failed(uint8_t* file, uint32_t line);
483
+#else
484
+  #define assert_param(expr) ((void)0U)
485
+#endif /* USE_FULL_ASSERT */
486
+
487
+
488
+#ifdef __cplusplus
489
+}
490
+#endif
491
+
492
+#endif /* __STM32F4xx_HAL_CONF_H */
493
+
494
+
495
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 203
- 0
buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_LITE_V2/ldscript.ld View File

@@ -0,0 +1,203 @@
1
+/*
2
+*****************************************************************************
3
+**
4
+**  File        : LinkerScript.ld
5
+**
6
+**
7
+**  Abstract    : Linker script for STM32F4x5RGTx series
8
+**                1024Kbytes FLASH and 192Kbytes RAM
9
+**
10
+**                Set heap size, stack size and stack location according
11
+**                to application requirements.
12
+**
13
+**                Set memory bank area and size if external memory is used.
14
+**
15
+**  Target      : STMicroelectronics STM32
16
+**
17
+**  Distribution: The file is distributed “as is,” without any warranty
18
+**                of any kind.
19
+**
20
+*****************************************************************************
21
+** @attention
22
+**
23
+** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
24
+**
25
+** Redistribution and use in source and binary forms, with or without modification,
26
+** are permitted provided that the following conditions are met:
27
+**   1. Redistributions of source code must retain the above copyright notice,
28
+**      this list of conditions and the following disclaimer.
29
+**   2. Redistributions in binary form must reproduce the above copyright notice,
30
+**      this list of conditions and the following disclaimer in the documentation
31
+**      and/or other materials provided with the distribution.
32
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
33
+**      may be used to endorse or promote products derived from this software
34
+**      without specific prior written permission.
35
+**
36
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
37
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
38
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
39
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
40
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
41
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
42
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
43
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
44
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46
+**
47
+*****************************************************************************
48
+*/
49
+
50
+/* Entry Point */
51
+ENTRY(Reset_Handler)
52
+
53
+/* Highest address of the user mode stack */
54
+_estack = 0x20000000 + LD_MAX_DATA_SIZE;    /* end of RAM */
55
+/* Generate a link error if heap and stack don't fit into RAM */
56
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
57
+_Min_Stack_Size = 0x400; /* required amount of stack */
58
+
59
+/* Specify the memory areas */
60
+MEMORY
61
+{
62
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
63
+CCMRAM (rw)    : ORIGIN = 0x10000000, LENGTH = 64K
64
+FLASH (rx)     : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
65
+}
66
+
67
+/* Define output sections */
68
+SECTIONS
69
+{
70
+  /* The startup code goes first into FLASH */
71
+  .isr_vector :
72
+  {
73
+    . = ALIGN(4);
74
+    KEEP(*(.isr_vector)) /* Startup code */
75
+    . = ALIGN(4);
76
+  } >FLASH
77
+
78
+  /* The program code and other data goes into FLASH */
79
+  .text ALIGN(8):
80
+  {
81
+    . = ALIGN(4);
82
+    *(.text)           /* .text sections (code) */
83
+    *(.text*)          /* .text* sections (code) */
84
+    *(.glue_7)         /* glue arm to thumb code */
85
+    *(.glue_7t)        /* glue thumb to arm code */
86
+    *(.eh_frame)
87
+
88
+    KEEP (*(.init))
89
+    KEEP (*(.fini))
90
+
91
+    . = ALIGN(4);
92
+    _etext = .;        /* define a global symbols at end of code */
93
+  } >FLASH
94
+
95
+  /* Constant data goes into FLASH */
96
+  .rodata ALIGN(4):
97
+  {
98
+    . = ALIGN(4);
99
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
100
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
101
+    . = ALIGN(4);
102
+  } >FLASH
103
+
104
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
105
+  .ARM : {
106
+    __exidx_start = .;
107
+    *(.ARM.exidx*)
108
+    __exidx_end = .;
109
+  } >FLASH
110
+
111
+  .preinit_array     :
112
+  {
113
+    PROVIDE_HIDDEN (__preinit_array_start = .);
114
+    KEEP (*(.preinit_array*))
115
+    PROVIDE_HIDDEN (__preinit_array_end = .);
116
+  } >FLASH
117
+  .init_array :
118
+  {
119
+    PROVIDE_HIDDEN (__init_array_start = .);
120
+    KEEP (*(SORT(.init_array.*)))
121
+    KEEP (*(.init_array*))
122
+    PROVIDE_HIDDEN (__init_array_end = .);
123
+  } >FLASH
124
+  .fini_array :
125
+  {
126
+    PROVIDE_HIDDEN (__fini_array_start = .);
127
+    KEEP (*(SORT(.fini_array.*)))
128
+    KEEP (*(.fini_array*))
129
+    PROVIDE_HIDDEN (__fini_array_end = .);
130
+  } >FLASH
131
+
132
+  /* used by the startup to initialize data */
133
+  _sidata = LOADADDR(.data);
134
+
135
+  /* Initialized data sections goes into RAM, load LMA copy after code */
136
+  .data :
137
+  {
138
+    . = ALIGN(4);
139
+    _sdata = .;        /* create a global symbol at data start */
140
+    *(.data)           /* .data sections */
141
+    *(.data*)          /* .data* sections */
142
+
143
+    . = ALIGN(4);
144
+    _edata = .;        /* define a global symbol at data end */
145
+  } >RAM AT> FLASH
146
+
147
+  _siccmram = LOADADDR(.ccmram);
148
+
149
+  /* CCM-RAM section
150
+  *
151
+  * IMPORTANT NOTE!
152
+  * If initialized variables will be placed in this section,
153
+  * the startup code needs to be modified to copy the init-values.
154
+  */
155
+  .ccmram :
156
+  {
157
+    . = ALIGN(4);
158
+    _sccmram = .;       /* create a global symbol at ccmram start */
159
+    *(.ccmram)
160
+    *(.ccmram*)
161
+
162
+    . = ALIGN(4);
163
+    _eccmram = .;       /* create a global symbol at ccmram end */
164
+  } >CCMRAM AT> FLASH
165
+
166
+
167
+  /* Uninitialized data section */
168
+  . = ALIGN(4);
169
+  .bss :
170
+  {
171
+    /* This is used by the startup in order to initialize the .bss secion */
172
+    _sbss = .;         /* define a global symbol at bss start */
173
+    __bss_start__ = _sbss;
174
+    *(.bss)
175
+    *(.bss*)
176
+    *(COMMON)
177
+
178
+    . = ALIGN(4);
179
+    _ebss = .;         /* define a global symbol at bss end */
180
+    __bss_end__ = _ebss;
181
+  } >RAM
182
+
183
+  /* User_heap_stack section, used to check that there is enough RAM left */
184
+  ._user_heap_stack :
185
+  {
186
+    . = ALIGN(8);
187
+    PROVIDE ( end = . );
188
+    PROVIDE ( _end = . );
189
+    . = . + _Min_Heap_Size;
190
+    . = . + _Min_Stack_Size;
191
+    . = ALIGN(8);
192
+  } >RAM
193
+
194
+  /* Remove information from the standard libraries */
195
+  /DISCARD/ :
196
+  {
197
+    libc.a ( * )
198
+    libm.a ( * )
199
+    libgcc.a ( * )
200
+  }
201
+
202
+  .ARM.attributes 0 : { *(.ARM.attributes) }
203
+}

+ 177
- 0
buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_LITE_V2/variant.cpp View File

@@ -0,0 +1,177 @@
1
+/*
2
+  Copyright (c) 2011 Arduino.  All right reserved.
3
+
4
+  This library is free software; you can redistribute it and/or
5
+  modify it under the terms of the GNU Lesser General Public
6
+  License as published by the Free Software Foundation; either
7
+  version 2.1 of the License, or (at your option) any later version.
8
+
9
+  This library is distributed in the hope that it will be useful,
10
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+  See the GNU Lesser General Public License for more details.
13
+
14
+  You should have received a copy of the GNU Lesser General Public
15
+  License along with this library; if not, write to the Free Software
16
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+*/
18
+
19
+#include "pins_arduino.h"
20
+
21
+#ifdef __cplusplus
22
+extern "C" {
23
+#endif
24
+
25
+// Digital PinName array
26
+const PinName digitalPin[] = {
27
+  PA_0,  // Digital pin 0
28
+  PA_1,  // Digital pin 1
29
+  PA_2,  // Digital pin 2
30
+  PA_3,  // Digital pin 3
31
+  PA_4,  // Digital pin 4
32
+  PA_5,  // Digital pin 5
33
+  PA_6,  // Digital pin 6
34
+  PA_7,  // Digital pin 7
35
+  PA_8,  // Digital pin 8
36
+  PA_9,  // Digital pin 9
37
+  PA_10, // Digital pin 10
38
+  PA_11, // Digital pin 11
39
+  PA_12, // Digital pin 12
40
+  PA_13, // Digital pin 13
41
+  PA_14, // Digital pin 14
42
+  PA_15, // Digital pin 15
43
+
44
+  PB_0,  // Digital pin 16
45
+  PB_1,  // Digital pin 17
46
+  PB_2,  // Digital pin 18
47
+  PB_3,  // Digital pin 19
48
+  PB_4,  // Digital pin 20
49
+  PB_5,  // Digital pin 21
50
+  PB_6,  // Digital pin 22
51
+  PB_7,  // Digital pin 23
52
+  PB_8,  // Digital pin 24
53
+  PB_9,  // Digital pin 25
54
+  PB_10, // Digital pin 26
55
+  PB_11, // Digital pin 27
56
+  PB_12, // Digital pin 28
57
+  PB_13, // Digital pin 29
58
+  PB_14, // Digital pin 30
59
+  PB_15, // Digital pin 31
60
+
61
+  PC_0,  // Digital pin 32
62
+  PC_1,  // Digital pin 33
63
+  PC_2,  // Digital pin 34
64
+  PC_3,  // Digital pin 35
65
+  PC_4,  // Digital pin 36
66
+  PC_5,  // Digital pin 37
67
+  PC_6,  // Digital pin 38
68
+  PC_7,  // Digital pin 39
69
+  PC_8,  // Digital pin 40
70
+  PC_9,  // Digital pin 41
71
+  PC_10, // Digital pin 42
72
+  PC_11, // Digital pin 43
73
+  PC_12, // Digital pin 44
74
+  PC_13, // Digital pin 45
75
+  PC_14, // Digital pin 46
76
+  PC_15, // Digital pin 47
77
+
78
+  PD_2,  // Digital pin 48
79
+
80
+  PH_0,  // Digital pin 49, used by the external oscillator
81
+  PH_1   // Digital pin 40, used by the external oscillator
82
+};
83
+
84
+// Analog (Ax) pin number array
85
+const uint32_t analogInputPin[] = {
86
+  0,  // A0,  PA0
87
+  1,  // A1,  PA1
88
+  2,  // A2,  PA2
89
+  3,  // A3,  PA3
90
+  4,  // A4,  PA4
91
+  5,  // A5,  PA5
92
+  6,  // A6,  PA6
93
+  7,  // A7,  PA7
94
+  16, // A8,  PB0
95
+  17, // A9,  PB1
96
+  32, // A10, PC0
97
+  33, // A11, PC1
98
+  34, // A12, PC2
99
+  35, // A13, PC3
100
+  36, // A14, PC4
101
+  37  // A15, PC5
102
+};
103
+
104
+#ifdef __cplusplus
105
+}
106
+#endif
107
+
108
+// ----------------------------------------------------------------------------
109
+
110
+#ifdef __cplusplus
111
+extern "C" {
112
+#endif
113
+
114
+/*
115
+ * @brief  Configures the System clock source, PLL Multiplier and Divider factors,
116
+ *               AHB/APBx prescalers and Flash settings
117
+ * @note   This function should be called only once the RCC clock configuration
118
+ *         is reset to the default reset state (done in SystemInit() function).
119
+ * @param  None
120
+ * @retval None
121
+ */
122
+
123
+/******************************************************************************/
124
+/*            PLL (clocked by HSE) used as System clock source                */
125
+/******************************************************************************/
126
+
127
+WEAK void SetSysClock_PLL_HSE(void) {
128
+
129
+  RCC_OscInitTypeDef RCC_OscInitStruct;
130
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
131
+
132
+  /**Configure the main internal regulator output voltage
133
+  */
134
+  __HAL_RCC_PWR_CLK_ENABLE();
135
+
136
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
137
+
138
+  /**Initializes the CPU, AHB and APB busses clocks
139
+  */
140
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
141
+  RCC_OscInitStruct.HSEState       = RCC_HSE_ON;
142
+  RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_ON;
143
+  RCC_OscInitStruct.PLL.PLLSource  = RCC_PLLSOURCE_HSE;
144
+  RCC_OscInitStruct.PLL.PLLM       = (HSE_VALUE / 1000000);
145
+  RCC_OscInitStruct.PLL.PLLN       = 336;
146
+  RCC_OscInitStruct.PLL.PLLP       = RCC_PLLP_DIV2;
147
+  RCC_OscInitStruct.PLL.PLLQ       = 7;
148
+
149
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
150
+    _Error_Handler(__FILE__, __LINE__);
151
+
152
+  /**Initializes the CPU, AHB and APB busses clocks
153
+  */
154
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
155
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
156
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
157
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
158
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
159
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
160
+
161
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
162
+    _Error_Handler(__FILE__, __LINE__);
163
+}
164
+
165
+WEAK void SystemClock_Config(void) {
166
+  SetSysClock_PLL_HSE();
167
+
168
+  /* Ensure CCM RAM clock is enabled */
169
+  __HAL_RCC_CCMDATARAMEN_CLK_ENABLE();
170
+
171
+  /* Output clock on MCO2 pin(PC9) for debugging purpose */
172
+  //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4);
173
+}
174
+
175
+#ifdef __cplusplus
176
+}
177
+#endif

+ 148
- 0
buildroot/share/PlatformIO/variants/MARLIN_TH3D_EZBOARD_LITE_V2/variant.h View File

@@ -0,0 +1,148 @@
1
+/*
2
+  Copyright (c) 2011 Arduino.  All right reserved.
3
+
4
+  This library is free software; you can redistribute it and/or
5
+  modify it under the terms of the GNU Lesser General Public
6
+  License as published by the Free Software Foundation; either
7
+  version 2.1 of the License, or (at your option) any later version.
8
+
9
+  This library is distributed in the hope that it will be useful,
10
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
12
+  See the GNU Lesser General Public License for more details.
13
+
14
+  You should have received a copy of the GNU Lesser General Public
15
+  License along with this library; if not, write to the Free Software
16
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
17
+*/
18
+
19
+#ifndef _VARIANT_ARDUINO_STM32_
20
+#define _VARIANT_ARDUINO_STM32_
21
+
22
+#ifdef __cplusplus
23
+extern "C" {
24
+#endif // __cplusplus
25
+
26
+/*----------------------------------------------------------------------------
27
+ *        Pins (STM32F405RG and STM32F415RG)
28
+ *----------------------------------------------------------------------------*/
29
+
30
+//                  | DIGITAL | ANALOG IN  | ANALOG OUT | UART/USART            | TWI                  | SPI                               | SPECIAL   |
31
+//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
32
+#define PA0  PIN_A0  // | 0       | A0 (ADC1)  |            | UART4_TX              |                      |                                   |           |
33
+#define PA1  PIN_A1  // | 1       | A1 (ADC1)  |            | UART4_RX              |                      |                                   |           |
34
+#define PA2  PIN_A2  // | 2       | A2 (ADC1)  |            | USART2_TX             |                      |                                   |           |
35
+#define PA3  PIN_A3  // | 3       | A3 (ADC1)  |            | USART2_RX             |                      |                                   |           |
36
+#define PA4  PIN_A4  // | 4       | A4 (ADC1)  | DAC_OUT1   |                       |                      | SPI1_SS, (SPI3_SS)                |           |
37
+#define PA5  PIN_A5  // | 5       | A5 (ADC1)  | DAC_OUT2   |                       |                      | SPI1_SCK                          |           |
38
+#define PA6  PIN_A6  // | 6       | A6 (ADC1)  |            |                       |                      | SPI1_MISO                         |           |
39
+#define PA7  PIN_A7  // | 7       | A7 (ADC1)  |            |                       |                      | SPI1_MOSI                         |           |
40
+#define PA8  8   // | 8       |            |            |                       | TWI3_SCL             |                                   |           |
41
+#define PA9  9   // | 9       |            |            | USART1_TX             |                      | SPI2_SCK                          |           |
42
+#define PA10 10  // | 10      |            |            | USART1_RX             |                      |                                   |           |
43
+#define PA11 11  // | 11      |            |            |                       |                      |                                   |           |
44
+#define PA12 12  // | 12      |            |            |                       |                      |                                   |           |
45
+#define PA13 13  // | 13      |            |            |                       |                      |                                   | SWD_SWDIO |
46
+#define PA14 14  // | 14      |            |            |                       |                      |                                   | SWD_SWCLK |
47
+#define PA15 15  // | 15      |            |            |                       |                      | SPI3_SS, (SPI1_SS)                |           |
48
+//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
49
+#define PB0  PIN_A8  // | 16      | A8 (ADC1)  |            |                       |                      |                                   |           |
50
+#define PB1  PIN_A9  // | 17      | A9 (ADC1)  |            |                       |                      |                                   |           |
51
+#define PB2  18  // | 18      |            |            |                       |                      |                                   | BOOT1     |
52
+#define PB3  19  // | 19      |            |            |                       |                      | SPI3_SCK,  (SPI1_SCK)             |           |
53
+#define PB4  20  // | 20      |            |            |                       |                      | SPI3_MISO, (SPI1_MISO)            |           |
54
+#define PB5  21  // | 21      |            |            |                       |                      | SPI3_MOSI, (SPI1_MOSI)            |           |
55
+#define PB6  22  // | 22      |            |            | USART1_TX             | TWI1_SCL             |                                   |           |
56
+#define PB7  23  // | 23      |            |            | USART1_RX             | TWI1_SDA             |                                   |           |
57
+#define PB8  24  // | 24      |            |            |                       | TWI1_SCL             |                                   |           |
58
+#define PB9  25  // | 25      |            |            |                       | TWI1_SDA             | SPI2_SS                           |           |
59
+#define PB10 26  // | 26      |            |            | USART3_TX             | TWI2_SCL             | SPI2_SCK                          |           |
60
+#define PB11 27  // | 27      |            |            | USART3_RX             | TWI2_SDA             |                                   |           |
61
+#define PB12 28  // | 28      |            |            |                       |                      | SPI2_SS                           |           |
62
+#define PB13 29  // | 29      |            |            |                       |                      | SPI2_SCK                          |           |
63
+#define PB14 30  // | 30      |            |            |                       |                      | SPI2_MISO                         |           |
64
+#define PB15 31  // | 31      |            |            |                       |                      | SPI2_MOSI                         |           |
65
+//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
66
+#define PC0  PIN_A10 // | 32      | A10 (ADC1) |            |                       |                      |                                   |           |
67
+#define PC1  PIN_A11 // | 33      | A11 (ADC1) |            |                       |                      |                                   |           |
68
+#define PC2  PIN_A12 // | 34      | A12 (ADC1) |            |                       |                      | SPI2_MISO                         |           |
69
+#define PC3  PIN_A13 // | 35      | A13 (ADC1) |            |                       |                      | SPI2_MOSI                         |           |
70
+#define PC4  PIN_A14 // | 36      | A14 (ADC1) |            |                       |                      |                                   |           |
71
+#define PC5  PIN_A15 // | 37      | A15 (ADC1) |            |                       |                      |                                   |           |
72
+#define PC6  38  // | 38      |            |            | USART6_TX             |                      |                                   |           |
73
+#define PC7  39  // | 39      |            |            | USART3_RX             |                      | SPI2_SCK                          |           |
74
+#define PC8  40  // | 40      |            |            |                       |                      |                                   |           |
75
+#define PC9  41  // | 41      |            |            |                       | TWI3_SDA             |                                   |           |
76
+#define PC10 42  // | 42      |            |            | USART3_TX, (UART4_TX) |                      | SPI3_SCK                          |           |
77
+#define PC11 43  // | 43      |            |            | USART3_RX, (UART4_RX) |                      | SPI3_MISO                         |           |
78
+#define PC12 44  // | 44      |            |            | UART5_TX              |                      | SPI3_MOSI                         |           |
79
+#define PC13 45  // | 45      |            |            |                       |                      |                                   |           |
80
+#define PC14 46  // | 46      |            |            |                       |                      |                                   | OSC32_IN  |
81
+#define PC15 47  // | 47      |            |            |                       |                      |                                   | OSC32_OUT |
82
+//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
83
+#define PD2  48  // | 48      |            |            | UART5_RX              |                      |                                   |           |
84
+//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
85
+#define PH0  49  // | 49      |            |            |                       |                      |                                   | OSC_IN    |
86
+#define PH1  50  // | 50      |            |            |                       |                      |                                   | OSC_OUT   |
87
+//                  |---------|------------|------------|-----------------------|----------------------|-----------------------------------|-----------|
88
+
89
+/// This must be a literal
90
+#define NUM_DIGITAL_PINS        51
91
+#define NUM_ANALOG_INPUTS       16
92
+
93
+// On-board LED pin number
94
+#ifndef LED_BUILTIN
95
+#define LED_BUILTIN             PA5
96
+#endif
97
+#define LED_GREEN               LED_BUILTIN
98
+
99
+// On-board user button
100
+#ifndef USER_BTN
101
+#define USER_BTN                PC13
102
+#endif
103
+
104
+// Timer Definitions
105
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
106
+#define TIMER_TONE              TIM5
107
+#define TIMER_SERVO             TIM7
108
+
109
+// UART Definitions
110
+// Define here Serial instance number to map on Serial generic name
111
+#define SERIAL_UART_INSTANCE    1
112
+
113
+// Default pin used for 'Serial' instance
114
+// Mandatory for Firmata
115
+#define PIN_SERIAL_RX           PA10
116
+#define PIN_SERIAL_TX           PA9
117
+
118
+/* Extra HAL modules */
119
+#define HAL_DAC_MODULE_ENABLED
120
+
121
+#ifdef __cplusplus
122
+} // extern "C"
123
+#endif
124
+/*----------------------------------------------------------------------------
125
+ *        Arduino objects - C++ only
126
+ *----------------------------------------------------------------------------*/
127
+
128
+#ifdef __cplusplus
129
+  // These serial port names are intended to allow libraries and architecture-neutral
130
+  // sketches to automatically default to the correct port name for a particular type
131
+  // of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
132
+  // the first hardware serial port whose RX/TX pins are not dedicated to another use.
133
+  //
134
+  // SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
135
+  //
136
+  // SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
137
+  //
138
+  // SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
139
+  //
140
+  // SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
141
+  //
142
+  // SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
143
+  //                            pins are NOT connected to anything by default.
144
+  #define SERIAL_PORT_MONITOR     Serial
145
+  #define SERIAL_PORT_HARDWARE    Serial
146
+#endif
147
+
148
+#endif /* _VARIANT_ARDUINO_STM32_ */

+ 14
- 0
ini/stm32f4.ini View File

@@ -439,3 +439,17 @@ extends           = env:mks_monster8_usb_flash_drive
439 439
 build_flags       = ${env:mks_monster8_usb_flash_drive.build_flags}
440 440
                     -DUSBD_USE_CDC_MSC
441 441
 build_unflags     = -DUSBD_USE_CDC
442
+
443
+#
444
+# TH3D EZBoard Lite v2.0 (STM32F405RGT6 ARM Cortex-M4)
445
+#
446
+[env:TH3D_EZBoard_Lite_V2]
447
+platform            = ${common_stm32.platform}
448
+extends             = stm32_variant
449
+board               = genericSTM32F405RG
450
+board_build.variant = MARLIN_TH3D_EZBOARD_LITE_V2
451
+board_build.offset  = 0xC000
452
+board_upload.offset_address = 0x0800C000
453
+build_flags         = ${stm32_variant.build_flags} -DHSE_VALUE=12000000U -O0
454
+debug_tool          = stlink
455
+upload_protocol     = stlink

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