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@@ -250,7 +250,7 @@
|
250
|
250
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}
|
251
|
251
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|
252
|
252
|
// all the others
|
253
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|
- static uint32_t spiDelayCyclesX4 = (F_CPU/1000000); // 4uS => 125khz
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|
253
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+ static uint32_t spiDelayCyclesX4 = (F_CPU) / 1000000; // 4uS => 125khz
|
254
|
254
|
|
255
|
255
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static uint8_t spiTransferX(uint8_t b) { // using Mode 0
|
256
|
256
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int bits = 8;
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|
@@ -451,77 +451,48 @@
|
451
|
451
|
static pfnSpiTxBlock spiTxBlock = (pfnSpiTxBlock)spiTxBlockX;
|
452
|
452
|
static pfnSpiRxBlock spiRxBlock = (pfnSpiRxBlock)spiRxBlockX;
|
453
|
453
|
|
454
|
|
- #if MB(ALLIGATOR) // control SDSS pin
|
455
|
|
- void spiBegin() {
|
456
|
|
- SET_OUTPUT(SS_PIN);
|
457
|
|
- WRITE(SS_PIN, HIGH);
|
458
|
|
- SET_OUTPUT(SCK_PIN);
|
459
|
|
- SET_INPUT(MISO_PIN);
|
460
|
|
- SET_OUTPUT(MOSI_PIN);
|
461
|
|
- }
|
462
|
|
-
|
463
|
|
- uint8_t spiRec() {
|
464
|
|
- WRITE(SS_PIN, LOW);
|
465
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|
- WRITE(MOSI_PIN, 1); /* Output 1s 1*/
|
466
|
|
- uint8_t b = spiTransferRx(0xFF);
|
467
|
|
- WRITE(SS_PIN, HIGH);
|
468
|
|
- return b;
|
469
|
|
- }
|
470
|
|
-
|
471
|
|
- void spiRead(uint8_t* buf, uint16_t nbyte) {
|
472
|
|
- uint32_t todo = nbyte;
|
473
|
|
- if (todo == 0) return;
|
474
|
|
-
|
475
|
|
- WRITE(SS_PIN, LOW);
|
476
|
|
- WRITE(MOSI_PIN, 1); /* Output 1s 1*/
|
477
|
|
- spiRxBlock(buf,nbyte);
|
478
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|
- WRITE(SS_PIN, HIGH);
|
479
|
|
- }
|
480
|
|
-
|
481
|
|
- void spiSend(uint8_t b) {
|
482
|
|
- WRITE(SS_PIN, LOW);
|
483
|
|
- (void) spiTransferTx(b);
|
484
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|
- WRITE(SS_PIN, HIGH);
|
485
|
|
- }
|
486
|
|
-
|
487
|
|
- void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
488
|
|
- WRITE(SS_PIN, LOW);
|
489
|
|
- (void) spiTransferTx(token);
|
490
|
|
- spiTxBlock(buf,512);
|
491
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- WRITE(SS_PIN, HIGH);
|
492
|
|
-
|
493
|
|
- #else // let calling routine control SDSS
|
494
|
|
- void spiBegin() {
|
495
|
|
- SET_OUTPUT(SS_PIN);
|
496
|
|
- SET_OUTPUT(SCK_PIN);
|
497
|
|
- SET_INPUT(MISO_PIN);
|
498
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- SET_OUTPUT(MOSI_PIN);
|
499
|
|
- }
|
500
|
|
-
|
501
|
|
- uint8_t spiRec() {
|
502
|
|
- WRITE(MOSI_PIN, 1); /* Output 1s 1*/
|
503
|
|
- uint8_t b = spiTransferRx(0xFF);
|
504
|
|
- return b;
|
505
|
|
- }
|
506
|
|
-
|
507
|
|
- void spiRead(uint8_t* buf, uint16_t nbyte) {
|
508
|
|
- uint32_t todo = nbyte;
|
509
|
|
- if (todo == 0) return;
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|
454
|
+ #if MB(ALLIGATOR)
|
|
455
|
+ #define _SS_WRITE(S) WRITE(SS_PIN, S)
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|
456
|
+ #else
|
|
457
|
+ #define _SS_WRITE(S) NOOP
|
|
458
|
+ #endif
|
|
459
|
+
|
|
460
|
+ void spiBegin() {
|
|
461
|
+ SET_OUTPUT(SS_PIN);
|
|
462
|
+ _SS_WRITE(HIGH);
|
|
463
|
+ SET_OUTPUT(SCK_PIN);
|
|
464
|
+ SET_INPUT(MISO_PIN);
|
|
465
|
+ SET_OUTPUT(MOSI_PIN);
|
|
466
|
+ }
|
510
|
467
|
|
511
|
|
- WRITE(MOSI_PIN, 1); /* Output 1s 1*/
|
512
|
|
- spiRxBlock(buf,nbyte);
|
513
|
|
- }
|
|
468
|
+ uint8_t spiRec() {
|
|
469
|
+ _SS_WRITE(LOW);
|
|
470
|
+ WRITE(MOSI_PIN, HIGH); // Output 1s 1
|
|
471
|
+ uint8_t b = spiTransferRx(0xFF);
|
|
472
|
+ _SS_WRITE(HIGH);
|
|
473
|
+ return b;
|
|
474
|
+ }
|
514
|
475
|
|
515
|
|
- void spiSend(uint8_t b) {
|
516
|
|
- (void) spiTransferTx(b);
|
|
476
|
+ void spiRead(uint8_t* buf, uint16_t nbyte) {
|
|
477
|
+ if (nbyte) {
|
|
478
|
+ _SS_WRITE(LOW);
|
|
479
|
+ WRITE(MOSI_PIN, HIGH); // Output 1s 1
|
|
480
|
+ spiRxBlock(buf, nbyte);
|
|
481
|
+ _SS_WRITE(HIGH);
|
517
|
482
|
}
|
|
483
|
+ }
|
518
|
484
|
|
519
|
|
- void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
520
|
|
- (void) spiTransferTx(token);
|
521
|
|
- spiTxBlock(buf,512);
|
522
|
|
-
|
523
|
|
- #endif
|
|
485
|
+ void spiSend(uint8_t b) {
|
|
486
|
+ _SS_WRITE(LOW);
|
|
487
|
+ (void)spiTransferTx(b);
|
|
488
|
+ _SS_WRITE(HIGH);
|
|
489
|
+ }
|
524
|
490
|
|
|
491
|
+ void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
|
492
|
+ _SS_WRITE(LOW);
|
|
493
|
+ (void)spiTransferTx(token);
|
|
494
|
+ spiTxBlock(buf, 512);
|
|
495
|
+ _SS_WRITE(HIGH);
|
525
|
496
|
}
|
526
|
497
|
|
527
|
498
|
/**
|
|
@@ -549,7 +520,7 @@
|
549
|
520
|
spiRxBlock = (pfnSpiRxBlock)spiRxBlockX;
|
550
|
521
|
break;
|
551
|
522
|
default:
|
552
|
|
- spiDelayCyclesX4 = (F_CPU/1000000) >> (6 - spiRate);
|
|
523
|
+ spiDelayCyclesX4 = ((F_CPU) / 1000000) >> (6 - spiRate);
|
553
|
524
|
spiTransferTx = (pfnSpiTransfer)spiTransferX;
|
554
|
525
|
spiTransferRx = (pfnSpiTransfer)spiTransferX;
|
555
|
526
|
spiTxBlock = (pfnSpiTxBlock)spiTxBlockX;
|
|
@@ -557,9 +528,7 @@
|
557
|
528
|
break;
|
558
|
529
|
}
|
559
|
530
|
|
560
|
|
- #if MB(ALLIGATOR)
|
561
|
|
- WRITE(SS_PIN, HIGH);
|
562
|
|
- #endif
|
|
531
|
+ _SS_WRITE(HIGH);
|
563
|
532
|
WRITE(MOSI_PIN, HIGH);
|
564
|
533
|
WRITE(SCK_PIN, LOW);
|
565
|
534
|
}
|
|
@@ -573,6 +542,10 @@
|
573
|
542
|
|
574
|
543
|
#else // !SOFTWARE_SPI
|
575
|
544
|
|
|
545
|
+ #define WHILE_TX(N) while ((SPI0->SPI_SR & SPI_SR_TDRE) == (N))
|
|
546
|
+ #define WHILE_RX(N) while ((SPI0->SPI_SR & SPI_SR_RDRF) == (N))
|
|
547
|
+ #define FLUSH_TX() do{ WHILE_RX(1) SPI0->SPI_RDR; }while(0)
|
|
548
|
+
|
576
|
549
|
#if MB(ALLIGATOR)
|
577
|
550
|
|
578
|
551
|
// slave selects controlled by SPI controller
|
|
@@ -645,13 +618,14 @@
|
645
|
618
|
WRITE(SPI_FLASH_CS, HIGH);
|
646
|
619
|
WRITE(SS_PIN, HIGH);
|
647
|
620
|
|
648
|
|
- OUT_WRITE(SDSS,0);
|
|
621
|
+ OUT_WRITE(SDSS, LOW);
|
649
|
622
|
|
650
|
623
|
PIO_Configure(
|
651
|
624
|
g_APinDescription[SPI_PIN].pPort,
|
652
|
625
|
g_APinDescription[SPI_PIN].ulPinType,
|
653
|
626
|
g_APinDescription[SPI_PIN].ulPin,
|
654
|
|
- g_APinDescription[SPI_PIN].ulPinConfiguration);
|
|
627
|
+ g_APinDescription[SPI_PIN].ulPinConfiguration
|
|
628
|
+ );
|
655
|
629
|
|
656
|
630
|
spiInit(1);
|
657
|
631
|
}
|
|
@@ -660,30 +634,23 @@
|
660
|
634
|
uint8_t spiRec() {
|
661
|
635
|
// write dummy byte with address and end transmission flag
|
662
|
636
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
|
663
|
|
- // wait for transmit register empty
|
664
|
|
- while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
665
|
637
|
|
666
|
|
- // wait for receive register
|
667
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
668
|
|
- // get byte from receive register
|
|
638
|
+ WHILE_TX(0);
|
|
639
|
+ WHILE_RX(0);
|
|
640
|
+
|
669
|
641
|
//DELAY_US(1U);
|
670
|
642
|
return SPI0->SPI_RDR;
|
671
|
643
|
}
|
672
|
644
|
|
673
|
645
|
uint8_t spiRec(uint32_t chan) {
|
674
|
|
- uint8_t spirec_tmp;
|
675
|
|
- // wait for transmit register empty
|
676
|
|
- while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
677
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
|
678
|
|
- spirec_tmp = SPI0->SPI_RDR;
|
679
|
|
- UNUSED(spirec_tmp);
|
|
646
|
+
|
|
647
|
+ WHILE_TX(0);
|
|
648
|
+ FLUSH_RX();
|
680
|
649
|
|
681
|
650
|
// write dummy byte with address and end transmission flag
|
682
|
651
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
|
|
652
|
+ WHILE_RX(0);
|
683
|
653
|
|
684
|
|
- // wait for receive register
|
685
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
686
|
|
- // get byte from receive register
|
687
|
654
|
return SPI0->SPI_RDR;
|
688
|
655
|
}
|
689
|
656
|
|
|
@@ -692,9 +659,9 @@
|
692
|
659
|
if (nbyte-- == 0) return;
|
693
|
660
|
|
694
|
661
|
for (int i = 0; i < nbyte; i++) {
|
695
|
|
- //while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
|
662
|
+ //WHILE_TX(0);
|
696
|
663
|
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
|
697
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
|
664
|
+ WHILE_RX(0);
|
698
|
665
|
buf[i] = SPI0->SPI_RDR;
|
699
|
666
|
//DELAY_US(1U);
|
700
|
667
|
}
|
|
@@ -705,11 +672,8 @@
|
705
|
672
|
void spiSend(byte b) {
|
706
|
673
|
// write byte with address and end transmission flag
|
707
|
674
|
SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
|
708
|
|
- // wait for transmit register empty
|
709
|
|
- while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
710
|
|
- // wait for receive register
|
711
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
712
|
|
- // clear status
|
|
675
|
+ WHILE_TX(0);
|
|
676
|
+ WHILE_RX(0);
|
713
|
677
|
SPI0->SPI_RDR;
|
714
|
678
|
//DELAY_US(1U);
|
715
|
679
|
}
|
|
@@ -718,8 +682,8 @@
|
718
|
682
|
if (n == 0) return;
|
719
|
683
|
for (size_t i = 0; i < n - 1; i++) {
|
720
|
684
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
|
721
|
|
- while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
722
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
|
685
|
+ WHILE_TX(0);
|
|
686
|
+ WHILE_RX(0);
|
723
|
687
|
SPI0->SPI_RDR;
|
724
|
688
|
//DELAY_US(1U);
|
725
|
689
|
}
|
|
@@ -727,29 +691,20 @@
|
727
|
691
|
}
|
728
|
692
|
|
729
|
693
|
void spiSend(uint32_t chan, byte b) {
|
730
|
|
- uint8_t dummy_read = 0;
|
731
|
|
- // wait for transmit register empty
|
732
|
|
- while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
|
694
|
+ WHILE_TX(0);
|
733
|
695
|
// write byte with address and end transmission flag
|
734
|
696
|
SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER;
|
735
|
|
- // wait for receive register
|
736
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
737
|
|
- // clear status
|
738
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
|
739
|
|
- dummy_read = SPI0->SPI_RDR;
|
740
|
|
- UNUSED(dummy_read);
|
|
697
|
+ WHILE_RX(0);
|
|
698
|
+ FLUSH_RX();
|
741
|
699
|
}
|
742
|
700
|
|
743
|
701
|
void spiSend(uint32_t chan, const uint8_t* buf, size_t n) {
|
744
|
|
- uint8_t dummy_read = 0;
|
745
|
702
|
if (n == 0) return;
|
746
|
703
|
for (int i = 0; i < (int)n - 1; i++) {
|
747
|
|
- while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
|
704
|
+ WHILE_TX(0);
|
748
|
705
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan);
|
749
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
750
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
|
751
|
|
- dummy_read = SPI0->SPI_RDR;
|
752
|
|
- UNUSED(dummy_read);
|
|
706
|
+ WHILE_RX(0);
|
|
707
|
+ FLUSH_RX();
|
753
|
708
|
}
|
754
|
709
|
spiSend(chan, buf[n - 1]);
|
755
|
710
|
}
|
|
@@ -757,13 +712,13 @@
|
757
|
712
|
// Write from buffer to SPI
|
758
|
713
|
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
759
|
714
|
SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
|
760
|
|
- while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
761
|
|
- //while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
|
715
|
+ WHILE_TX(0);
|
|
716
|
+ //WHILE_RX(0);
|
762
|
717
|
//SPI0->SPI_RDR;
|
763
|
718
|
for (int i = 0; i < 511; i++) {
|
764
|
719
|
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
|
765
|
|
- while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
766
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
|
720
|
+ WHILE_TX(0);
|
|
721
|
+ WHILE_RX(0);
|
767
|
722
|
SPI0->SPI_RDR;
|
768
|
723
|
//DELAY_US(1U);
|
769
|
724
|
}
|
|
@@ -792,7 +747,7 @@
|
792
|
747
|
|
793
|
748
|
// Disable PIO on A26 and A27
|
794
|
749
|
REG_PIOA_PDR = 0x0C000000;
|
795
|
|
- OUT_WRITE(SDSS, 1);
|
|
750
|
+ OUT_WRITE(SDSS, HIGH);
|
796
|
751
|
|
797
|
752
|
// Reset SPI0 (from sam lib)
|
798
|
753
|
SPI0->SPI_CR = SPI_CR_SPIDIS;
|
|
@@ -807,45 +762,30 @@
|
807
|
762
|
SPI0->SPI_CSR[3] = SPI_CSR_SCBR(spiDivider[spiRate]) | SPI_CSR_CSAAT | SPI_MODE_0_DUE_HW; // use same CSR as TMC2130
|
808
|
763
|
}
|
809
|
764
|
|
810
|
|
- void spiBegin() {
|
811
|
|
- spiInit();
|
812
|
|
- }
|
|
765
|
+ void spiBegin() { spiInit(); }
|
813
|
766
|
|
814
|
767
|
static uint8_t spiTransfer(uint8_t data) {
|
815
|
|
-
|
816
|
|
- // Wait until tx register is empty
|
817
|
|
- while( (SPI0->SPI_SR & SPI_SR_TDRE) == 0 );
|
818
|
|
- // Send data
|
|
768
|
+ WHILE_TX(0);
|
819
|
769
|
SPI0->SPI_TDR = (uint32_t)data | 0x00070000UL; // Add TMC2130 PCS bits to every byte
|
820
|
|
-
|
821
|
|
- // wait for transmit register empty
|
822
|
|
- while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
823
|
|
-
|
824
|
|
- // wait for receive register
|
825
|
|
- while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
826
|
|
- // get byte from receive register
|
|
770
|
+ WHILE_TX(0);
|
|
771
|
+ WHILE_RX(0);
|
827
|
772
|
return SPI0->SPI_RDR;
|
828
|
773
|
}
|
829
|
774
|
|
830
|
|
- uint8_t spiRec() {
|
831
|
|
- uint8_t data = spiTransfer(0xFF);
|
832
|
|
- return data;
|
833
|
|
- }
|
|
775
|
+ uint8_t spiRec() { return (uint8_t)spiTransfer(0xFF); }
|
834
|
776
|
|
835
|
777
|
void spiRead(uint8_t* buf, uint16_t nbyte) {
|
836
|
|
- if (nbyte == 0) return;
|
837
|
|
- for (int i = 0; i < nbyte; i++)
|
838
|
|
- buf[i] = spiTransfer(0xFF);
|
|
778
|
+ if (nbyte)
|
|
779
|
+ for (int i = 0; i < nbyte; i++)
|
|
780
|
+ buf[i] = spiTransfer(0xFF);
|
839
|
781
|
}
|
840
|
782
|
|
841
|
|
- void spiSend(uint8_t data) {
|
842
|
|
- spiTransfer(data);
|
843
|
|
- }
|
|
783
|
+ void spiSend(uint8_t data) { spiTransfer(data); }
|
844
|
784
|
|
845
|
|
- void spiSend(const uint8_t* buf, size_t n) {
|
846
|
|
- if (n == 0) return;
|
847
|
|
- for (uint16_t i = 0; i < n; i++)
|
848
|
|
- spiTransfer(buf[i]);
|
|
785
|
+ void spiSend(const uint8_t* buf, size_t nbyte) {
|
|
786
|
+ if (nbyte)
|
|
787
|
+ for (uint16_t i = 0; i < nbyte; i++)
|
|
788
|
+ spiTransfer(buf[i]);
|
849
|
789
|
}
|
850
|
790
|
|
851
|
791
|
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|