/* Copyright (c) 2011 Arduino. All right reserved. This library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) any later version. This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details. You should have received a copy of the GNU Lesser General Public License along with this library; if not, write to the Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include "pins_arduino.h" #ifdef __cplusplus extern "C" { #endif // Pin number const PinName digitalPin[] = { PA_0, //D0 PA_1, //D1 PA_2, //D2 PA_3, //D3 PA_4, //D4 PA_5, //D5 PA_6, //D6 PA_7, //D7 PA_8, //D8 PA_9, //D9 PA_10, //D10 PA_11, //D11 PA_12, //D12 PA_13, //D13 PA_14, //D14 PA_15, //D15 PB_0, //D16 PB_1, //D17 PB_2, //D18 PB_3, //D19 PB_4, //D20 PB_5, //D21 PB_6, //D22 PB_7, //D23 PB_8, //D24 PB_9, //D25 PB_10, //D26 PB_12, //D27 PB_13, //D28 PB_14, //D29 PB_15, //D30 PC_0, //D31 PC_1, //D32 PC_2, //D33 PC_3, //D34 PC_4, //D35 PC_5, //D36 PC_6, //D37 PC_7, //D38 PC_8, //D39 PC_9, //D40 PC_10, //D41 PC_11, //D42 PC_12, //D43 PC_13, //D44 PC_14, //D45 PC_15, //D46 PD_2, //D47 PH_0, //D48 PH_1, //D49 //Duplicated ADC Pins PA_0, //D50/A0 PA_1, //D51/A1 PA_2, //D52/A2 PA_3, //D53/A3 PA_4, //D54/A4 PA_5, //D55/A5 PA_6, //D56/A6 PA_7, //D57/A7 PB_0, //D58/A8 PB_1, //D59/A9 PC_0, //D60/A10 PC_1, //D61/A11 PC_2, //D62/A12 PC_3, //D63/A13 PC_4, //D64/A14 PC_5 //D65/A15 }; #ifdef __cplusplus } #endif // ---------------------------------------------------------------------------- #ifdef __cplusplus extern "C" { #endif /** * @brief System Clock Configuration * The system Clock is configured as follow : * System Clock source = PLL (HSE) * SYSCLK(Hz) = 84000000 * HCLK(Hz) = 84000000 * AHB Prescaler = 1 * APB1 Prescaler = 2 * APB2 Prescaler = 1 * HSE Frequency(Hz) = 8000000 * PLL_M = 8 * PLL_N = 336 * PLL_P = 4 * PLL_Q = 7 * VDD(V) = 3.3 * Main regulator output voltage = Scale2 mode * Flash Latency(WS) = 2 * @param None * @retval None */ WEAK void SystemClock_Config(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; /* Enable Power Control clock */ __HAL_RCC_PWR_CLK_ENABLE(); /* The voltage scaling allows optimizing the power consumption when the device is clocked below the maximum system frequency, to update the voltage scaling value regarding system frequency refer to product datasheet. */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); /* Enable HSI Oscillator and activate PLL with HSI as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; RCC_OscInitStruct.PLL.PLLN = 336; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; RCC_OscInitStruct.PLL.PLLQ = 7; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { /* Initialization Error */ while (1); } /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { /* Initialization Error */ while (1); } } #ifdef __cplusplus } #endif void flashFirmware(const int16_t) { *((unsigned long *)0x2000FFF0) = 0xDEADBEEF; // End of RAM NVIC_SystemReset(); }