My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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onboard_sd.cpp 21KB

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  1. /**
  2. * STM32F1: MMCv3/SDv1/SDv2 (SPI mode) control module
  3. *
  4. * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
  5. * Copyright (c) 2019 BigTreeTech [https://github.com/bigtreetech]
  6. * Copyright (C) 2015, ChaN, all right reserved.
  7. *
  8. * This software is a free software and there is NO WARRANTY.
  9. * No restriction on use. You can use, modify and redistribute it for
  10. * personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
  11. * Redistributions of source code must retain the above copyright notice.
  12. */
  13. #ifdef __STM32F1__
  14. #include "../../inc/MarlinConfig.h"
  15. #if SD_CONNECTION_IS(ONBOARD)
  16. #include "onboard_sd.h"
  17. #include "SPI.h"
  18. #include "fastio.h"
  19. #ifndef ONBOARD_SPI_DEVICE
  20. #define ONBOARD_SPI_DEVICE SPI_DEVICE
  21. #endif
  22. #if HAS_SD_HOST_DRIVE
  23. #define ONBOARD_SD_SPI SPI
  24. #else
  25. SPIClass OnboardSPI(ONBOARD_SPI_DEVICE);
  26. #define ONBOARD_SD_SPI OnboardSPI
  27. #endif
  28. #if ONBOARD_SPI_DEVICE == 1
  29. #define SPI_CLOCK_MAX SPI_BAUD_PCLK_DIV_4
  30. #else
  31. #define SPI_CLOCK_MAX SPI_BAUD_PCLK_DIV_2
  32. #endif
  33. #if PIN_EXISTS(ONBOARD_SD_CS) && ONBOARD_SD_CS_PIN != SD_SS_PIN
  34. #define CS_LOW() WRITE(ONBOARD_SD_CS_PIN, LOW) // Set OnboardSPI cs low
  35. #define CS_HIGH() WRITE(ONBOARD_SD_CS_PIN, HIGH) // Set OnboardSPI cs high
  36. #else
  37. #define CS_LOW()
  38. #define CS_HIGH()
  39. #endif
  40. #define FCLK_FAST() ONBOARD_SD_SPI.setClockDivider(SPI_CLOCK_MAX)
  41. #define FCLK_SLOW() ONBOARD_SD_SPI.setClockDivider(SPI_BAUD_PCLK_DIV_256)
  42. /*--------------------------------------------------------------------------
  43. Module Private Functions
  44. ---------------------------------------------------------------------------*/
  45. /* MMC/SD command */
  46. #define CMD0 (0) // GO_IDLE_STATE
  47. #define CMD1 (1) // SEND_OP_COND (MMC)
  48. #define ACMD41 (0x80+41) // SEND_OP_COND (SDC)
  49. #define CMD8 (8) // SEND_IF_COND
  50. #define CMD9 (9) // SEND_CSD
  51. #define CMD10 (10) // SEND_CID
  52. #define CMD12 (12) // STOP_TRANSMISSION
  53. #define ACMD13 (0x80+13) // SD_STATUS (SDC)
  54. #define CMD16 (16) // SET_BLOCKLEN
  55. #define CMD17 (17) // READ_SINGLE_BLOCK
  56. #define CMD18 (18) // READ_MULTIPLE_BLOCK
  57. #define CMD23 (23) // SET_BLOCK_COUNT (MMC)
  58. #define ACMD23 (0x80+23) // SET_WR_BLK_ERASE_COUNT (SDC)
  59. #define CMD24 (24) // WRITE_BLOCK
  60. #define CMD25 (25) // WRITE_MULTIPLE_BLOCK
  61. #define CMD32 (32) // ERASE_ER_BLK_START
  62. #define CMD33 (33) // ERASE_ER_BLK_END
  63. #define CMD38 (38) // ERASE
  64. #define CMD48 (48) // READ_EXTR_SINGLE
  65. #define CMD49 (49) // WRITE_EXTR_SINGLE
  66. #define CMD55 (55) // APP_CMD
  67. #define CMD58 (58) // READ_OCR
  68. static volatile DSTATUS Stat = STA_NOINIT; // Physical drive status
  69. static volatile UINT timeout;
  70. static BYTE CardType; // Card type flags
  71. /*-----------------------------------------------------------------------*/
  72. /* Send/Receive data to the MMC (Platform dependent) */
  73. /*-----------------------------------------------------------------------*/
  74. /* Exchange a byte */
  75. static BYTE xchg_spi (
  76. BYTE dat // Data to send
  77. ) {
  78. BYTE returnByte = ONBOARD_SD_SPI.transfer(dat);
  79. return returnByte;
  80. }
  81. /* Receive multiple byte */
  82. static void rcvr_spi_multi (
  83. BYTE *buff, // Pointer to data buffer
  84. UINT btr // Number of bytes to receive (16, 64 or 512)
  85. ) {
  86. ONBOARD_SD_SPI.dmaTransfer(0, const_cast<uint8_t*>(buff), btr);
  87. }
  88. #if _DISKIO_WRITE
  89. // Send multiple bytes
  90. static void xmit_spi_multi (
  91. const BYTE *buff, // Pointer to the data
  92. UINT btx // Number of bytes to send (multiple of 16)
  93. ) {
  94. ONBOARD_SD_SPI.dmaSend(const_cast<uint8_t*>(buff), btx);
  95. }
  96. #endif // _DISKIO_WRITE
  97. /*-----------------------------------------------------------------------*/
  98. /* Wait for card ready */
  99. /*-----------------------------------------------------------------------*/
  100. static int wait_ready ( // 1:Ready, 0:Timeout
  101. UINT wt // Timeout [ms]
  102. ) {
  103. BYTE d;
  104. timeout = millis() + wt;
  105. do {
  106. d = xchg_spi(0xFF);
  107. // This loop takes a while. Insert rot_rdq() here for multitask environment.
  108. } while (d != 0xFF && (timeout > millis())); // Wait for card goes ready or timeout
  109. return (d == 0xFF) ? 1 : 0;
  110. }
  111. /*-----------------------------------------------------------------------*/
  112. /* Deselect card and release SPI */
  113. /*-----------------------------------------------------------------------*/
  114. static void deselect() {
  115. CS_HIGH(); // CS = H
  116. xchg_spi(0xFF); // Dummy clock (force DO hi-z for multiple slave SPI)
  117. }
  118. /*-----------------------------------------------------------------------*/
  119. /* Select card and wait for ready */
  120. /*-----------------------------------------------------------------------*/
  121. static int select() { // 1:OK, 0:Timeout
  122. CS_LOW(); // CS = L
  123. xchg_spi(0xFF); // Dummy clock (force DO enabled)
  124. if (wait_ready(500)) return 1; // Leading busy check: Wait for card ready
  125. deselect(); // Timeout
  126. return 0;
  127. }
  128. /*-----------------------------------------------------------------------*/
  129. /* Control SPI module (Platform dependent) */
  130. /*-----------------------------------------------------------------------*/
  131. // Enable SSP module and attach it to I/O pads
  132. static void sd_power_on() {
  133. ONBOARD_SD_SPI.setModule(ONBOARD_SPI_DEVICE);
  134. ONBOARD_SD_SPI.begin();
  135. ONBOARD_SD_SPI.setBitOrder(MSBFIRST);
  136. ONBOARD_SD_SPI.setDataMode(SPI_MODE0);
  137. CS_HIGH();
  138. }
  139. // Disable SPI function
  140. static void sd_power_off() {
  141. select(); // Wait for card ready
  142. deselect();
  143. }
  144. /*-----------------------------------------------------------------------*/
  145. /* Receive a data packet from the MMC */
  146. /*-----------------------------------------------------------------------*/
  147. static int rcvr_datablock ( // 1:OK, 0:Error
  148. BYTE *buff, // Data buffer
  149. UINT btr // Data block length (byte)
  150. ) {
  151. BYTE token;
  152. timeout = millis() + 200;
  153. do { // Wait for DataStart token in timeout of 200ms
  154. token = xchg_spi(0xFF);
  155. // This loop will take a while. Insert rot_rdq() here for multitask environment.
  156. } while ((token == 0xFF) && (timeout > millis()));
  157. if (token != 0xFE) return 0; // Function fails if invalid DataStart token or timeout
  158. rcvr_spi_multi(buff, btr); // Store trailing data to the buffer
  159. xchg_spi(0xFF); xchg_spi(0xFF); // Discard CRC
  160. return 1; // Function succeeded
  161. }
  162. /*-----------------------------------------------------------------------*/
  163. /* Send a data packet to the MMC */
  164. /*-----------------------------------------------------------------------*/
  165. #if _DISKIO_WRITE
  166. static int xmit_datablock( // 1:OK, 0:Failed
  167. const BYTE *buff, // Pointer to 512 byte data to be sent
  168. BYTE token // Token
  169. ) {
  170. BYTE resp;
  171. if (!wait_ready(500)) return 0; // Leading busy check: Wait for card ready to accept data block
  172. xchg_spi(token); // Send token
  173. if (token == 0xFD) return 1; // Do not send data if token is StopTran
  174. xmit_spi_multi(buff, 512); // Data
  175. xchg_spi(0xFF); xchg_spi(0xFF); // Dummy CRC
  176. resp = xchg_spi(0xFF); // Receive data resp
  177. return (resp & 0x1F) == 0x05 ? 1 : 0; // Data was accepted or not
  178. // Busy check is done at next transmission
  179. }
  180. #endif // _DISKIO_WRITE
  181. /*-----------------------------------------------------------------------*/
  182. /* Send a command packet to the MMC */
  183. /*-----------------------------------------------------------------------*/
  184. static BYTE send_cmd( // Return value: R1 resp (bit7==1:Failed to send)
  185. BYTE cmd, // Command index
  186. DWORD arg // Argument
  187. ) {
  188. BYTE n, res;
  189. if (cmd & 0x80) { // Send a CMD55 prior to ACMD<n>
  190. cmd &= 0x7F;
  191. res = send_cmd(CMD55, 0);
  192. if (res > 1) return res;
  193. }
  194. // Select the card and wait for ready except to stop multiple block read
  195. if (cmd != CMD12) {
  196. deselect();
  197. if (!select()) return 0xFF;
  198. }
  199. // Send command packet
  200. xchg_spi(0x40 | cmd); // Start + command index
  201. xchg_spi((BYTE)(arg >> 24)); // Argument[31..24]
  202. xchg_spi((BYTE)(arg >> 16)); // Argument[23..16]
  203. xchg_spi((BYTE)(arg >> 8)); // Argument[15..8]
  204. xchg_spi((BYTE)arg); // Argument[7..0]
  205. n = 0x01; // Dummy CRC + Stop
  206. if (cmd == CMD0) n = 0x95; // Valid CRC for CMD0(0)
  207. if (cmd == CMD8) n = 0x87; // Valid CRC for CMD8(0x1AA)
  208. xchg_spi(n);
  209. // Receive command response
  210. if (cmd == CMD12) xchg_spi(0xFF); // Discard the following byte when CMD12
  211. n = 10; // Wait for response (10 bytes max)
  212. do
  213. res = xchg_spi(0xFF);
  214. while ((res & 0x80) && --n);
  215. return res; // Return received response
  216. }
  217. /*--------------------------------------------------------------------------
  218. Public Functions
  219. ---------------------------------------------------------------------------*/
  220. /*-----------------------------------------------------------------------*/
  221. /* Initialize disk drive */
  222. /*-----------------------------------------------------------------------*/
  223. DSTATUS disk_initialize (
  224. BYTE drv // Physical drive number (0)
  225. ) {
  226. BYTE n, cmd, ty, ocr[4];
  227. if (drv) return STA_NOINIT; // Supports only drive 0
  228. sd_power_on(); // Initialize SPI
  229. if (Stat & STA_NODISK) return Stat; // Is a card existing in the socket?
  230. FCLK_SLOW();
  231. for (n = 10; n; n--) xchg_spi(0xFF); // Send 80 dummy clocks
  232. ty = 0;
  233. if (send_cmd(CMD0, 0) == 1) { // Put the card SPI state
  234. timeout = millis() + 1000; // Initialization timeout = 1 sec
  235. if (send_cmd(CMD8, 0x1AA) == 1) { // Is the catd SDv2?
  236. for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); // Get 32 bit return value of R7 resp
  237. if (ocr[2] == 0x01 && ocr[3] == 0xAA) { // Does the card support 2.7-3.6V?
  238. while ((timeout > millis()) && send_cmd(ACMD41, 1UL << 30)); // Wait for end of initialization with ACMD41(HCS)
  239. if ((timeout > millis()) && send_cmd(CMD58, 0) == 0) { // Check CCS bit in the OCR
  240. for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
  241. ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; // Check if the card is SDv2
  242. }
  243. }
  244. }
  245. else { // Not an SDv2 card
  246. if (send_cmd(ACMD41, 0) <= 1) { // SDv1 or MMCv3?
  247. ty = CT_SD1; cmd = ACMD41; // SDv1 (ACMD41(0))
  248. }
  249. else {
  250. ty = CT_MMC; cmd = CMD1; // MMCv3 (CMD1(0))
  251. }
  252. while ((timeout > millis()) && send_cmd(cmd, 0)); // Wait for the card leaves idle state
  253. if (!(timeout > millis()) || send_cmd(CMD16, 512) != 0) // Set block length: 512
  254. ty = 0;
  255. }
  256. }
  257. CardType = ty; // Card type
  258. deselect();
  259. if (ty) { // OK
  260. FCLK_FAST(); // Set fast clock
  261. Stat &= ~STA_NOINIT; // Clear STA_NOINIT flag
  262. }
  263. else { // Failed
  264. sd_power_off();
  265. Stat = STA_NOINIT;
  266. }
  267. return Stat;
  268. }
  269. /*-----------------------------------------------------------------------*/
  270. /* Get disk status */
  271. /*-----------------------------------------------------------------------*/
  272. DSTATUS disk_status (
  273. BYTE drv // Physical drive number (0)
  274. ) {
  275. if (drv) return STA_NOINIT; // Supports only drive 0
  276. return Stat; // Return disk status
  277. }
  278. /*-----------------------------------------------------------------------*/
  279. /* Read sector(s) */
  280. /*-----------------------------------------------------------------------*/
  281. DRESULT disk_read (
  282. BYTE drv, // Physical drive number (0)
  283. BYTE *buff, // Pointer to the data buffer to store read data
  284. DWORD sector, // Start sector number (LBA)
  285. UINT count // Number of sectors to read (1..128)
  286. ) {
  287. BYTE cmd;
  288. if (drv || !count) return RES_PARERR; // Check parameter
  289. if (Stat & STA_NOINIT) return RES_NOTRDY; // Check if drive is ready
  290. if (!(CardType & CT_BLOCK)) sector *= 512; // LBA ot BA conversion (byte addressing cards)
  291. FCLK_FAST();
  292. cmd = count > 1 ? CMD18 : CMD17; // READ_MULTIPLE_BLOCK : READ_SINGLE_BLOCK
  293. if (send_cmd(cmd, sector) == 0) {
  294. do {
  295. if (!rcvr_datablock(buff, 512)) break;
  296. buff += 512;
  297. } while (--count);
  298. if (cmd == CMD18) send_cmd(CMD12, 0); // STOP_TRANSMISSION
  299. }
  300. deselect();
  301. return count ? RES_ERROR : RES_OK; // Return result
  302. }
  303. /*-----------------------------------------------------------------------*/
  304. /* Write sector(s) */
  305. /*-----------------------------------------------------------------------*/
  306. #if _DISKIO_WRITE
  307. DRESULT disk_write(
  308. BYTE drv, // Physical drive number (0)
  309. const BYTE *buff, // Pointer to the data to write
  310. DWORD sector, // Start sector number (LBA)
  311. UINT count // Number of sectors to write (1..128)
  312. ) {
  313. if (drv || !count) return RES_PARERR; // Check parameter
  314. if (Stat & STA_NOINIT) return RES_NOTRDY; // Check drive status
  315. if (Stat & STA_PROTECT) return RES_WRPRT; // Check write protect
  316. FCLK_FAST();
  317. if (!(CardType & CT_BLOCK)) sector *= 512; // LBA ==> BA conversion (byte addressing cards)
  318. if (count == 1) { // Single sector write
  319. if ((send_cmd(CMD24, sector) == 0) // WRITE_BLOCK
  320. && xmit_datablock(buff, 0xFE)) {
  321. count = 0;
  322. }
  323. }
  324. else { // Multiple sector write
  325. if (CardType & CT_SDC) send_cmd(ACMD23, count); // Predefine number of sectors
  326. if (send_cmd(CMD25, sector) == 0) { // WRITE_MULTIPLE_BLOCK
  327. do {
  328. if (!xmit_datablock(buff, 0xFC)) break;
  329. buff += 512;
  330. } while (--count);
  331. if (!xmit_datablock(0, 0xFD)) count = 1; // STOP_TRAN token
  332. }
  333. }
  334. deselect();
  335. return count ? RES_ERROR : RES_OK; // Return result
  336. }
  337. #endif // _DISKIO_WRITE
  338. /*-----------------------------------------------------------------------*/
  339. /* Miscellaneous drive controls other than data read/write */
  340. /*-----------------------------------------------------------------------*/
  341. #if _DISKIO_IOCTL
  342. DRESULT disk_ioctl (
  343. BYTE drv, // Physical drive number (0)
  344. BYTE cmd, // Control command code
  345. void *buff // Pointer to the conrtol data
  346. ) {
  347. DRESULT res;
  348. BYTE n, csd[16], *ptr = (BYTE *)buff;
  349. DWORD *dp, st, ed, csize;
  350. #if _DISKIO_ISDIO
  351. SDIO_CMD *sdio = buff;
  352. BYTE rc, *buf;
  353. UINT dc;
  354. #endif
  355. if (drv) return RES_PARERR; // Check parameter
  356. if (Stat & STA_NOINIT) return RES_NOTRDY; // Check if drive is ready
  357. res = RES_ERROR;
  358. FCLK_FAST();
  359. switch (cmd) {
  360. case CTRL_SYNC: // Wait for end of internal write process of the drive
  361. if (select()) res = RES_OK;
  362. break;
  363. case GET_SECTOR_COUNT: // Get drive capacity in unit of sector (DWORD)
  364. if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
  365. if ((csd[0] >> 6) == 1) { // SDC ver 2.00
  366. csize = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
  367. *(DWORD*)buff = csize << 10;
  368. }
  369. else { // SDC ver 1.XX or MMC ver 3
  370. n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
  371. csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
  372. *(DWORD*)buff = csize << (n - 9);
  373. }
  374. res = RES_OK;
  375. }
  376. break;
  377. case GET_BLOCK_SIZE: // Get erase block size in unit of sector (DWORD)
  378. if (CardType & CT_SD2) { // SDC ver 2.00
  379. if (send_cmd(ACMD13, 0) == 0) { // Read SD status
  380. xchg_spi(0xFF);
  381. if (rcvr_datablock(csd, 16)) { // Read partial block
  382. for (n = 64 - 16; n; n--) xchg_spi(0xFF); // Purge trailing data
  383. *(DWORD*)buff = 16UL << (csd[10] >> 4);
  384. res = RES_OK;
  385. }
  386. }
  387. }
  388. else { // SDC ver 1.XX or MMC
  389. if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { // Read CSD
  390. if (CardType & CT_SD1) { // SDC ver 1.XX
  391. *(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
  392. }
  393. else { // MMC
  394. *(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
  395. }
  396. res = RES_OK;
  397. }
  398. }
  399. break;
  400. case CTRL_TRIM: // Erase a block of sectors (used when _USE_TRIM in ffconf.h is 1)
  401. if (!(CardType & CT_SDC)) break; // Check if the card is SDC
  402. if (disk_ioctl(drv, MMC_GET_CSD, csd)) break; // Get CSD
  403. if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; // Check if sector erase can be applied to the card
  404. dp = (DWORD *)buff; st = dp[0]; ed = dp[1]; // Load sector block
  405. if (!(CardType & CT_BLOCK)) {
  406. st *= 512; ed *= 512;
  407. }
  408. if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000)) { // Erase sector block
  409. res = RES_OK; // FatFs does not check result of this command
  410. }
  411. break;
  412. // The following commands are never used by FatFs module
  413. case MMC_GET_TYPE: // Get MMC/SDC type (BYTE)
  414. *ptr = CardType;
  415. res = RES_OK;
  416. break;
  417. case MMC_GET_CSD: // Read CSD (16 bytes)
  418. if (send_cmd(CMD9, 0) == 0 && rcvr_datablock(ptr, 16)) {
  419. res = RES_OK;
  420. }
  421. break;
  422. case MMC_GET_CID: // Read CID (16 bytes)
  423. if (send_cmd(CMD10, 0) == 0 && rcvr_datablock(ptr, 16)) {
  424. res = RES_OK;
  425. }
  426. break;
  427. case MMC_GET_OCR: // Read OCR (4 bytes)
  428. if (send_cmd(CMD58, 0) == 0) {
  429. for (n = 4; n; n--) *ptr++ = xchg_spi(0xFF);
  430. res = RES_OK;
  431. }
  432. break;
  433. case MMC_GET_SDSTAT: // Read SD status (64 bytes)
  434. if (send_cmd(ACMD13, 0) == 0) {
  435. xchg_spi(0xFF);
  436. if (rcvr_datablock(ptr, 64)) res = RES_OK;
  437. }
  438. break;
  439. #if _DISKIO_ISDIO
  440. case ISDIO_READ:
  441. sdio = buff;
  442. if (send_cmd(CMD48, 0x80000000 | sdio->func << 28 | sdio->addr << 9 | ((sdio->ndata - 1) & 0x1FF)) == 0) {
  443. for (Timer1 = 1000; (rc = xchg_spi(0xFF)) == 0xFF && Timer1; ) ;
  444. if (rc == 0xFE) {
  445. for (buf = sdio->data, dc = sdio->ndata; dc; dc--) *buf++ = xchg_spi(0xFF);
  446. for (dc = 514 - sdio->ndata; dc; dc--) xchg_spi(0xFF);
  447. res = RES_OK;
  448. }
  449. }
  450. break;
  451. case ISDIO_WRITE:
  452. sdio = buff;
  453. if (send_cmd(CMD49, 0x80000000 | sdio->func << 28 | sdio->addr << 9 | ((sdio->ndata - 1) & 0x1FF)) == 0) {
  454. xchg_spi(0xFF); xchg_spi(0xFE);
  455. for (buf = sdio->data, dc = sdio->ndata; dc; dc--) xchg_spi(*buf++);
  456. for (dc = 514 - sdio->ndata; dc; dc--) xchg_spi(0xFF);
  457. if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
  458. }
  459. break;
  460. case ISDIO_MRITE:
  461. sdio = buff;
  462. if (send_cmd(CMD49, 0x84000000 | sdio->func << 28 | sdio->addr << 9 | sdio->ndata >> 8) == 0) {
  463. xchg_spi(0xFF); xchg_spi(0xFE);
  464. xchg_spi(sdio->ndata);
  465. for (dc = 513; dc; dc--) xchg_spi(0xFF);
  466. if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
  467. }
  468. break;
  469. #endif // _DISKIO_ISDIO
  470. default: res = RES_PARERR;
  471. }
  472. deselect();
  473. return res;
  474. }
  475. #endif // _DISKIO_IOCTL
  476. #endif // SD_CONNECTION_IS(ONBOARD)
  477. #endif // __STM32F1__