My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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  1. /**********************************************************************
  2. * $Id$ lpc17xx_ssp.c 2010-06-18
  3. *//**
  4. * @file lpc17xx_ssp.c
  5. * @brief Contains all functions support for SSP firmware library on LPC17xx
  6. * @version 3.0
  7. * @date 18. June. 2010
  8. * @author NXP MCU SW Application Team
  9. *
  10. * Copyright(C) 2010, NXP Semiconductor
  11. * All rights reserved.
  12. *
  13. ***********************************************************************
  14. * Software that is described herein is for illustrative purposes only
  15. * which provides customers with programming information regarding the
  16. * products. This software is supplied "AS IS" without any warranties.
  17. * NXP Semiconductors assumes no responsibility or liability for the
  18. * use of the software, conveys no license or title under any patent,
  19. * copyright, or mask work right to the product. NXP Semiconductors
  20. * reserves the right to make changes in the software without
  21. * notification. NXP Semiconductors also make no representation or
  22. * warranty that such application will be suitable for the specified
  23. * use without further testing or modification.
  24. * Permission to use, copy, modify, and distribute this software and its
  25. * documentation is hereby granted, under NXP Semiconductors'
  26. * relevant copyright in the software, without fee, provided that it
  27. * is used in conjunction with NXP Semiconductors microcontrollers. This
  28. * copyright, permission, and disclaimer notice must appear in all copies of
  29. * this code.
  30. **********************************************************************/
  31. /* Peripheral group ----------------------------------------------------------- */
  32. /** @addtogroup SSP
  33. * @{
  34. */
  35. /* Includes ------------------------------------------------------------------- */
  36. #include "lpc17xx_ssp.h"
  37. #include "lpc17xx_clkpwr.h"
  38. /* If this source file built with example, the LPC17xx FW library configuration
  39. * file in each example directory ("lpc17xx_libcfg.h") must be included,
  40. * otherwise the default FW library configuration file must be included instead
  41. */
  42. #ifdef __BUILD_WITH_EXAMPLE__
  43. #include "lpc17xx_libcfg.h"
  44. #else
  45. #include "lpc17xx_libcfg_default.h"
  46. #endif /* __BUILD_WITH_EXAMPLE__ */
  47. #ifdef _SSP
  48. /* Public Functions ----------------------------------------------------------- */
  49. /** @addtogroup SSP_Public_Functions
  50. * @{
  51. */
  52. static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock);
  53. /*********************************************************************//**
  54. * @brief Setup clock rate for SSP device
  55. * @param[in] SSPx SSP peripheral definition, should be:
  56. * - LPC_SSP0: SSP0 peripheral
  57. * - LPC_SSP1: SSP1 peripheral
  58. * @param[in] target_clock : clock of SSP (Hz)
  59. * @return None
  60. ***********************************************************************/
  61. static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock)
  62. {
  63. uint32_t prescale, cr0_div, cmp_clk, ssp_clk;
  64. CHECK_PARAM(PARAM_SSPx(SSPx));
  65. /* The SSP clock is derived from the (main system oscillator / 2),
  66. so compute the best divider from that clock */
  67. if (SSPx == LPC_SSP0){
  68. ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP0);
  69. } else if (SSPx == LPC_SSP1) {
  70. ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP1);
  71. } else {
  72. return;
  73. }
  74. /* Find closest divider to get at or under the target frequency.
  75. Use smallest prescale possible and rely on the divider to get
  76. the closest target frequency */
  77. cr0_div = 0;
  78. cmp_clk = 0xFFFFFFFF;
  79. prescale = 2;
  80. while (cmp_clk > target_clock)
  81. {
  82. cmp_clk = ssp_clk / ((cr0_div + 1) * prescale);
  83. if (cmp_clk > target_clock)
  84. {
  85. cr0_div++;
  86. if (cr0_div > 0xFF)
  87. {
  88. cr0_div = 0;
  89. prescale += 2;
  90. }
  91. }
  92. }
  93. /* Write computed prescaler and divider back to register */
  94. SSPx->CR0 &= (~SSP_CR0_SCR(0xFF)) & SSP_CR0_BITMASK;
  95. SSPx->CR0 |= (SSP_CR0_SCR(cr0_div)) & SSP_CR0_BITMASK;
  96. SSPx->CPSR = prescale & SSP_CPSR_BITMASK;
  97. }
  98. /**
  99. * @}
  100. */
  101. /* Public Functions ----------------------------------------------------------- */
  102. /** @addtogroup SSP_Public_Functions
  103. * @{
  104. */
  105. /********************************************************************//**
  106. * @brief Initializes the SSPx peripheral according to the specified
  107. * parameters in the SSP_ConfigStruct.
  108. * @param[in] SSPx SSP peripheral selected, should be:
  109. * - LPC_SSP0: SSP0 peripheral
  110. * - LPC_SSP1: SSP1 peripheral
  111. * @param[in] SSP_ConfigStruct Pointer to a SSP_CFG_Type structure
  112. * that contains the configuration information for the
  113. * specified SSP peripheral.
  114. * @return None
  115. *********************************************************************/
  116. void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
  117. {
  118. uint32_t tmp;
  119. CHECK_PARAM(PARAM_SSPx(SSPx));
  120. if(SSPx == LPC_SSP0) {
  121. /* Set up clock and power for SSP0 module */
  122. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, ENABLE);
  123. } else if(SSPx == LPC_SSP1) {
  124. /* Set up clock and power for SSP1 module */
  125. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, ENABLE);
  126. } else {
  127. return;
  128. }
  129. /* Configure SSP, interrupt is disable, LoopBack mode is disable,
  130. * SSP is disable, Slave output is disable as default
  131. */
  132. tmp = ((SSP_ConfigStruct->CPHA) | (SSP_ConfigStruct->CPOL) \
  133. | (SSP_ConfigStruct->FrameFormat) | (SSP_ConfigStruct->Databit))
  134. & SSP_CR0_BITMASK;
  135. // write back to SSP control register
  136. SSPx->CR0 = tmp;
  137. tmp = SSP_ConfigStruct->Mode & SSP_CR1_BITMASK;
  138. // Write back to CR1
  139. SSPx->CR1 = tmp;
  140. // Set clock rate for SSP peripheral
  141. setSSPclock(SSPx, SSP_ConfigStruct->ClockRate);
  142. }
  143. /*********************************************************************//**
  144. * @brief De-initializes the SSPx peripheral registers to their
  145. * default reset values.
  146. * @param[in] SSPx SSP peripheral selected, should be:
  147. * - LPC_SSP0: SSP0 peripheral
  148. * - LPC_SSP1: SSP1 peripheral
  149. * @return None
  150. **********************************************************************/
  151. void SSP_DeInit(LPC_SSP_TypeDef* SSPx)
  152. {
  153. CHECK_PARAM(PARAM_SSPx(SSPx));
  154. if (SSPx == LPC_SSP0){
  155. /* Set up clock and power for SSP0 module */
  156. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, DISABLE);
  157. } else if (SSPx == LPC_SSP1) {
  158. /* Set up clock and power for SSP1 module */
  159. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, DISABLE);
  160. }
  161. }
  162. /*****************************************************************************//**
  163. * @brief Get data size bit selected
  164. * @param[in] SSPx pointer to LPC_SSP_TypeDef structure, should be:
  165. * - LPC_SSP0: SSP0 peripheral
  166. * - LPC_SSP1: SSP1 peripheral
  167. * @return Data size, could be:
  168. * - SSP_DATABIT_4: 4 bit transfer
  169. * - SSP_DATABIT_5: 5 bit transfer
  170. * ...
  171. * - SSP_DATABIT_16: 16 bit transfer
  172. *******************************************************************************/
  173. uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx)
  174. {
  175. CHECK_PARAM(PARAM_SSPx(SSPx));
  176. return (SSPx->CR0 & (0xF));
  177. }
  178. /*****************************************************************************//**
  179. * @brief Fills each SSP_InitStruct member with its default value:
  180. * - CPHA = SSP_CPHA_FIRST
  181. * - CPOL = SSP_CPOL_HI
  182. * - ClockRate = 1000000
  183. * - Databit = SSP_DATABIT_8
  184. * - Mode = SSP_MASTER_MODE
  185. * - FrameFormat = SSP_FRAME_SSP
  186. * @param[in] SSP_InitStruct Pointer to a SSP_CFG_Type structure
  187. * which will be initialized.
  188. * @return None
  189. *******************************************************************************/
  190. void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct)
  191. {
  192. SSP_InitStruct->CPHA = SSP_CPHA_FIRST;
  193. SSP_InitStruct->CPOL = SSP_CPOL_HI;
  194. SSP_InitStruct->ClockRate = 1000000;
  195. SSP_InitStruct->Databit = SSP_DATABIT_8;
  196. SSP_InitStruct->Mode = SSP_MASTER_MODE;
  197. SSP_InitStruct->FrameFormat = SSP_FRAME_SPI;
  198. }
  199. /*********************************************************************//**
  200. * @brief Enable or disable SSP peripheral's operation
  201. * @param[in] SSPx SSP peripheral, should be:
  202. * - LPC_SSP0: SSP0 peripheral
  203. * - LPC_SSP1: SSP1 peripheral
  204. * @param[in] NewState New State of SSPx peripheral's operation
  205. * @return none
  206. **********************************************************************/
  207. void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
  208. {
  209. CHECK_PARAM(PARAM_SSPx(SSPx));
  210. CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
  211. if (NewState == ENABLE)
  212. {
  213. SSPx->CR1 |= SSP_CR1_SSP_EN;
  214. }
  215. else
  216. {
  217. SSPx->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK;
  218. }
  219. }
  220. /*********************************************************************//**
  221. * @brief Enable or disable Loop Back mode function in SSP peripheral
  222. * @param[in] SSPx SSP peripheral selected, should be:
  223. * - LPC_SSP0: SSP0 peripheral
  224. * - LPC_SSP1: SSP1 peripheral
  225. * @param[in] NewState New State of Loop Back mode, should be:
  226. * - ENABLE: Enable this function
  227. * - DISABLE: Disable this function
  228. * @return None
  229. **********************************************************************/
  230. void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
  231. {
  232. CHECK_PARAM(PARAM_SSPx(SSPx));
  233. CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
  234. if (NewState == ENABLE)
  235. {
  236. SSPx->CR1 |= SSP_CR1_LBM_EN;
  237. }
  238. else
  239. {
  240. SSPx->CR1 &= (~SSP_CR1_LBM_EN) & SSP_CR1_BITMASK;
  241. }
  242. }
  243. /*********************************************************************//**
  244. * @brief Enable or disable Slave Output function in SSP peripheral
  245. * @param[in] SSPx SSP peripheral selected, should be:
  246. * - LPC_SSP0: SSP0 peripheral
  247. * - LPC_SSP1: SSP1 peripheral
  248. * @param[in] NewState New State of Slave Output function, should be:
  249. * - ENABLE: Slave Output in normal operation
  250. * - DISABLE: Slave Output is disabled. This blocks
  251. * SSP controller from driving the transmit data
  252. * line (MISO)
  253. * Note: This function is available when SSP peripheral in Slave mode
  254. * @return None
  255. **********************************************************************/
  256. void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
  257. {
  258. CHECK_PARAM(PARAM_SSPx(SSPx));
  259. CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
  260. if (NewState == ENABLE)
  261. {
  262. SSPx->CR1 &= (~SSP_CR1_SO_DISABLE) & SSP_CR1_BITMASK;
  263. }
  264. else
  265. {
  266. SSPx->CR1 |= SSP_CR1_SO_DISABLE;
  267. }
  268. }
  269. /*********************************************************************//**
  270. * @brief Transmit a single data through SSPx peripheral
  271. * @param[in] SSPx SSP peripheral selected, should be:
  272. * - LPC_SSP0: SSP0 peripheral
  273. * - LPC_SSP1: SSP1 peripheral
  274. * @param[in] Data Data to transmit (must be 16 or 8-bit long,
  275. * this depend on SSP data bit number configured)
  276. * @return none
  277. **********************************************************************/
  278. void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data)
  279. {
  280. CHECK_PARAM(PARAM_SSPx(SSPx));
  281. SSPx->DR = SSP_DR_BITMASK(Data);
  282. }
  283. /*********************************************************************//**
  284. * @brief Receive a single data from SSPx peripheral
  285. * @param[in] SSPx SSP peripheral selected, should be
  286. * - LPC_SSP0: SSP0 peripheral
  287. * - LPC_SSP1: SSP1 peripheral
  288. * @return Data received (16-bit long)
  289. **********************************************************************/
  290. uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx)
  291. {
  292. CHECK_PARAM(PARAM_SSPx(SSPx));
  293. return ((uint16_t) (SSP_DR_BITMASK(SSPx->DR)));
  294. }
  295. /*********************************************************************//**
  296. * @brief SSP Read write data function
  297. * @param[in] SSPx Pointer to SSP peripheral, should be
  298. * - LPC_SSP0: SSP0 peripheral
  299. * - LPC_SSP1: SSP1 peripheral
  300. * @param[in] dataCfg Pointer to a SSP_DATA_SETUP_Type structure that
  301. * contains specified information about transmit
  302. * data configuration.
  303. * @param[in] xfType Transfer type, should be:
  304. * - SSP_TRANSFER_POLLING: Polling mode
  305. * - SSP_TRANSFER_INTERRUPT: Interrupt mode
  306. * @return Actual Data length has been transferred in polling mode.
  307. * In interrupt mode, always return (0)
  308. * Return (-1) if error.
  309. * Note: This function can be used in both master and slave mode.
  310. ***********************************************************************/
  311. int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \
  312. SSP_TRANSFER_Type xfType)
  313. {
  314. uint8_t *rdata8;
  315. uint8_t *wdata8;
  316. uint16_t *rdata16;
  317. uint16_t *wdata16;
  318. uint32_t stat;
  319. uint32_t tmp;
  320. int32_t dataword;
  321. dataCfg->rx_cnt = 0;
  322. dataCfg->tx_cnt = 0;
  323. dataCfg->status = 0;
  324. /* Clear all remaining data in RX FIFO */
  325. while (SSPx->SR & SSP_SR_RNE){
  326. tmp = (uint32_t) SSP_ReceiveData(SSPx);
  327. }
  328. // Clear status
  329. SSPx->ICR = SSP_ICR_BITMASK;
  330. if(SSP_GetDataSize(SSPx)>SSP_DATABIT_8)
  331. dataword = 1;
  332. else dataword = 0;
  333. // Polling mode ----------------------------------------------------------------------
  334. if (xfType == SSP_TRANSFER_POLLING){
  335. if (dataword == 0){
  336. rdata8 = (uint8_t *)dataCfg->rx_data;
  337. wdata8 = (uint8_t *)dataCfg->tx_data;
  338. } else {
  339. rdata16 = (uint16_t *)dataCfg->rx_data;
  340. wdata16 = (uint16_t *)dataCfg->tx_data;
  341. }
  342. while ((dataCfg->tx_cnt < dataCfg->length) || (dataCfg->rx_cnt < dataCfg->length)){
  343. if ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt < dataCfg->length)){
  344. // Write data to buffer
  345. if(dataCfg->tx_data == NULL){
  346. if (dataword == 0){
  347. SSP_SendData(SSPx, 0xFF);
  348. dataCfg->tx_cnt++;
  349. } else {
  350. SSP_SendData(SSPx, 0xFFFF);
  351. dataCfg->tx_cnt += 2;
  352. }
  353. } else {
  354. if (dataword == 0){
  355. SSP_SendData(SSPx, *wdata8);
  356. wdata8++;
  357. dataCfg->tx_cnt++;
  358. } else {
  359. SSP_SendData(SSPx, *wdata16);
  360. wdata16++;
  361. dataCfg->tx_cnt += 2;
  362. }
  363. }
  364. }
  365. // Check overrun error
  366. if ((stat = SSPx->RIS) & SSP_RIS_ROR){
  367. // save status and return
  368. dataCfg->status = stat | SSP_STAT_ERROR;
  369. return (-1);
  370. }
  371. // Check for any data available in RX FIFO
  372. while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){
  373. // Read data from SSP data
  374. tmp = SSP_ReceiveData(SSPx);
  375. // Store data to destination
  376. if (dataCfg->rx_data != NULL)
  377. {
  378. if (dataword == 0){
  379. *(rdata8) = (uint8_t) tmp;
  380. rdata8++;
  381. } else {
  382. *(rdata16) = (uint16_t) tmp;
  383. rdata16++;
  384. }
  385. }
  386. // Increase counter
  387. if (dataword == 0){
  388. dataCfg->rx_cnt++;
  389. } else {
  390. dataCfg->rx_cnt += 2;
  391. }
  392. }
  393. }
  394. // save status
  395. dataCfg->status = SSP_STAT_DONE;
  396. if (dataCfg->tx_data != NULL){
  397. return dataCfg->tx_cnt;
  398. } else if (dataCfg->rx_data != NULL){
  399. return dataCfg->rx_cnt;
  400. } else {
  401. return (0);
  402. }
  403. }
  404. // Interrupt mode ----------------------------------------------------------------------
  405. else if (xfType == SSP_TRANSFER_INTERRUPT){
  406. while ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt < dataCfg->length)){
  407. // Write data to buffer
  408. if(dataCfg->tx_data == NULL){
  409. if (dataword == 0){
  410. SSP_SendData(SSPx, 0xFF);
  411. dataCfg->tx_cnt++;
  412. } else {
  413. SSP_SendData(SSPx, 0xFFFF);
  414. dataCfg->tx_cnt += 2;
  415. }
  416. } else {
  417. if (dataword == 0){
  418. SSP_SendData(SSPx, (*(uint8_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
  419. dataCfg->tx_cnt++;
  420. } else {
  421. SSP_SendData(SSPx, (*(uint16_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
  422. dataCfg->tx_cnt += 2;
  423. }
  424. }
  425. // Check error
  426. if ((stat = SSPx->RIS) & SSP_RIS_ROR){
  427. // save status and return
  428. dataCfg->status = stat | SSP_STAT_ERROR;
  429. return (-1);
  430. }
  431. // Check for any data available in RX FIFO
  432. while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt < dataCfg->length)){
  433. // Read data from SSP data
  434. tmp = SSP_ReceiveData(SSPx);
  435. // Store data to destination
  436. if (dataCfg->rx_data != NULL)
  437. {
  438. if (dataword == 0){
  439. *(uint8_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint8_t) tmp;
  440. } else {
  441. *(uint16_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint16_t) tmp;
  442. }
  443. }
  444. // Increase counter
  445. if (dataword == 0){
  446. dataCfg->rx_cnt++;
  447. } else {
  448. dataCfg->rx_cnt += 2;
  449. }
  450. }
  451. }
  452. // If there more data to sent or receive
  453. if ((dataCfg->rx_cnt < dataCfg->length) || (dataCfg->tx_cnt < dataCfg->length)){
  454. // Enable all interrupt
  455. SSPx->IMSC = SSP_IMSC_BITMASK;
  456. } else {
  457. // Save status
  458. dataCfg->status = SSP_STAT_DONE;
  459. }
  460. return (0);
  461. }
  462. return (-1);
  463. }
  464. /*********************************************************************//**
  465. * @brief Checks whether the specified SSP status flag is set or not
  466. * @param[in] SSPx SSP peripheral selected, should be:
  467. * - LPC_SSP0: SSP0 peripheral
  468. * - LPC_SSP1: SSP1 peripheral
  469. * @param[in] FlagType Type of flag to check status, should be one
  470. * of following:
  471. * - SSP_STAT_TXFIFO_EMPTY: TX FIFO is empty
  472. * - SSP_STAT_TXFIFO_NOTFULL: TX FIFO is not full
  473. * - SSP_STAT_RXFIFO_NOTEMPTY: RX FIFO is not empty
  474. * - SSP_STAT_RXFIFO_FULL: RX FIFO is full
  475. * - SSP_STAT_BUSY: SSP peripheral is busy
  476. * @return New State of specified SSP status flag
  477. **********************************************************************/
  478. FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType)
  479. {
  480. CHECK_PARAM(PARAM_SSPx(SSPx));
  481. CHECK_PARAM(PARAM_SSP_STAT(FlagType));
  482. return ((SSPx->SR & FlagType) ? SET : RESET);
  483. }
  484. /*********************************************************************//**
  485. * @brief Enable or disable specified interrupt type in SSP peripheral
  486. * @param[in] SSPx SSP peripheral selected, should be:
  487. * - LPC_SSP0: SSP0 peripheral
  488. * - LPC_SSP1: SSP1 peripheral
  489. * @param[in] IntType Interrupt type in SSP peripheral, should be:
  490. * - SSP_INTCFG_ROR: Receive Overrun interrupt
  491. * - SSP_INTCFG_RT: Receive Time out interrupt
  492. * - SSP_INTCFG_RX: RX FIFO is at least half full interrupt
  493. * - SSP_INTCFG_TX: TX FIFO is at least half empty interrupt
  494. * @param[in] NewState New State of specified interrupt type, should be:
  495. * - ENABLE: Enable this interrupt type
  496. * - DISABLE: Disable this interrupt type
  497. * @return None
  498. * Note: We can enable/disable multi-interrupt type by OR multi value
  499. **********************************************************************/
  500. void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
  501. {
  502. CHECK_PARAM(PARAM_SSPx(SSPx));
  503. if (NewState == ENABLE)
  504. {
  505. SSPx->IMSC |= IntType;
  506. }
  507. else
  508. {
  509. SSPx->IMSC &= (~IntType) & SSP_IMSC_BITMASK;
  510. }
  511. }
  512. /*********************************************************************//**
  513. * @brief Check whether the specified Raw interrupt status flag is
  514. * set or not
  515. * @param[in] SSPx SSP peripheral selected, should be:
  516. * - LPC_SSP0: SSP0 peripheral
  517. * - LPC_SSP1: SSP1 peripheral
  518. * @param[in] RawIntType Raw Interrupt Type, should be:
  519. * - SSP_INTSTAT_RAW_ROR: Receive Overrun interrupt
  520. * - SSP_INTSTAT_RAW_RT: Receive Time out interrupt
  521. * - SSP_INTSTAT_RAW_RX: RX FIFO is at least half full interrupt
  522. * - SSP_INTSTAT_RAW_TX: TX FIFO is at least half empty interrupt
  523. * @return New State of specified Raw interrupt status flag in SSP peripheral
  524. * Note: Enabling/Disabling specified interrupt in SSP peripheral does not
  525. * effect to Raw Interrupt Status flag.
  526. **********************************************************************/
  527. IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
  528. {
  529. CHECK_PARAM(PARAM_SSPx(SSPx));
  530. CHECK_PARAM(PARAM_SSP_INTSTAT_RAW(RawIntType));
  531. return ((SSPx->RIS & RawIntType) ? SET : RESET);
  532. }
  533. /*********************************************************************//**
  534. * @brief Get Raw Interrupt Status register
  535. * @param[in] SSPx SSP peripheral selected, should be:
  536. * - LPC_SSP0: SSP0 peripheral
  537. * - LPC_SSP1: SSP1 peripheral
  538. * @return Raw Interrupt Status (RIS) register value
  539. **********************************************************************/
  540. uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx)
  541. {
  542. CHECK_PARAM(PARAM_SSPx(SSPx));
  543. return (SSPx->RIS);
  544. }
  545. /*********************************************************************//**
  546. * @brief Check whether the specified interrupt status flag is
  547. * set or not
  548. * @param[in] SSPx SSP peripheral selected, should be:
  549. * - LPC_SSP0: SSP0 peripheral
  550. * - LPC_SSP1: SSP1 peripheral
  551. * @param[in] IntType Raw Interrupt Type, should be:
  552. * - SSP_INTSTAT_ROR: Receive Overrun interrupt
  553. * - SSP_INTSTAT_RT: Receive Time out interrupt
  554. * - SSP_INTSTAT_RX: RX FIFO is at least half full interrupt
  555. * - SSP_INTSTAT_TX: TX FIFO is at least half empty interrupt
  556. * @return New State of specified interrupt status flag in SSP peripheral
  557. * Note: Enabling/Disabling specified interrupt in SSP peripheral effects
  558. * to Interrupt Status flag.
  559. **********************************************************************/
  560. IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
  561. {
  562. CHECK_PARAM(PARAM_SSPx(SSPx));
  563. CHECK_PARAM(PARAM_SSP_INTSTAT(IntType));
  564. return ((SSPx->MIS & IntType) ? SET :RESET);
  565. }
  566. /*********************************************************************//**
  567. * @brief Clear specified interrupt pending in SSP peripheral
  568. * @param[in] SSPx SSP peripheral selected, should be:
  569. * - LPC_SSP0: SSP0 peripheral
  570. * - LPC_SSP1: SSP1 peripheral
  571. * @param[in] IntType Interrupt pending to clear, should be:
  572. * - SSP_INTCLR_ROR: clears the "frame was received when
  573. * RxFIFO was full" interrupt.
  574. * - SSP_INTCLR_RT: clears the "Rx FIFO was not empty and
  575. * has not been read for a timeout period" interrupt.
  576. * @return None
  577. **********************************************************************/
  578. void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType)
  579. {
  580. CHECK_PARAM(PARAM_SSPx(SSPx));
  581. CHECK_PARAM(PARAM_SSP_INTCLR(IntType));
  582. SSPx->ICR = IntType;
  583. }
  584. /*********************************************************************//**
  585. * @brief Enable/Disable DMA function for SSP peripheral
  586. * @param[in] SSPx SSP peripheral selected, should be:
  587. * - LPC_SSP0: SSP0 peripheral
  588. * - LPC_SSP1: SSP1 peripheral
  589. * @param[in] DMAMode Type of DMA, should be:
  590. * - SSP_DMA_TX: DMA for the transmit FIFO
  591. * - SSP_DMA_RX: DMA for the Receive FIFO
  592. * @param[in] NewState New State of DMA function on SSP peripheral,
  593. * should be:
  594. * - ENALBE: Enable this function
  595. * - DISABLE: Disable this function
  596. * @return None
  597. **********************************************************************/
  598. void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
  599. {
  600. CHECK_PARAM(PARAM_SSPx(SSPx));
  601. CHECK_PARAM(PARAM_SSP_DMA(DMAMode));
  602. CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
  603. if (NewState == ENABLE)
  604. {
  605. SSPx->DMACR |= DMAMode;
  606. }
  607. else
  608. {
  609. SSPx->DMACR &= (~DMAMode) & SSP_DMA_BITMASK;
  610. }
  611. }
  612. /**
  613. * @}
  614. */
  615. #endif /* _SSP */
  616. /**
  617. * @}
  618. */
  619. /* --------------------------------- End Of File ------------------------------ */