My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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variant.cpp 5.2KB

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  1. /*
  2. Copyright (c) 2011 Arduino. All right reserved.
  3. This library is free software; you can redistribute it and/or
  4. modify it under the terms of the GNU Lesser General Public
  5. License as published by the Free Software Foundation; either
  6. version 2.1 of the License, or (at your option) any later version.
  7. This library is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  10. See the GNU Lesser General Public License for more details.
  11. You should have received a copy of the GNU Lesser General Public
  12. License along with this library; if not, write to the Free Software
  13. Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  14. */
  15. #include "pins_arduino.h"
  16. #ifdef __cplusplus
  17. extern "C" {
  18. #endif
  19. // Pin number
  20. const PinName digitalPin[] = {
  21. PA_0, //D0
  22. PA_1, //D1
  23. PA_2, //D2
  24. PA_3, //D3
  25. PA_4, //D4
  26. PA_5, //D5
  27. PA_6, //D6
  28. PA_7, //D7
  29. PA_8, //D8
  30. PA_9, //D9
  31. PA_10, //D10
  32. PA_11, //D11
  33. PA_12, //D12
  34. PA_13, //D13
  35. PA_14, //D14
  36. PA_15, //D15
  37. PB_0, //D16
  38. PB_1, //D17
  39. PB_2, //D18
  40. PB_3, //D19
  41. PB_4, //D20
  42. PB_5, //D21
  43. PB_6, //D22
  44. PB_7, //D23
  45. PB_8, //D24
  46. PB_9, //D25
  47. PB_10, //D26
  48. PB_11, //D27
  49. PB_12, //D28
  50. PB_13, //D29
  51. PB_14, //D30
  52. PB_15, //D31
  53. PC_0, //D32
  54. PC_1, //D33
  55. PC_2, //D34
  56. PC_3, //D35
  57. PC_4, //D36
  58. PC_5, //D37
  59. PC_6, //D38
  60. PC_7, //D39
  61. PC_8, //D40
  62. PC_9, //D41
  63. PC_10, //D42
  64. PC_11, //D43
  65. PC_12, //D44
  66. PC_13, //D45
  67. PC_14, //D46
  68. PC_15, //D47
  69. PD_0, //D48
  70. PD_1, //D49
  71. PD_2, //D50
  72. PD_3, //D51
  73. PD_4, //D52
  74. PD_5, //D53
  75. PD_6, //D54
  76. PD_7, //D55
  77. PD_8, //D56
  78. PD_9, //D57
  79. PD_10, //D58
  80. PD_11, //D59
  81. PD_12, //D60
  82. PD_13, //D61
  83. PD_14, //D62
  84. PD_15, //D63
  85. PE_0, //D64
  86. PE_1, //D65
  87. PE_2, //D66
  88. PE_3, //D67
  89. PE_4, //D68
  90. PE_5, //D69
  91. PE_6, //D70
  92. PE_7, //D71
  93. PE_8, //D72
  94. PE_9, //D73
  95. PE_10, //D74
  96. PE_11, //D75
  97. PE_12, //D76
  98. PE_13, //D77
  99. PE_14, //D78
  100. PE_15, //D79
  101. //Duplicated ADC Pins
  102. PA_3, //D80/A0
  103. PA_4, //D81/A1
  104. PC_0, //D82/A2
  105. PC_1, //D83/A3
  106. PC_2, //D84/A4
  107. PC_3, //D85/A5
  108. PC_4 //D86/A6
  109. };
  110. #ifdef __cplusplus
  111. }
  112. #endif
  113. // ----------------------------------------------------------------------------
  114. #ifdef __cplusplus
  115. extern "C" {
  116. #endif
  117. /**
  118. * @brief System Clock Configuration
  119. * The system Clock is configured as follow :
  120. * System Clock source = PLL (HSE)
  121. * SYSCLK(Hz) = 180000000
  122. * HCLK(Hz) = 180000000
  123. * AHB Prescaler = 1
  124. * APB1 Prescaler = 4
  125. * APB2 Prescaler = 2
  126. * HSE Frequency(Hz) = 12000000
  127. * PLL_M = 6
  128. * PLL_N = 180
  129. * PLL_P = 2
  130. * PLL_Q = 7
  131. * VDD(V) = 3.3
  132. * Main regulator output voltage = Scale1 mode
  133. * Flash Latency(WS) = 5
  134. * @param None
  135. * @retval None
  136. */
  137. WEAK void SystemClock_Config(void)
  138. {
  139. RCC_ClkInitTypeDef RCC_ClkInitStruct;
  140. RCC_OscInitTypeDef RCC_OscInitStruct;
  141. RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
  142. /* Enable Power Control clock */
  143. __HAL_RCC_PWR_CLK_ENABLE();
  144. #ifdef HAL_PWR_MODULE_ENABLED
  145. /* The voltage scaling allows optimizing the power consumption when the device is
  146. clocked below the maximum system frequency, to update the voltage scaling value
  147. regarding system frequency refer to product datasheet. */
  148. __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  149. #endif
  150. /* Enable HSE Oscillator and activate PLL with HSE as source */
  151. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  152. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  153. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  154. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  155. RCC_OscInitStruct.PLL.PLLM = 6;
  156. RCC_OscInitStruct.PLL.PLLN = 180;
  157. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  158. RCC_OscInitStruct.PLL.PLLQ = 7;
  159. RCC_OscInitStruct.PLL.PLLR = 2;
  160. HAL_RCC_OscConfig(&RCC_OscInitStruct);
  161. HAL_PWREx_EnableOverDrive();
  162. /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
  163. clocks dividers */
  164. RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
  165. RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
  166. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLRCLK;
  167. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  168. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
  169. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
  170. HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
  171. PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
  172. PeriphClkInitStruct.PLLSAI.PLLSAIM = 6;
  173. PeriphClkInitStruct.PLLSAI.PLLSAIN = 96;
  174. PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
  175. PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
  176. PeriphClkInitStruct.PLLSAIDivQ = 1;
  177. PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
  178. HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
  179. }
  180. #ifdef __cplusplus
  181. }
  182. #endif