My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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SPI.cpp 26KB

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  1. /******************************************************************************
  2. * The MIT License
  3. *
  4. * Copyright (c) 2010 Perry Hung.
  5. *
  6. * Permission is hereby granted, free of charge, to any person
  7. * obtaining a copy of this software and associated documentation
  8. * files (the "Software"), to deal in the Software without
  9. * restriction, including without limitation the rights to use, copy,
  10. * modify, merge, publish, distribute, sublicense, and/or sell copies
  11. * of the Software, and to permit persons to whom the Software is
  12. * furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be
  15. * included in all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  20. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  21. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  22. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  23. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  24. * SOFTWARE.
  25. *****************************************************************************/
  26. /**
  27. * @author Marti Bolivar <mbolivar@leaflabs.com>
  28. * @brief Wirish SPI implementation.
  29. */
  30. #ifdef __STM32F1__
  31. #include <SPI.h>
  32. #include <libmaple/timer.h>
  33. #include <libmaple/util.h>
  34. #include <libmaple/rcc.h>
  35. #include <boards.h>
  36. #include <wirish.h>
  37. #include "../../inc/MarlinConfig.h"
  38. #include "spi_pins.h"
  39. /** Time in ms for DMA receive timeout */
  40. #define DMA_TIMEOUT 100
  41. #if CYCLES_PER_MICROSECOND != 72
  42. #warning "Unexpected clock speed; SPI frequency calculation will be incorrect"
  43. #endif
  44. struct spi_pins { uint8_t nss, sck, miso, mosi; };
  45. static const spi_pins* dev_to_spi_pins(spi_dev *dev);
  46. static void configure_gpios(spi_dev *dev, bool as_master);
  47. static spi_baud_rate determine_baud_rate(spi_dev *dev, uint32_t freq);
  48. #if BOARD_NR_SPI >= 3 && !defined(STM32_HIGH_DENSITY)
  49. #error "The SPI library is misconfigured: 3 SPI ports only available on high density STM32 devices"
  50. #endif
  51. static const spi_pins board_spi_pins[] __FLASH__ = {
  52. #if BOARD_NR_SPI >= 1
  53. { BOARD_SPI1_NSS_PIN,
  54. BOARD_SPI1_SCK_PIN,
  55. BOARD_SPI1_MISO_PIN,
  56. BOARD_SPI1_MOSI_PIN },
  57. #endif
  58. #if BOARD_NR_SPI >= 2
  59. { BOARD_SPI2_NSS_PIN,
  60. BOARD_SPI2_SCK_PIN,
  61. BOARD_SPI2_MISO_PIN,
  62. BOARD_SPI2_MOSI_PIN },
  63. #endif
  64. #if BOARD_NR_SPI >= 3
  65. { BOARD_SPI3_NSS_PIN,
  66. BOARD_SPI3_SCK_PIN,
  67. BOARD_SPI3_MISO_PIN,
  68. BOARD_SPI3_MOSI_PIN },
  69. #endif
  70. };
  71. #if BOARD_NR_SPI >= 1
  72. static void *_spi1_this;
  73. #endif
  74. #if BOARD_NR_SPI >= 2
  75. static void *_spi2_this;
  76. #endif
  77. #if BOARD_NR_SPI >= 3
  78. static void *_spi3_this;
  79. #endif
  80. /**
  81. * Constructor
  82. */
  83. SPIClass::SPIClass(uint32_t spi_num) {
  84. _currentSetting = &_settings[spi_num - 1]; // SPI channels are called 1 2 and 3 but the array is zero indexed
  85. switch (spi_num) {
  86. #if BOARD_NR_SPI >= 1
  87. case 1:
  88. _currentSetting->spi_d = SPI1;
  89. _spi1_this = (void*)this;
  90. break;
  91. #endif
  92. #if BOARD_NR_SPI >= 2
  93. case 2:
  94. _currentSetting->spi_d = SPI2;
  95. _spi2_this = (void*)this;
  96. break;
  97. #endif
  98. #if BOARD_NR_SPI >= 3
  99. case 3:
  100. _currentSetting->spi_d = SPI3;
  101. _spi3_this = (void*)this;
  102. break;
  103. #endif
  104. default: ASSERT(0);
  105. }
  106. // Init things specific to each SPI device
  107. // clock divider setup is a bit of hack, and needs to be improved at a later date.
  108. #if BOARD_NR_SPI >= 1
  109. _settings[0].spi_d = SPI1;
  110. _settings[0].clockDivider = determine_baud_rate(_settings[0].spi_d, _settings[0].clock);
  111. _settings[0].spiDmaDev = DMA1;
  112. _settings[0].spiTxDmaChannel = DMA_CH3;
  113. _settings[0].spiRxDmaChannel = DMA_CH2;
  114. #endif
  115. #if BOARD_NR_SPI >= 2
  116. _settings[1].spi_d = SPI2;
  117. _settings[1].clockDivider = determine_baud_rate(_settings[1].spi_d, _settings[1].clock);
  118. _settings[1].spiDmaDev = DMA1;
  119. _settings[1].spiTxDmaChannel = DMA_CH5;
  120. _settings[1].spiRxDmaChannel = DMA_CH4;
  121. #endif
  122. #if BOARD_NR_SPI >= 3
  123. _settings[2].spi_d = SPI3;
  124. _settings[2].clockDivider = determine_baud_rate(_settings[2].spi_d, _settings[2].clock);
  125. _settings[2].spiDmaDev = DMA2;
  126. _settings[2].spiTxDmaChannel = DMA_CH2;
  127. _settings[2].spiRxDmaChannel = DMA_CH1;
  128. #endif
  129. // added for DMA callbacks.
  130. _currentSetting->state = SPI_STATE_IDLE;
  131. }
  132. SPIClass::SPIClass(int8_t mosi, int8_t miso, int8_t sclk, int8_t ssel) {
  133. #if BOARD_NR_SPI >= 1
  134. if (mosi == BOARD_SPI1_MOSI_PIN) SPIClass(1);
  135. #endif
  136. #if BOARD_NR_SPI >= 2
  137. if (mosi == BOARD_SPI2_MOSI_PIN) SPIClass(2);
  138. #endif
  139. #if BOARD_NR_SPI >= 3
  140. if (mosi == BOARD_SPI3_MOSI_PIN) SPIClass(3);
  141. #endif
  142. }
  143. /**
  144. * Set up/tear down
  145. */
  146. void SPIClass::updateSettings() {
  147. uint32_t flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_SW_SLAVE | SPI_SOFT_SS);
  148. spi_master_enable(_currentSetting->spi_d, (spi_baud_rate)_currentSetting->clockDivider, (spi_mode)_currentSetting->dataMode, flags);
  149. }
  150. void SPIClass::begin() {
  151. spi_init(_currentSetting->spi_d);
  152. configure_gpios(_currentSetting->spi_d, 1);
  153. updateSettings();
  154. // added for DMA callbacks.
  155. _currentSetting->state = SPI_STATE_READY;
  156. }
  157. void SPIClass::beginSlave() {
  158. spi_init(_currentSetting->spi_d);
  159. configure_gpios(_currentSetting->spi_d, 0);
  160. uint32_t flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize);
  161. spi_slave_enable(_currentSetting->spi_d, (spi_mode)_currentSetting->dataMode, flags);
  162. // added for DMA callbacks.
  163. _currentSetting->state = SPI_STATE_READY;
  164. }
  165. void SPIClass::end() {
  166. if (!spi_is_enabled(_currentSetting->spi_d)) return;
  167. // Follows RM0008's sequence for disabling a SPI in master/slave
  168. // full duplex mode.
  169. while (spi_is_rx_nonempty(_currentSetting->spi_d)) {
  170. // FIXME [0.1.0] remove this once you have an interrupt based driver
  171. volatile uint16_t rx __attribute__((unused)) = spi_rx_reg(_currentSetting->spi_d);
  172. }
  173. waitSpiTxEnd(_currentSetting->spi_d);
  174. spi_peripheral_disable(_currentSetting->spi_d);
  175. // added for DMA callbacks.
  176. // Need to add unsetting the callbacks for the DMA channels.
  177. _currentSetting->state = SPI_STATE_IDLE;
  178. }
  179. /* Roger Clark added 3 functions */
  180. void SPIClass::setClockDivider(uint32_t clockDivider) {
  181. _currentSetting->clockDivider = clockDivider;
  182. uint32_t cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_BR);
  183. _currentSetting->spi_d->regs->CR1 = cr1 | (clockDivider & SPI_CR1_BR);
  184. }
  185. void SPIClass::setBitOrder(BitOrder bitOrder) {
  186. _currentSetting->bitOrder = bitOrder;
  187. uint32_t cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_LSBFIRST);
  188. if (bitOrder == LSBFIRST) cr1 |= SPI_CR1_LSBFIRST;
  189. _currentSetting->spi_d->regs->CR1 = cr1;
  190. }
  191. /**
  192. * Victor Perez. Added to test changing datasize from 8 to 16 bit modes on the fly.
  193. * Input parameter should be SPI_CR1_DFF set to 0 or 1 on a 32bit word.
  194. */
  195. void SPIClass::setDataSize(uint32_t datasize) {
  196. _currentSetting->dataSize = datasize;
  197. uint32_t cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_DFF);
  198. uint8_t en = spi_is_enabled(_currentSetting->spi_d);
  199. spi_peripheral_disable(_currentSetting->spi_d);
  200. _currentSetting->spi_d->regs->CR1 = cr1 | (datasize & SPI_CR1_DFF) | en;
  201. }
  202. void SPIClass::setDataMode(uint8_t dataMode) {
  203. /**
  204. * Notes:
  205. * As far as we know the AVR numbers for dataMode match the numbers required by the STM32.
  206. * From the AVR doc https://www.atmel.com/images/doc2585.pdf section 2.4
  207. *
  208. * SPI Mode CPOL CPHA Shift SCK-edge Capture SCK-edge
  209. * 0 0 0 Falling Rising
  210. * 1 0 1 Rising Falling
  211. * 2 1 0 Rising Falling
  212. * 3 1 1 Falling Rising
  213. *
  214. * On the STM32 it appears to be
  215. *
  216. * bit 1 - CPOL : Clock polarity
  217. * (This bit should not be changed when communication is ongoing)
  218. * 0 : CLK to 0 when idle
  219. * 1 : CLK to 1 when idle
  220. *
  221. * bit 0 - CPHA : Clock phase
  222. * (This bit should not be changed when communication is ongoing)
  223. * 0 : The first clock transition is the first data capture edge
  224. * 1 : The second clock transition is the first data capture edge
  225. *
  226. * If someone finds this is not the case or sees a logic error with this let me know ;-)
  227. */
  228. _currentSetting->dataMode = dataMode;
  229. uint32_t cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_CPOL|SPI_CR1_CPHA);
  230. _currentSetting->spi_d->regs->CR1 = cr1 | (dataMode & (SPI_CR1_CPOL|SPI_CR1_CPHA));
  231. }
  232. void SPIClass::beginTransaction(uint8_t pin, const SPISettings &settings) {
  233. setBitOrder(settings.bitOrder);
  234. setDataMode(settings.dataMode);
  235. setDataSize(settings.dataSize);
  236. setClockDivider(determine_baud_rate(_currentSetting->spi_d, settings.clock));
  237. begin();
  238. }
  239. void SPIClass::beginTransactionSlave(const SPISettings &settings) {
  240. setBitOrder(settings.bitOrder);
  241. setDataMode(settings.dataMode);
  242. setDataSize(settings.dataSize);
  243. beginSlave();
  244. }
  245. void SPIClass::endTransaction() { }
  246. /**
  247. * I/O
  248. */
  249. uint16_t SPIClass::read() {
  250. while (!spi_is_rx_nonempty(_currentSetting->spi_d)) { /* nada */ }
  251. return (uint16_t)spi_rx_reg(_currentSetting->spi_d);
  252. }
  253. void SPIClass::read(uint8_t *buf, uint32_t len) {
  254. if (len == 0) return;
  255. spi_rx_reg(_currentSetting->spi_d); // clear the RX buffer in case a byte is waiting on it.
  256. spi_reg_map * regs = _currentSetting->spi_d->regs;
  257. // start sequence: write byte 0
  258. regs->DR = 0x00FF; // write the first byte
  259. // main loop
  260. while (--len) {
  261. while (!(regs->SR & SPI_SR_TXE)) { /* nada */ } // wait for TXE flag
  262. noInterrupts(); // go atomic level - avoid interrupts to surely get the previously received data
  263. regs->DR = 0x00FF; // write the next data item to be transmitted into the SPI_DR register. This clears the TXE flag.
  264. while (!(regs->SR & SPI_SR_RXNE)) { /* nada */ } // wait till data is available in the DR register
  265. *buf++ = (uint8)(regs->DR); // read and store the received byte. This clears the RXNE flag.
  266. interrupts(); // let systick do its job
  267. }
  268. // read remaining last byte
  269. while (!(regs->SR & SPI_SR_RXNE)) { /* nada */ } // wait till data is available in the Rx register
  270. *buf++ = (uint8)(regs->DR); // read and store the received byte
  271. }
  272. void SPIClass::write(uint16_t data) {
  273. /* Added for 16bit data Victor Perez. Roger Clark
  274. * Improved speed by just directly writing the single byte to the SPI data reg and wait for completion,
  275. * by taking the Tx code from transfer(byte)
  276. * This almost doubles the speed of this function.
  277. */
  278. spi_tx_reg(_currentSetting->spi_d, data); // write the data to be transmitted into the SPI_DR register (this clears the TXE flag)
  279. waitSpiTxEnd(_currentSetting->spi_d);
  280. }
  281. void SPIClass::write16(uint16_t data) {
  282. // Added by stevestrong: write two consecutive bytes in 8 bit mode (DFF=0)
  283. spi_tx_reg(_currentSetting->spi_d, data>>8); // write high byte
  284. while (!spi_is_tx_empty(_currentSetting->spi_d)) { /* nada */ } // Wait until TXE=1
  285. spi_tx_reg(_currentSetting->spi_d, data); // write low byte
  286. waitSpiTxEnd(_currentSetting->spi_d);
  287. }
  288. void SPIClass::write(uint16_t data, uint32_t n) {
  289. // Added by stevstrong: Repeatedly send same data by the specified number of times
  290. spi_reg_map * regs = _currentSetting->spi_d->regs;
  291. while (n--) {
  292. regs->DR = data; // write the data to be transmitted into the SPI_DR register (this clears the TXE flag)
  293. while (!(regs->SR & SPI_SR_TXE)) { /* nada */ } // wait till Tx empty
  294. }
  295. while (regs->SR & SPI_SR_BSY) { /* nada */ } // wait until BSY=0 before returning
  296. }
  297. void SPIClass::write(const void *data, uint32_t length) {
  298. spi_dev * spi_d = _currentSetting->spi_d;
  299. spi_tx(spi_d, data, length); // data can be array of bytes or words
  300. waitSpiTxEnd(spi_d);
  301. }
  302. uint8_t SPIClass::transfer(uint8_t byte) const {
  303. spi_dev * spi_d = _currentSetting->spi_d;
  304. spi_rx_reg(spi_d); // read any previous data
  305. spi_tx_reg(spi_d, byte); // Write the data item to be transmitted into the SPI_DR register
  306. waitSpiTxEnd(spi_d);
  307. return (uint8)spi_rx_reg(spi_d); // "... and read the last received data."
  308. }
  309. uint16_t SPIClass::transfer16(uint16_t data) const {
  310. // Modified by stevestrong: write & read two consecutive bytes in 8 bit mode (DFF=0)
  311. // This is more effective than two distinct byte transfers
  312. spi_dev * spi_d = _currentSetting->spi_d;
  313. spi_rx_reg(spi_d); // read any previous data
  314. spi_tx_reg(spi_d, data>>8); // write high byte
  315. waitSpiTxEnd(spi_d); // wait until TXE=1 and then wait until BSY=0
  316. uint16_t ret = spi_rx_reg(spi_d)<<8; // read and shift high byte
  317. spi_tx_reg(spi_d, data); // write low byte
  318. waitSpiTxEnd(spi_d); // wait until TXE=1 and then wait until BSY=0
  319. ret += spi_rx_reg(spi_d); // read low byte
  320. return ret;
  321. }
  322. /**
  323. * Roger Clark and Victor Perez, 2015
  324. * Performs a DMA SPI transfer with at least a receive buffer.
  325. * If a TX buffer is not provided, FF is sent over and over for the lenght of the transfer.
  326. * On exit TX buffer is not modified, and RX buffer cotains the received data.
  327. * Still in progress.
  328. */
  329. void SPIClass::dmaTransferSet(const void *transmitBuf, void *receiveBuf) {
  330. dma_init(_currentSetting->spiDmaDev);
  331. //spi_rx_dma_enable(_currentSetting->spi_d);
  332. //spi_tx_dma_enable(_currentSetting->spi_d);
  333. dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
  334. dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR,
  335. dma_bit_size, receiveBuf, dma_bit_size, (DMA_MINC_MODE | DMA_TRNS_CMPLT ));// receive buffer DMA
  336. if (!transmitBuf) {
  337. transmitBuf = &ff;
  338. dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR,
  339. dma_bit_size, (volatile void*)transmitBuf, dma_bit_size, (DMA_FROM_MEM));// Transmit FF repeatedly
  340. }
  341. else {
  342. dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR,
  343. dma_bit_size, (volatile void*)transmitBuf, dma_bit_size, (DMA_MINC_MODE | DMA_FROM_MEM ));// Transmit buffer DMA
  344. }
  345. dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW);
  346. dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, DMA_PRIORITY_VERY_HIGH);
  347. }
  348. uint8_t SPIClass::dmaTransferRepeat(uint16_t length) {
  349. if (length == 0) return 0;
  350. if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) spi_rx_reg(_currentSetting->spi_d);
  351. _currentSetting->state = SPI_STATE_TRANSFER;
  352. dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length);
  353. dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
  354. dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive
  355. dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
  356. spi_rx_dma_enable(_currentSetting->spi_d);
  357. spi_tx_dma_enable(_currentSetting->spi_d);
  358. if (_currentSetting->receiveCallback)
  359. return 0;
  360. //uint32_t m = millis();
  361. uint8_t b = 0;
  362. uint32_t m = millis();
  363. while (!(dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)) {
  364. // Avoid interrupts and just loop waiting for the flag to be set.
  365. if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
  366. }
  367. waitSpiTxEnd(_currentSetting->spi_d); // until TXE=1 and BSY=0
  368. spi_tx_dma_disable(_currentSetting->spi_d);
  369. spi_rx_dma_disable(_currentSetting->spi_d);
  370. dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  371. dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
  372. dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
  373. dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  374. _currentSetting->state = SPI_STATE_READY;
  375. return b;
  376. }
  377. /**
  378. * Roger Clark and Victor Perez, 2015
  379. * Performs a DMA SPI transfer with at least a receive buffer.
  380. * If a TX buffer is not provided, FF is sent over and over for the length of the transfer.
  381. * On exit TX buffer is not modified, and RX buffer contains the received data.
  382. * Still in progress.
  383. */
  384. uint8_t SPIClass::dmaTransfer(const void *transmitBuf, void *receiveBuf, uint16_t length) {
  385. dmaTransferSet(transmitBuf, receiveBuf);
  386. return dmaTransferRepeat(length);
  387. }
  388. /**
  389. * Roger Clark and Victor Perez, 2015
  390. * Performs a DMA SPI send using a TX buffer.
  391. * On exit TX buffer is not modified.
  392. * Still in progress.
  393. * 2016 - stevstrong - reworked to automatically detect bit size from SPI setting
  394. */
  395. void SPIClass::dmaSendSet(const void * transmitBuf, bool minc) {
  396. uint32_t flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
  397. dma_init(_currentSetting->spiDmaDev);
  398. dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
  399. dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
  400. (volatile void*)transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
  401. dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW);
  402. }
  403. uint8_t SPIClass::dmaSendRepeat(uint16_t length) {
  404. if (length == 0) return 0;
  405. dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  406. dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
  407. _currentSetting->state = SPI_STATE_TRANSMIT;
  408. dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel); // enable transmit
  409. spi_tx_dma_enable(_currentSetting->spi_d);
  410. if (_currentSetting->transmitCallback) return 0;
  411. uint32_t m = millis();
  412. uint8_t b = 0;
  413. while (!(dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)) {
  414. // Avoid interrupts and just loop waiting for the flag to be set.
  415. if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
  416. }
  417. waitSpiTxEnd(_currentSetting->spi_d); // until TXE=1 and BSY=0
  418. spi_tx_dma_disable(_currentSetting->spi_d);
  419. dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  420. dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  421. _currentSetting->state = SPI_STATE_READY;
  422. return b;
  423. }
  424. uint8_t SPIClass::dmaSend(const void * transmitBuf, uint16_t length, bool minc) {
  425. dmaSendSet(transmitBuf, minc);
  426. return dmaSendRepeat(length);
  427. }
  428. uint8_t SPIClass::dmaSendAsync(const void * transmitBuf, uint16_t length, bool minc) {
  429. uint8_t b = 0;
  430. if (_currentSetting->state != SPI_STATE_READY) {
  431. uint32_t m = millis();
  432. while (!(dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)) {
  433. //Avoid interrupts and just loop waiting for the flag to be set.
  434. //delayMicroseconds(10);
  435. if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
  436. }
  437. waitSpiTxEnd(_currentSetting->spi_d); // until TXE=1 and BSY=0
  438. spi_tx_dma_disable(_currentSetting->spi_d);
  439. dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  440. _currentSetting->state = SPI_STATE_READY;
  441. }
  442. if (length == 0) return 0;
  443. uint32_t flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
  444. dma_init(_currentSetting->spiDmaDev);
  445. // TX
  446. dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
  447. dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR,
  448. dma_bit_size, (volatile void*)transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
  449. dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
  450. dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  451. dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
  452. spi_tx_dma_enable(_currentSetting->spi_d);
  453. _currentSetting->state = SPI_STATE_TRANSMIT;
  454. return b;
  455. }
  456. /**
  457. * New functions added to manage callbacks.
  458. * Victor Perez 2017
  459. */
  460. void SPIClass::onReceive(void(*callback)()) {
  461. _currentSetting->receiveCallback = callback;
  462. if (callback) {
  463. switch (_currentSetting->spi_d->clk_id) {
  464. #if BOARD_NR_SPI >= 1
  465. case RCC_SPI1:
  466. dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi1EventCallback);
  467. break;
  468. #endif
  469. #if BOARD_NR_SPI >= 2
  470. case RCC_SPI2:
  471. dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi2EventCallback);
  472. break;
  473. #endif
  474. #if BOARD_NR_SPI >= 3
  475. case RCC_SPI3:
  476. dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi3EventCallback);
  477. break;
  478. #endif
  479. default:
  480. ASSERT(0);
  481. }
  482. }
  483. else {
  484. dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
  485. }
  486. }
  487. void SPIClass::onTransmit(void(*callback)()) {
  488. _currentSetting->transmitCallback = callback;
  489. if (callback) {
  490. switch (_currentSetting->spi_d->clk_id) {
  491. #if BOARD_NR_SPI >= 1
  492. case RCC_SPI1:
  493. dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi1EventCallback);
  494. break;
  495. #endif
  496. #if BOARD_NR_SPI >= 2
  497. case RCC_SPI2:
  498. dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi2EventCallback);
  499. break;
  500. #endif
  501. #if BOARD_NR_SPI >= 3
  502. case RCC_SPI3:
  503. dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi3EventCallback);
  504. break;
  505. #endif
  506. default:
  507. ASSERT(0);
  508. }
  509. }
  510. else {
  511. dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  512. }
  513. }
  514. /**
  515. * TODO: check if better to first call the customer code, next disable the DMA requests.
  516. * Also see if we need to check whether callbacks are set or not, may be better to be checked
  517. * during the initial setup and only set the callback to EventCallback if they are set.
  518. */
  519. void SPIClass::EventCallback() {
  520. waitSpiTxEnd(_currentSetting->spi_d);
  521. switch (_currentSetting->state) {
  522. case SPI_STATE_TRANSFER:
  523. while (spi_is_rx_nonempty(_currentSetting->spi_d)) { /* nada */ }
  524. _currentSetting->state = SPI_STATE_READY;
  525. spi_tx_dma_disable(_currentSetting->spi_d);
  526. spi_rx_dma_disable(_currentSetting->spi_d);
  527. //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  528. //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
  529. if (_currentSetting->receiveCallback)
  530. _currentSetting->receiveCallback();
  531. break;
  532. case SPI_STATE_TRANSMIT:
  533. _currentSetting->state = SPI_STATE_READY;
  534. spi_tx_dma_disable(_currentSetting->spi_d);
  535. //dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
  536. if (_currentSetting->transmitCallback)
  537. _currentSetting->transmitCallback();
  538. break;
  539. default:
  540. break;
  541. }
  542. }
  543. void SPIClass::attachInterrupt() {
  544. // Should be enableInterrupt()
  545. }
  546. void SPIClass::detachInterrupt() {
  547. // Should be disableInterrupt()
  548. }
  549. /**
  550. * Pin accessors
  551. */
  552. uint8_t SPIClass::misoPin() {
  553. return dev_to_spi_pins(_currentSetting->spi_d)->miso;
  554. }
  555. uint8_t SPIClass::mosiPin() {
  556. return dev_to_spi_pins(_currentSetting->spi_d)->mosi;
  557. }
  558. uint8_t SPIClass::sckPin() {
  559. return dev_to_spi_pins(_currentSetting->spi_d)->sck;
  560. }
  561. uint8_t SPIClass::nssPin() {
  562. return dev_to_spi_pins(_currentSetting->spi_d)->nss;
  563. }
  564. /**
  565. * Deprecated functions
  566. */
  567. uint8_t SPIClass::send(uint8_t data) { write(data); return 1; }
  568. uint8_t SPIClass::send(uint8_t *buf, uint32_t len) { write(buf, len); return len; }
  569. uint8_t SPIClass::recv() { return read(); }
  570. /**
  571. * DMA call back functions, one per port.
  572. */
  573. #if BOARD_NR_SPI >= 1
  574. void SPIClass::_spi1EventCallback() {
  575. reinterpret_cast<class SPIClass*>(_spi1_this)->EventCallback();
  576. }
  577. #endif
  578. #if BOARD_NR_SPI >= 2
  579. void SPIClass::_spi2EventCallback() {
  580. reinterpret_cast<class SPIClass*>(_spi2_this)->EventCallback();
  581. }
  582. #endif
  583. #if BOARD_NR_SPI >= 3
  584. void SPIClass::_spi3EventCallback() {
  585. reinterpret_cast<class SPIClass*>(_spi3_this)->EventCallback();
  586. }
  587. #endif
  588. /**
  589. * Auxiliary functions
  590. */
  591. static const spi_pins* dev_to_spi_pins(spi_dev *dev) {
  592. switch (dev->clk_id) {
  593. #if BOARD_NR_SPI >= 1
  594. case RCC_SPI1: return board_spi_pins;
  595. #endif
  596. #if BOARD_NR_SPI >= 2
  597. case RCC_SPI2: return board_spi_pins + 1;
  598. #endif
  599. #if BOARD_NR_SPI >= 3
  600. case RCC_SPI3: return board_spi_pins + 2;
  601. #endif
  602. default: return nullptr;
  603. }
  604. }
  605. static void disable_pwm(const stm32_pin_info *i) {
  606. if (i->timer_device)
  607. timer_set_mode(i->timer_device, i->timer_channel, TIMER_DISABLED);
  608. }
  609. static void configure_gpios(spi_dev *dev, bool as_master) {
  610. const spi_pins *pins = dev_to_spi_pins(dev);
  611. if (!pins) return;
  612. const stm32_pin_info *nssi = &PIN_MAP[pins->nss],
  613. *scki = &PIN_MAP[pins->sck],
  614. *misoi = &PIN_MAP[pins->miso],
  615. *mosii = &PIN_MAP[pins->mosi];
  616. disable_pwm(nssi);
  617. disable_pwm(scki);
  618. disable_pwm(misoi);
  619. disable_pwm(mosii);
  620. spi_config_gpios(dev, as_master, nssi->gpio_device, nssi->gpio_bit,
  621. scki->gpio_device, scki->gpio_bit, misoi->gpio_bit,
  622. mosii->gpio_bit);
  623. }
  624. static const spi_baud_rate baud_rates[8] __FLASH__ = {
  625. SPI_BAUD_PCLK_DIV_2,
  626. SPI_BAUD_PCLK_DIV_4,
  627. SPI_BAUD_PCLK_DIV_8,
  628. SPI_BAUD_PCLK_DIV_16,
  629. SPI_BAUD_PCLK_DIV_32,
  630. SPI_BAUD_PCLK_DIV_64,
  631. SPI_BAUD_PCLK_DIV_128,
  632. SPI_BAUD_PCLK_DIV_256,
  633. };
  634. /**
  635. * Note: This assumes you're on a LeafLabs-style board
  636. * (CYCLES_PER_MICROSECOND == 72, APB2 at 72MHz, APB1 at 36MHz).
  637. */
  638. static spi_baud_rate determine_baud_rate(spi_dev *dev, uint32_t freq) {
  639. uint32_t clock = 0;
  640. switch (rcc_dev_clk(dev->clk_id)) {
  641. case RCC_AHB:
  642. case RCC_APB2: clock = STM32_PCLK2; break; // 72 Mhz
  643. case RCC_APB1: clock = STM32_PCLK1; break; // 36 Mhz
  644. }
  645. clock >>= 1;
  646. uint8_t i = 0;
  647. while (i < 7 && freq < clock) { clock >>= 1; i++; }
  648. return baud_rates[i];
  649. }
  650. SPIClass SPI(SPI_DEVICE);
  651. #endif // __STM32F1__