My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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lpc17xx_can.c 54KB

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  1. /**********************************************************************
  2. * $Id$ lpc17xx_can.c 2011-03-09
  3. *//**
  4. * @file lpc17xx_can.c
  5. * @brief Contains all functions support for CAN firmware library on LPC17xx
  6. * @version 3.3
  7. * @date 09. March. 2011
  8. * @author NXP MCU SW Application Team
  9. *
  10. * Copyright(C) 2011, NXP Semiconductor
  11. * All rights reserved.
  12. *
  13. ***********************************************************************
  14. * Software that is described herein is for illustrative purposes only
  15. * which provides customers with programming information regarding the
  16. * products. This software is supplied "AS IS" without any warranties.
  17. * NXP Semiconductors assumes no responsibility or liability for the
  18. * use of the software, conveys no license or title under any patent,
  19. * copyright, or mask work right to the product. NXP Semiconductors
  20. * reserves the right to make changes in the software without
  21. * notification. NXP Semiconductors also make no representation or
  22. * warranty that such application will be suitable for the specified
  23. * use without further testing or modification.
  24. * Permission to use, copy, modify, and distribute this software and its
  25. * documentation is hereby granted, under NXP Semiconductors'
  26. * relevant copyright in the software, without fee, provided that it
  27. * is used in conjunction with NXP Semiconductors microcontrollers. This
  28. * copyright, permission, and disclaimer notice must appear in all copies of
  29. * this code.
  30. **********************************************************************/
  31. /* Peripheral group ----------------------------------------------------------- */
  32. /** @addtogroup CAN
  33. * @{
  34. */
  35. /* Includes ------------------------------------------------------------------- */
  36. #include "lpc17xx_can.h"
  37. #include "lpc17xx_clkpwr.h"
  38. /* If this source file built with example, the LPC17xx FW library configuration
  39. * file in each example directory ("lpc17xx_libcfg.h") must be included,
  40. * otherwise the default FW library configuration file must be included instead
  41. */
  42. #ifdef __BUILD_WITH_EXAMPLE__
  43. #include "lpc17xx_libcfg.h"
  44. #else
  45. #include "lpc17xx_libcfg_default.h"
  46. #endif /* __BUILD_WITH_EXAMPLE__ */
  47. #ifdef _CAN
  48. /* Private Variables ---------------------------------------------------------- */
  49. /** @defgroup CAN_Private_Variables CAN Private Variables
  50. * @{
  51. */
  52. FunctionalState FULLCAN_ENABLE;
  53. /* Counts number of filters (CAN message objects) used */
  54. uint16_t CANAF_FullCAN_cnt = 0;
  55. uint16_t CANAF_std_cnt = 0;
  56. uint16_t CANAF_gstd_cnt = 0;
  57. uint16_t CANAF_ext_cnt = 0;
  58. uint16_t CANAF_gext_cnt = 0;
  59. /* End of Private Variables ----------------------------------------------------*/
  60. /**
  61. * @}
  62. */
  63. /* Private Variables ---------------------------------------------------------- */
  64. static void can_SetBaudrate (LPC_CAN_TypeDef *CANx, uint32_t baudrate);
  65. /*********************************************************************//**
  66. * @brief Setting CAN baud rate (bps)
  67. * @param[in] CANx point to LPC_CAN_TypeDef object, should be:
  68. * - LPC_CAN1: CAN1 peripheral
  69. * - LPC_CAN2: CAN2 peripheral
  70. * @param[in] baudrate: is the baud rate value will be set
  71. * @return None
  72. ***********************************************************************/
  73. static void can_SetBaudrate (LPC_CAN_TypeDef *CANx, uint32_t baudrate)
  74. {
  75. uint32_t result = 0;
  76. uint8_t NT, TSEG1, TSEG2, BRFail;
  77. uint32_t CANPclk = 0;
  78. uint32_t BRP;
  79. CHECK_PARAM(PARAM_CANx(CANx));
  80. if (CANx == LPC_CAN1)
  81. {
  82. CANPclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_CAN1);
  83. }
  84. else
  85. {
  86. CANPclk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_CAN2);
  87. }
  88. result = CANPclk / baudrate;
  89. /* Calculate suitable nominal time value
  90. * NT (nominal time) = (TSEG1 + TSEG2 + 3)
  91. * NT <= 24
  92. * TSEG1 >= 2*TSEG2
  93. */
  94. BRFail = 1;
  95. for(NT=24;NT>0;NT=NT-2)
  96. {
  97. if ((result%NT)==0)
  98. {
  99. BRP = result / NT - 1;
  100. NT--;
  101. TSEG2 = (NT/3) - 1;
  102. TSEG1 = NT -(NT/3) - 1;
  103. BRFail = 0;
  104. break;
  105. }
  106. }
  107. if(BRFail)
  108. while(1); // Failed to calculate exact CAN baud rate
  109. /* Enter reset mode */
  110. CANx->MOD = 0x01;
  111. /* Set bit timing
  112. * Default: SAM = 0x00;
  113. * SJW = 0x03;
  114. */
  115. CANx->BTR = (TSEG2<<20)|(TSEG1<<16)|(3<<14)|BRP;
  116. /* Return to normal operating */
  117. CANx->MOD = 0;
  118. }
  119. /* End of Private Functions ----------------------------------------------------*/
  120. /* Public Functions ----------------------------------------------------------- */
  121. /** @addtogroup CAN_Public_Functions
  122. * @{
  123. */
  124. /********************************************************************//**
  125. * @brief Initialize CAN peripheral with given baudrate
  126. * @param[in] CANx pointer to LPC_CAN_TypeDef, should be:
  127. * - LPC_CAN1: CAN1 peripheral
  128. * - LPC_CAN2: CAN2 peripheral
  129. * @param[in] baudrate: the value of CAN baudrate will be set (bps)
  130. * @return None
  131. *********************************************************************/
  132. void CAN_Init(LPC_CAN_TypeDef *CANx, uint32_t baudrate)
  133. {
  134. uint16_t i;
  135. CHECK_PARAM(PARAM_CANx(CANx));
  136. if(CANx == LPC_CAN1)
  137. {
  138. /* Turn on power and clock for CAN1 */
  139. CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN1, ENABLE);
  140. /* Set clock divide for CAN1 */
  141. }
  142. else
  143. {
  144. /* Turn on power and clock for CAN1 */
  145. CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN2, ENABLE);
  146. /* Set clock divide for CAN2 */
  147. }
  148. CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_CAN1, CLKPWR_PCLKSEL_CCLK_DIV_2);
  149. CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_CAN2, CLKPWR_PCLKSEL_CCLK_DIV_2);
  150. CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_ACF, CLKPWR_PCLKSEL_CCLK_DIV_2);
  151. CANx->MOD = 1; // Enter Reset Mode
  152. CANx->IER = 0; // Disable All CAN Interrupts
  153. CANx->GSR = 0;
  154. /* Request command to release Rx, Tx buffer and clear data overrun */
  155. //CANx->CMR = CAN_CMR_AT | CAN_CMR_RRB | CAN_CMR_CDO;
  156. CANx->CMR = (1<<1)|(1<<2)|(1<<3);
  157. /* Read to clear interrupt pending in interrupt capture register */
  158. i = CANx->ICR;
  159. CANx->MOD = 0;// Return Normal operating
  160. //Reset CANAF value
  161. LPC_CANAF->AFMR = 0x01;
  162. //clear ALUT RAM
  163. for (i = 0; i < 512; i++) {
  164. LPC_CANAF_RAM->mask[i] = 0x00;
  165. }
  166. LPC_CANAF->SFF_sa = 0x00;
  167. LPC_CANAF->SFF_GRP_sa = 0x00;
  168. LPC_CANAF->EFF_sa = 0x00;
  169. LPC_CANAF->EFF_GRP_sa = 0x00;
  170. LPC_CANAF->ENDofTable = 0x00;
  171. LPC_CANAF->AFMR = 0x00;
  172. /* Set baudrate */
  173. can_SetBaudrate (CANx, baudrate);
  174. }
  175. /********************************************************************//**
  176. * @brief CAN deInit
  177. * @param[in] CANx pointer to LPC_CAN_TypeDef, should be:
  178. * - LPC_CAN1: CAN1 peripheral
  179. * - LPC_CAN2: CAN2 peripheral
  180. * @return None
  181. *********************************************************************/
  182. void CAN_DeInit(LPC_CAN_TypeDef *CANx)
  183. {
  184. CHECK_PARAM(PARAM_CANx(CANx));
  185. if(CANx == LPC_CAN1)
  186. {
  187. /* Turn on power and clock for CAN1 */
  188. CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN1, DISABLE);
  189. }
  190. else
  191. {
  192. /* Turn on power and clock for CAN1 */
  193. CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCAN2, DISABLE);
  194. }
  195. }
  196. /********************************************************************//**
  197. * @brief Setup Acceptance Filter Look-Up Table
  198. * @param[in] CANAFx pointer to LPC_CANAF_TypeDef
  199. * Should be: LPC_CANAF
  200. * @param[in] AFSection the pointer to AF_SectionDef structure
  201. * It contain information about 5 sections will be install in AFLUT
  202. * @return CAN Error could be:
  203. * - CAN_OBJECTS_FULL_ERROR: No more rx or tx objects available
  204. * - CAN_AF_ENTRY_ERROR: table error-violation of ascending numerical order
  205. * - CAN_OK: ID is added into table successfully
  206. *********************************************************************/
  207. CAN_ERROR CAN_SetupAFLUT(LPC_CANAF_TypeDef* CANAFx, AF_SectionDef* AFSection)
  208. {
  209. uint8_t ctrl1,ctrl2;
  210. uint8_t dis1, dis2;
  211. uint16_t SID, ID_temp,i, count = 0;
  212. uint32_t EID, entry, buf;
  213. uint16_t lowerSID, upperSID;
  214. uint32_t lowerEID, upperEID;
  215. CHECK_PARAM(PARAM_CANAFx(CANAFx));
  216. CANAFx->AFMR = 0x01;
  217. /***** setup FullCAN Table *****/
  218. if(AFSection->FullCAN_Sec == NULL)
  219. {
  220. FULLCAN_ENABLE = DISABLE;
  221. }
  222. else
  223. {
  224. FULLCAN_ENABLE = ENABLE;
  225. for(i=0;i<(AFSection->FC_NumEntry);i++)
  226. {
  227. if(count + 1 > 64)
  228. {
  229. return CAN_OBJECTS_FULL_ERROR;
  230. }
  231. ctrl1 = AFSection->FullCAN_Sec->controller;
  232. SID = AFSection->FullCAN_Sec->id_11;
  233. dis1 = AFSection->FullCAN_Sec->disable;
  234. CHECK_PARAM(PARAM_CTRL(ctrl1));
  235. CHECK_PARAM(PARAM_ID_11(SID));
  236. CHECK_PARAM(PARAM_MSG_DISABLE(dis1));
  237. entry = 0x00; //reset entry value
  238. if((CANAF_FullCAN_cnt & 0x00000001)==0)
  239. {
  240. if(count!=0x00)
  241. {
  242. buf = LPC_CANAF_RAM->mask[count-1];
  243. ID_temp = (buf & 0xE7FF); //mask controller & identifier bits
  244. if(ID_temp > ((ctrl1<<13)|SID))
  245. {
  246. return CAN_AF_ENTRY_ERROR;
  247. }
  248. }
  249. entry = (ctrl1<<29)|(dis1<<28)|(SID<<16)|(1<<27);
  250. LPC_CANAF_RAM->mask[count] &= 0x0000FFFF;
  251. LPC_CANAF_RAM->mask[count] |= entry;
  252. CANAF_FullCAN_cnt++;
  253. if(CANAF_FullCAN_cnt == AFSection->FC_NumEntry) //this is the lastest FullCAN entry
  254. count++;
  255. }
  256. else
  257. {
  258. buf = LPC_CANAF_RAM->mask[count];
  259. ID_temp = (buf >>16) & 0xE7FF;
  260. if(ID_temp > ((ctrl1<<13)|SID))
  261. {
  262. return CAN_AF_ENTRY_ERROR;
  263. }
  264. entry = (ctrl1<<13)|(dis1<<12)|(SID<<0)|(1<<11);
  265. LPC_CANAF_RAM->mask[count] &= 0xFFFF0000;
  266. LPC_CANAF_RAM->mask[count]|= entry;
  267. count++;
  268. CANAF_FullCAN_cnt++;
  269. }
  270. AFSection->FullCAN_Sec = (FullCAN_Entry *)((uint32_t)(AFSection->FullCAN_Sec)+ sizeof(FullCAN_Entry));
  271. }
  272. }
  273. /***** Setup Explicit Standard Frame Format Section *****/
  274. if(AFSection->SFF_Sec != NULL)
  275. {
  276. for(i=0;i<(AFSection->SFF_NumEntry);i++)
  277. {
  278. if(count + 1 > 512)
  279. {
  280. return CAN_OBJECTS_FULL_ERROR;
  281. }
  282. ctrl1 = AFSection->SFF_Sec->controller;
  283. SID = AFSection->SFF_Sec->id_11;
  284. dis1 = AFSection->SFF_Sec->disable;
  285. //check parameter
  286. CHECK_PARAM(PARAM_CTRL(ctrl1));
  287. CHECK_PARAM(PARAM_ID_11(SID));
  288. CHECK_PARAM(PARAM_MSG_DISABLE(dis1));
  289. entry = 0x00; //reset entry value
  290. if((CANAF_std_cnt & 0x00000001)==0)
  291. {
  292. if(CANAF_std_cnt !=0 )
  293. {
  294. buf = LPC_CANAF_RAM->mask[count-1];
  295. ID_temp = (buf & 0xE7FF); //mask controller & identifier bits
  296. if(ID_temp > ((ctrl1<<13)|SID))
  297. {
  298. return CAN_AF_ENTRY_ERROR;
  299. }
  300. }
  301. entry = (ctrl1<<29)|(dis1<<28)|(SID<<16);
  302. LPC_CANAF_RAM->mask[count] &= 0x0000FFFF;
  303. LPC_CANAF_RAM->mask[count] |= entry;
  304. CANAF_std_cnt++;
  305. if(CANAF_std_cnt == AFSection->SFF_NumEntry)//if this is the last SFF entry
  306. count++;
  307. }
  308. else
  309. {
  310. buf = LPC_CANAF_RAM->mask[count];
  311. ID_temp = (buf >>16) & 0xE7FF;
  312. if(ID_temp > ((ctrl1<<13)|SID))
  313. {
  314. return CAN_AF_ENTRY_ERROR;
  315. }
  316. entry = (ctrl1<<13)|(dis1<<12)|(SID<<0);
  317. LPC_CANAF_RAM->mask[count] &= 0xFFFF0000;
  318. LPC_CANAF_RAM->mask[count] |= entry;
  319. count++;
  320. CANAF_std_cnt++;
  321. }
  322. AFSection->SFF_Sec = (SFF_Entry *)((uint32_t)(AFSection->SFF_Sec)+ sizeof(SFF_Entry));
  323. }
  324. }
  325. /***** Setup Group of Standard Frame Format Identifier Section *****/
  326. if(AFSection->SFF_GPR_Sec != NULL)
  327. {
  328. for(i=0;i<(AFSection->SFF_GPR_NumEntry);i++)
  329. {
  330. if(count + 1 > 512)
  331. {
  332. return CAN_OBJECTS_FULL_ERROR;
  333. }
  334. ctrl1 = AFSection->SFF_GPR_Sec->controller1;
  335. ctrl2 = AFSection->SFF_GPR_Sec->controller2;
  336. dis1 = AFSection->SFF_GPR_Sec->disable1;
  337. dis2 = AFSection->SFF_GPR_Sec->disable2;
  338. lowerSID = AFSection->SFF_GPR_Sec->lowerID;
  339. upperSID = AFSection->SFF_GPR_Sec->upperID;
  340. /* check parameter */
  341. CHECK_PARAM(PARAM_CTRL(ctrl1));
  342. CHECK_PARAM(PARAM_CTRL(ctrl2));
  343. CHECK_PARAM(PARAM_MSG_DISABLE(dis1));
  344. CHECK_PARAM(PARAM_MSG_DISABLE(dis2));
  345. CHECK_PARAM(PARAM_ID_11(lowerSID));
  346. CHECK_PARAM(PARAM_ID_11(upperSID));
  347. entry = 0x00;
  348. if(CANAF_gstd_cnt!=0)
  349. {
  350. buf = LPC_CANAF_RAM->mask[count-1];
  351. ID_temp = buf & 0xE7FF;
  352. if((ctrl1 != ctrl2)||(lowerSID > upperSID)||(ID_temp > ((ctrl1<<13)|lowerSID)))
  353. {
  354. return CAN_AF_ENTRY_ERROR;
  355. }
  356. }
  357. entry = (ctrl1 << 29)|(dis1 << 28)|(lowerSID << 16)| \
  358. (ctrl2 << 13)|(dis2 << 12)|(upperSID << 0);
  359. LPC_CANAF_RAM->mask[count] = entry;
  360. CANAF_gstd_cnt++;
  361. count++;
  362. AFSection->SFF_GPR_Sec = (SFF_GPR_Entry *)((uint32_t)(AFSection->SFF_GPR_Sec)+ sizeof(SFF_GPR_Entry));
  363. }
  364. }
  365. /***** Setup Explicit Extend Frame Format Identifier Section *****/
  366. if(AFSection->EFF_Sec != NULL)
  367. {
  368. for(i=0;i<(AFSection->EFF_NumEntry);i++)
  369. {
  370. if(count + 1 > 512)
  371. {
  372. return CAN_OBJECTS_FULL_ERROR;
  373. }
  374. EID = AFSection->EFF_Sec->ID_29;
  375. ctrl1 = AFSection->EFF_Sec->controller;
  376. // check parameter
  377. CHECK_PARAM(PARAM_ID_29(EID));
  378. CHECK_PARAM(PARAM_CTRL(ctrl1));
  379. entry = (ctrl1 << 29)|(EID << 0);
  380. if(CANAF_ext_cnt != 0)
  381. {
  382. buf = LPC_CANAF_RAM->mask[count-1];
  383. // EID_temp = buf & 0x0FFFFFFF;
  384. if(buf > entry)
  385. {
  386. return CAN_AF_ENTRY_ERROR;
  387. }
  388. }
  389. LPC_CANAF_RAM->mask[count] = entry;
  390. CANAF_ext_cnt ++;
  391. count++;
  392. AFSection->EFF_Sec = (EFF_Entry *)((uint32_t)(AFSection->EFF_Sec)+ sizeof(EFF_Entry));
  393. }
  394. }
  395. /***** Setup Group of Extended Frame Format Identifier Section *****/
  396. if(AFSection->EFF_GPR_Sec != NULL)
  397. {
  398. for(i=0;i<(AFSection->EFF_GPR_NumEntry);i++)
  399. {
  400. if(count + 2 > 512)
  401. {
  402. return CAN_OBJECTS_FULL_ERROR;
  403. }
  404. ctrl1 = AFSection->EFF_GPR_Sec->controller1;
  405. ctrl2 = AFSection->EFF_GPR_Sec->controller2;
  406. lowerEID = AFSection->EFF_GPR_Sec->lowerEID;
  407. upperEID = AFSection->EFF_GPR_Sec->upperEID;
  408. //check parameter
  409. CHECK_PARAM(PARAM_CTRL(ctrl1));
  410. CHECK_PARAM(PARAM_CTRL(ctrl2));
  411. CHECK_PARAM(PARAM_ID_29(lowerEID));
  412. CHECK_PARAM(PARAM_ID_29(upperEID));
  413. entry = 0x00;
  414. if(CANAF_gext_cnt != 0)
  415. {
  416. buf = LPC_CANAF_RAM->mask[count-1];
  417. // EID_temp = buf & 0x0FFFFFFF;
  418. if((ctrl1 != ctrl2) || (lowerEID > upperEID) || (buf > ((ctrl1 << 29)|(lowerEID << 0))))
  419. {
  420. return CAN_AF_ENTRY_ERROR;
  421. }
  422. }
  423. entry = (ctrl1 << 29)|(lowerEID << 0);
  424. LPC_CANAF_RAM->mask[count++] = entry;
  425. entry = (ctrl2 << 29)|(upperEID << 0);
  426. LPC_CANAF_RAM->mask[count++] = entry;
  427. CANAF_gext_cnt++;
  428. AFSection->EFF_GPR_Sec = (EFF_GPR_Entry *)((uint32_t)(AFSection->EFF_GPR_Sec)+ sizeof(EFF_GPR_Entry));
  429. }
  430. }
  431. //update address values
  432. LPC_CANAF->SFF_sa = ((CANAF_FullCAN_cnt + 1)>>1)<<2;
  433. LPC_CANAF->SFF_GRP_sa = LPC_CANAF->SFF_sa + (((CANAF_std_cnt+1)>>1)<< 2);
  434. LPC_CANAF->EFF_sa = LPC_CANAF->SFF_GRP_sa + (CANAF_gstd_cnt << 2);
  435. LPC_CANAF->EFF_GRP_sa = LPC_CANAF->EFF_sa + (CANAF_ext_cnt << 2);
  436. LPC_CANAF->ENDofTable = LPC_CANAF->EFF_GRP_sa + (CANAF_gext_cnt << 3);
  437. if(FULLCAN_ENABLE == DISABLE)
  438. {
  439. LPC_CANAF->AFMR = 0x00; // Normal mode
  440. }
  441. else
  442. {
  443. LPC_CANAF->AFMR = 0x04;
  444. }
  445. return CAN_OK;
  446. }
  447. /********************************************************************//**
  448. * @brief Add Explicit ID into AF Look-Up Table dynamically.
  449. * @param[in] CANx pointer to LPC_CAN_TypeDef, should be:
  450. * - LPC_CAN1: CAN1 peripheral
  451. * - LPC_CAN2: CAN2 peripheral
  452. * @param[in] id: The ID of entry will be added
  453. * @param[in] format: is the type of ID Frame Format, should be:
  454. * - STD_ID_FORMAT: 11-bit ID value
  455. * - EXT_ID_FORMAT: 29-bit ID value
  456. * @return CAN Error, could be:
  457. * - CAN_OBJECTS_FULL_ERROR: No more rx or tx objects available
  458. * - CAN_ID_EXIT_ERROR: ID exited in table
  459. * - CAN_OK: ID is added into table successfully
  460. *********************************************************************/
  461. CAN_ERROR CAN_LoadExplicitEntry(LPC_CAN_TypeDef* CANx, uint32_t id, CAN_ID_FORMAT_Type format)
  462. {
  463. uint32_t tmp0 = 0;
  464. uint32_t buf0=0, buf1=0;
  465. int16_t cnt1=0, cnt2=0, bound1=0, total=0;
  466. CHECK_PARAM(PARAM_CANx(CANx));
  467. CHECK_PARAM(PARAM_ID_FORMAT(format));
  468. if (CANx == LPC_CAN1)
  469. {
  470. tmp0 = 0;
  471. }
  472. else if (CANx == LPC_CAN2)
  473. {
  474. tmp0 = 1;
  475. }
  476. /* Acceptance Filter Memory full - return */
  477. total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+ \
  478. CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
  479. if (total >= 512){ //don't have enough space
  480. return CAN_OBJECTS_FULL_ERROR;
  481. }
  482. /* Setup Acceptance Filter Configuration
  483. Acceptance Filter Mode Register = Off */
  484. LPC_CANAF->AFMR = 0x00000001;
  485. /*********** Add Explicit Standard Identifier Frame Format entry *********/
  486. if(format == STD_ID_FORMAT)
  487. {
  488. id &= 0x07FF;
  489. id |= (tmp0 << 13); /* Add controller number */
  490. /* Move all remaining sections one place up
  491. if new entry will increase FullCAN list */
  492. if ((CANAF_std_cnt & 0x0001) == 0)
  493. {
  494. cnt1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1);
  495. bound1 = total - cnt1;
  496. buf0 = LPC_CANAF_RAM->mask[cnt1];
  497. while(bound1--)
  498. {
  499. cnt1++;
  500. buf1 = LPC_CANAF_RAM->mask[cnt1];
  501. LPC_CANAF_RAM->mask[cnt1] = buf0;
  502. buf0 = buf1;
  503. }
  504. }
  505. if (CANAF_std_cnt == 0)
  506. {
  507. cnt2 = (CANAF_FullCAN_cnt + 1)>>1;
  508. /* For entering first ID */
  509. LPC_CANAF_RAM->mask[cnt2] = 0x0000FFFF | (id << 16);
  510. }
  511. else if (CANAF_std_cnt == 1)
  512. {
  513. cnt2 = (CANAF_FullCAN_cnt + 1)>>1;
  514. /* For entering second ID */
  515. if (((LPC_CANAF_RAM->mask[cnt2] >> 16)& 0xE7FF) > id)
  516. {
  517. LPC_CANAF_RAM->mask[cnt2] = (LPC_CANAF_RAM->mask[cnt2] >> 16) | (id << 16);
  518. }
  519. else
  520. {
  521. LPC_CANAF_RAM->mask[cnt2] = (LPC_CANAF_RAM->mask[cnt2] & 0xFFFF0000) | id;
  522. }
  523. }
  524. else
  525. {
  526. /* Find where to insert new ID */
  527. cnt1 = (CANAF_FullCAN_cnt+1)>>1;
  528. cnt2 = CANAF_std_cnt;
  529. bound1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1);
  530. while (cnt1 < bound1)
  531. {
  532. /* Loop through standard existing IDs */
  533. if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) > id)
  534. {
  535. cnt2 = cnt1 * 2;
  536. break;
  537. }
  538. if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) > id)
  539. {
  540. cnt2 = cnt1 * 2 + 1;
  541. break;
  542. }
  543. cnt1++;
  544. }
  545. /* cnt1 = U32 where to insert new ID */
  546. /* cnt2 = U16 where to insert new ID */
  547. if (cnt1 == bound1)
  548. {
  549. /* Adding ID as last entry */
  550. /* Even number of IDs exists */
  551. if ((CANAF_std_cnt & 0x0001) == 0)
  552. {
  553. LPC_CANAF_RAM->mask[cnt1] = 0x0000FFFF | (id << 16);
  554. }
  555. /* Odd number of IDs exists */
  556. else
  557. {
  558. LPC_CANAF_RAM->mask[cnt1] = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000) | id;
  559. }
  560. }
  561. else
  562. {
  563. buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */
  564. if ((cnt2 & 0x0001) == 0)
  565. {
  566. /* Insert new mask to even address*/
  567. buf1 = (id << 16) | (buf0 >> 16);
  568. }
  569. else
  570. {
  571. /* Insert new mask to odd address */
  572. buf1 = (buf0 & 0xFFFF0000) | id;
  573. }
  574. LPC_CANAF_RAM->mask[cnt1] = buf1;/* Insert mask */
  575. bound1 = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt+1)>>1)-1;
  576. /* Move all remaining standard mask entries one place up */
  577. while (cnt1 < bound1)
  578. {
  579. cnt1++;
  580. buf1 = LPC_CANAF_RAM->mask[cnt1];
  581. LPC_CANAF_RAM->mask[cnt1] = (buf1 >> 16) | (buf0 << 16);
  582. buf0 = buf1;
  583. }
  584. if ((CANAF_std_cnt & 0x0001) == 0)
  585. {
  586. /* Even number of IDs exists */
  587. LPC_CANAF_RAM->mask[cnt1+1] = (buf0 <<16) |(0x0000FFFF);
  588. }
  589. }
  590. }
  591. CANAF_std_cnt++;
  592. //update address values
  593. LPC_CANAF->SFF_GRP_sa +=0x04 ;
  594. LPC_CANAF->EFF_sa +=0x04 ;
  595. LPC_CANAF->EFF_GRP_sa +=0x04;
  596. LPC_CANAF->ENDofTable +=0x04;
  597. }
  598. /*********** Add Explicit Extended Identifier Frame Format entry *********/
  599. else
  600. {
  601. /* Add controller number */
  602. id |= (tmp0) << 29;
  603. cnt1 = ((CANAF_FullCAN_cnt+1)>>1)+(((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt);
  604. cnt2 = 0;
  605. while (cnt2 < CANAF_ext_cnt)
  606. {
  607. /* Loop through extended existing masks*/
  608. if (LPC_CANAF_RAM->mask[cnt1] > id)
  609. {
  610. break;
  611. }
  612. cnt1++;/* cnt1 = U32 where to insert new mask */
  613. cnt2++;
  614. }
  615. buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */
  616. LPC_CANAF_RAM->mask[cnt1] = id; /* Insert mask */
  617. CANAF_ext_cnt++;
  618. bound1 = total;
  619. /* Move all remaining extended mask entries one place up*/
  620. while (cnt2 < bound1)
  621. {
  622. cnt1++;
  623. cnt2++;
  624. buf1 = LPC_CANAF_RAM->mask[cnt1];
  625. LPC_CANAF_RAM->mask[cnt1] = buf0;
  626. buf0 = buf1;
  627. }
  628. /* update address values */
  629. LPC_CANAF->EFF_GRP_sa += 4;
  630. LPC_CANAF->ENDofTable += 4;
  631. }
  632. if(CANAF_FullCAN_cnt == 0) //not use FullCAN mode
  633. {
  634. LPC_CANAF->AFMR = 0x00;//not use FullCAN mode
  635. }
  636. else
  637. {
  638. LPC_CANAF->AFMR = 0x04;
  639. }
  640. return CAN_OK;
  641. }
  642. /********************************************************************//**
  643. * @brief Load FullCAN entry into AFLUT
  644. * @param[in] CANx: CAN peripheral selected, should be:
  645. * - LPC_CAN1: CAN1 peripheral
  646. * - LPC_CAN2: CAN2 peripheral
  647. * @param[in] id: identifier of entry that will be added
  648. * @return CAN_ERROR, could be:
  649. * - CAN_OK: loading is successful
  650. * - CAN_ID_EXIT_ERROR: ID exited in FullCAN Section
  651. * - CAN_OBJECTS_FULL_ERROR: no more space available
  652. *********************************************************************/
  653. CAN_ERROR CAN_LoadFullCANEntry (LPC_CAN_TypeDef* CANx, uint16_t id)
  654. {
  655. uint32_t ctrl0 = 0;
  656. uint32_t buf0=0, buf1=0, buf2=0;
  657. uint32_t tmp0=0, tmp1=0, tmp2=0;
  658. int16_t cnt1=0, cnt2=0, bound1=0, total=0;
  659. CHECK_PARAM(PARAM_CANx(CANx));
  660. if (CANx == LPC_CAN1)
  661. {
  662. ctrl0 = 0;
  663. }
  664. else if (CANx == LPC_CAN2)
  665. {
  666. ctrl0 = 1;
  667. }
  668. /* Acceptance Filter Memory full - return */
  669. total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+ \
  670. CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
  671. //don't have enough space for this fullCAN Entry and its Object(3*32 bytes)
  672. if ((total >=508)||(CANAF_FullCAN_cnt>=64)){
  673. return CAN_OBJECTS_FULL_ERROR;
  674. }
  675. /* Setup Acceptance Filter Configuration
  676. Acceptance Filter Mode Register = Off */
  677. LPC_CANAF->AFMR = 0x00000001;
  678. /* Add mask for standard identifiers */
  679. id &= 0x07FF;
  680. id |= (ctrl0 << 13) | (1 << 11); /* Add controller number */
  681. // total = ((CANAF_std_cnt + 1) >> 1)+ CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
  682. /* Move all remaining sections one place up
  683. if new entry will increase FullCAN list */
  684. if (((CANAF_FullCAN_cnt & 0x0001) == 0)&&(total!=0))
  685. {
  686. //then remove remaining section
  687. cnt1 = (CANAF_FullCAN_cnt >> 1);
  688. bound1 = total;
  689. buf0 = LPC_CANAF_RAM->mask[cnt1];
  690. while (bound1--)
  691. {
  692. cnt1++;
  693. buf1 = LPC_CANAF_RAM->mask[cnt1];
  694. LPC_CANAF_RAM->mask[cnt1] = buf0;
  695. buf0 = buf1;
  696. }
  697. }
  698. if (CANAF_FullCAN_cnt == 0)
  699. {
  700. /* For entering first ID */
  701. LPC_CANAF_RAM->mask[0] = 0x0000FFFF | (id << 16);
  702. }
  703. else if (CANAF_FullCAN_cnt == 1)
  704. {
  705. /* For entering second ID */
  706. if (((LPC_CANAF_RAM->mask[0] >> 16)& 0xE7FF) > id)
  707. {
  708. LPC_CANAF_RAM->mask[0] = (LPC_CANAF_RAM->mask[0] >> 16) | (id << 16);
  709. }
  710. else
  711. {
  712. LPC_CANAF_RAM->mask[0] = (LPC_CANAF_RAM->mask[0] & 0xFFFF0000) | id;
  713. }
  714. }
  715. else
  716. {
  717. /* Find where to insert new ID */
  718. cnt1 = 0;
  719. cnt2 = CANAF_FullCAN_cnt;
  720. bound1 = (CANAF_FullCAN_cnt - 1) >> 1;
  721. while (cnt1 <= bound1)
  722. {
  723. /* Loop through standard existing IDs */
  724. if (((LPC_CANAF_RAM->mask[cnt1] >> 16) & 0xE7FF) > (id & 0xE7FF))
  725. {
  726. cnt2 = cnt1 * 2;
  727. break;
  728. }
  729. if ((LPC_CANAF_RAM->mask[cnt1] & 0x0000E7FF) > (id & 0xE7FF))
  730. {
  731. cnt2 = cnt1 * 2 + 1;
  732. break;
  733. }
  734. cnt1++;
  735. }
  736. /* cnt1 = U32 where to insert new ID */
  737. /* cnt2 = U16 where to insert new ID */
  738. if (cnt1 > bound1)
  739. {
  740. /* Adding ID as last entry */
  741. /* Even number of IDs exists */
  742. if ((CANAF_FullCAN_cnt & 0x0001) == 0)
  743. {
  744. LPC_CANAF_RAM->mask[cnt1] = 0x0000FFFF | (id << 16);
  745. }
  746. /* Odd number of IDs exists */
  747. else
  748. {
  749. LPC_CANAF_RAM->mask[cnt1] = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000) | id;
  750. }
  751. }
  752. else
  753. {
  754. buf0 = LPC_CANAF_RAM->mask[cnt1]; /* Remember current entry */
  755. if ((cnt2 & 0x0001) == 0)
  756. {
  757. /* Insert new mask to even address*/
  758. buf1 = (id << 16) | (buf0 >> 16);
  759. }
  760. else
  761. {
  762. /* Insert new mask to odd address */
  763. buf1 = (buf0 & 0xFFFF0000) | id;
  764. }
  765. LPC_CANAF_RAM->mask[cnt1] = buf1;/* Insert mask */
  766. bound1 = CANAF_FullCAN_cnt >> 1;
  767. /* Move all remaining standard mask entries one place up */
  768. while (cnt1 < bound1)
  769. {
  770. cnt1++;
  771. buf1 = LPC_CANAF_RAM->mask[cnt1];
  772. LPC_CANAF_RAM->mask[cnt1] = (buf1 >> 16) | (buf0 << 16);
  773. buf0 = buf1;
  774. }
  775. if ((CANAF_FullCAN_cnt & 0x0001) == 0)
  776. {
  777. /* Even number of IDs exists */
  778. LPC_CANAF_RAM->mask[cnt1] = (LPC_CANAF_RAM->mask[cnt1] & 0xFFFF0000)
  779. | (0x0000FFFF);
  780. }
  781. }
  782. }
  783. //restruct FulCAN Object Section
  784. bound1 = CANAF_FullCAN_cnt - cnt2;
  785. cnt1 = total - (CANAF_FullCAN_cnt)*3 + cnt2*3 + 1;
  786. buf0 = LPC_CANAF_RAM->mask[cnt1];
  787. buf1 = LPC_CANAF_RAM->mask[cnt1+1];
  788. buf2 = LPC_CANAF_RAM->mask[cnt1+2];
  789. LPC_CANAF_RAM->mask[cnt1]=LPC_CANAF_RAM->mask[cnt1+1]= LPC_CANAF_RAM->mask[cnt1+2]=0x00;
  790. cnt1+=3;
  791. while(bound1--)
  792. {
  793. tmp0 = LPC_CANAF_RAM->mask[cnt1];
  794. tmp1 = LPC_CANAF_RAM->mask[cnt1+1];
  795. tmp2 = LPC_CANAF_RAM->mask[cnt1+2];
  796. LPC_CANAF_RAM->mask[cnt1]= buf0;
  797. LPC_CANAF_RAM->mask[cnt1+1]= buf1;
  798. LPC_CANAF_RAM->mask[cnt1+2]= buf2;
  799. buf0 = tmp0;
  800. buf1 = tmp1;
  801. buf2 = tmp2;
  802. cnt1+=3;
  803. }
  804. CANAF_FullCAN_cnt++;
  805. //update address values
  806. LPC_CANAF->SFF_sa +=0x04;
  807. LPC_CANAF->SFF_GRP_sa +=0x04 ;
  808. LPC_CANAF->EFF_sa +=0x04 ;
  809. LPC_CANAF->EFF_GRP_sa +=0x04;
  810. LPC_CANAF->ENDofTable +=0x04;
  811. LPC_CANAF->AFMR = 0x04;
  812. return CAN_OK;
  813. }
  814. /********************************************************************//**
  815. * @brief Load Group entry into AFLUT
  816. * @param[in] CANx: CAN peripheral selected, should be:
  817. * - LPC_CAN1: CAN1 peripheral
  818. * - LPC_CAN2: CAN2 peripheral
  819. * @param[in] lowerID, upperID: lower and upper identifier of entry
  820. * @param[in] format: type of ID format, should be:
  821. * - STD_ID_FORMAT: Standard ID format (11-bit value)
  822. * - EXT_ID_FORMAT: Extended ID format (29-bit value)
  823. * @return CAN_ERROR, could be:
  824. * - CAN_OK: loading is successful
  825. * - CAN_CONFLICT_ID_ERROR: Conflict ID occurs
  826. * - CAN_OBJECTS_FULL_ERROR: no more space available
  827. *********************************************************************/
  828. CAN_ERROR CAN_LoadGroupEntry(LPC_CAN_TypeDef* CANx, uint32_t lowerID, \
  829. uint32_t upperID, CAN_ID_FORMAT_Type format)
  830. {
  831. uint16_t tmp = 0;
  832. uint32_t buf0, buf1, entry1, entry2, LID,UID;
  833. int16_t cnt1, bound1, total;
  834. //LPC_CANAF_RAM_TypeDef *AFLUTTest = LPC_CANAF_RAM;
  835. CHECK_PARAM(PARAM_CANx(CANx));
  836. CHECK_PARAM(PARAM_ID_FORMAT(format));
  837. if(lowerID > upperID) return CAN_CONFLICT_ID_ERROR;
  838. if(CANx == LPC_CAN1)
  839. {
  840. tmp = 0;
  841. }
  842. else
  843. {
  844. tmp = 1;
  845. }
  846. total =((CANAF_FullCAN_cnt+1)>>1)+ CANAF_FullCAN_cnt*3 +((CANAF_std_cnt + 1) >> 1)+ \
  847. CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
  848. /* Setup Acceptance Filter Configuration
  849. Acceptance Filter Mode Register = Off */
  850. LPC_CANAF->AFMR = 0x00000001;
  851. /*********Add Group of Standard Identifier Frame Format************/
  852. if(format == STD_ID_FORMAT)
  853. {
  854. if ((total >= 512)){//don't have enough space
  855. return CAN_OBJECTS_FULL_ERROR;
  856. }
  857. lowerID &=0x7FF; //mask ID
  858. upperID &=0x7FF;
  859. entry1 = (tmp << 29)|(lowerID << 16)|(tmp << 13)|(upperID << 0);
  860. cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1);
  861. //if this is the first Group standard ID entry
  862. if(CANAF_gstd_cnt == 0)
  863. {
  864. LPC_CANAF_RAM->mask[cnt1] = entry1;
  865. }
  866. else
  867. {
  868. //find the position to add new Group entry
  869. bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt;
  870. while(cnt1 < bound1)
  871. {
  872. //compare controller first
  873. while((LPC_CANAF_RAM->mask[cnt1] >> 29)< (entry1 >> 29))//increase until meet greater or equal controller
  874. cnt1++;
  875. buf0 = LPC_CANAF_RAM->mask[cnt1];
  876. if((LPC_CANAF_RAM->mask[cnt1] >> 29)> (entry1 >> 29)) //meet greater controller
  877. {
  878. //add at this position
  879. LPC_CANAF_RAM->mask[cnt1] = entry1;
  880. break;
  881. }
  882. else //meet equal controller
  883. {
  884. LID = (buf0 >> 16)&0x7FF;
  885. UID = buf0 & 0x7FF;
  886. if (upperID <= LID)
  887. {
  888. //add new entry before this entry
  889. LPC_CANAF_RAM->mask[cnt1] = entry1;
  890. break;
  891. }
  892. else if (lowerID >= UID)
  893. {
  894. //load next entry to compare
  895. cnt1 ++;
  896. }
  897. else
  898. return CAN_CONFLICT_ID_ERROR;
  899. }
  900. }
  901. if(cnt1 >= bound1)
  902. {
  903. //add new entry at the last position in this list
  904. buf0 = LPC_CANAF_RAM->mask[cnt1];
  905. LPC_CANAF_RAM->mask[cnt1] = entry1;
  906. }
  907. //remove all remaining entry of this section one place up
  908. bound1 = total - cnt1;
  909. while(bound1--)
  910. {
  911. cnt1++;
  912. buf1 = LPC_CANAF_RAM->mask[cnt1];
  913. LPC_CANAF_RAM->mask[cnt1] = buf0;
  914. buf0 = buf1;
  915. }
  916. }
  917. CANAF_gstd_cnt++;
  918. //update address values
  919. LPC_CANAF->EFF_sa +=0x04 ;
  920. LPC_CANAF->EFF_GRP_sa +=0x04;
  921. LPC_CANAF->ENDofTable +=0x04;
  922. }
  923. /*********Add Group of Extended Identifier Frame Format************/
  924. else
  925. {
  926. if ((total >= 511)){//don't have enough space
  927. return CAN_OBJECTS_FULL_ERROR;
  928. }
  929. lowerID &= 0x1FFFFFFF; //mask ID
  930. upperID &= 0x1FFFFFFF;
  931. entry1 = (tmp << 29)|(lowerID << 0);
  932. entry2 = (tmp << 29)|(upperID << 0);
  933. cnt1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt + CANAF_ext_cnt;
  934. //if this is the first Group standard ID entry
  935. if(CANAF_gext_cnt == 0)
  936. {
  937. LPC_CANAF_RAM->mask[cnt1] = entry1;
  938. LPC_CANAF_RAM->mask[cnt1+1] = entry2;
  939. }
  940. else
  941. {
  942. //find the position to add new Group entry
  943. bound1 = ((CANAF_FullCAN_cnt+1)>>1) + ((CANAF_std_cnt + 1) >> 1) + CANAF_gstd_cnt \
  944. + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
  945. while(cnt1 < bound1)
  946. {
  947. while((LPC_CANAF_RAM->mask[cnt1] >>29)< tmp) //increase until meet greater or equal controller
  948. cnt1++;
  949. buf0 = LPC_CANAF_RAM->mask[cnt1];
  950. buf1 = LPC_CANAF_RAM->mask[cnt1+1];
  951. if((LPC_CANAF_RAM->mask[cnt1] >> 29)> (entry1 >> 29)) //meet greater controller
  952. {
  953. //add at this position
  954. LPC_CANAF_RAM->mask[cnt1] = entry1;
  955. LPC_CANAF_RAM->mask[++cnt1] = entry2;
  956. break;
  957. }
  958. else //meet equal controller
  959. {
  960. LID = buf0 & 0x1FFFFFFF; //mask ID
  961. UID = buf1 & 0x1FFFFFFF;
  962. if (upperID <= LID)
  963. {
  964. //add new entry before this entry
  965. LPC_CANAF_RAM->mask[cnt1] = entry1;
  966. LPC_CANAF_RAM->mask[++cnt1] = entry2;
  967. break;
  968. }
  969. else if (lowerID >= UID)
  970. {
  971. //load next entry to compare
  972. cnt1 +=2;
  973. }
  974. else
  975. return CAN_CONFLICT_ID_ERROR;
  976. }
  977. }
  978. if(cnt1 >= bound1)
  979. {
  980. //add new entry at the last position in this list
  981. buf0 = LPC_CANAF_RAM->mask[cnt1];
  982. buf1 = LPC_CANAF_RAM->mask[cnt1+1];
  983. LPC_CANAF_RAM->mask[cnt1] = entry1;
  984. LPC_CANAF_RAM->mask[++cnt1] = entry2;
  985. }
  986. //remove all remaining entry of this section two place up
  987. bound1 = total - cnt1 + 1;
  988. cnt1++;
  989. while(bound1>0)
  990. {
  991. entry1 = LPC_CANAF_RAM->mask[cnt1];
  992. entry2 = LPC_CANAF_RAM->mask[cnt1+1];
  993. LPC_CANAF_RAM->mask[cnt1] = buf0;
  994. LPC_CANAF_RAM->mask[cnt1+1] = buf1;
  995. buf0 = entry1;
  996. buf1 = entry2;
  997. cnt1 +=2;
  998. bound1 -=2;
  999. }
  1000. }
  1001. CANAF_gext_cnt++;
  1002. //update address values
  1003. LPC_CANAF->ENDofTable +=0x08;
  1004. }
  1005. LPC_CANAF->AFMR = 0x04;
  1006. return CAN_OK;
  1007. }
  1008. /********************************************************************//**
  1009. * @brief Remove AFLUT entry (FullCAN entry and Explicit Standard entry)
  1010. * @param[in] EntryType: the type of entry that want to remove, should be:
  1011. * - FULLCAN_ENTRY
  1012. * - EXPLICIT_STANDARD_ENTRY
  1013. * - GROUP_STANDARD_ENTRY
  1014. * - EXPLICIT_EXTEND_ENTRY
  1015. * - GROUP_EXTEND_ENTRY
  1016. * @param[in] position: the position of this entry in its section
  1017. * Note: the first position is 0
  1018. * @return CAN_ERROR, could be:
  1019. * - CAN_OK: removing is successful
  1020. * - CAN_ENTRY_NOT_EXIT_ERROR: entry want to remove is not exit
  1021. *********************************************************************/
  1022. CAN_ERROR CAN_RemoveEntry(AFLUT_ENTRY_Type EntryType, uint16_t position)
  1023. {
  1024. uint16_t cnt, bound, total;
  1025. uint32_t buf0, buf1;
  1026. CHECK_PARAM(PARAM_AFLUT_ENTRY_TYPE(EntryType));
  1027. CHECK_PARAM(PARAM_POSITION(position));
  1028. /* Setup Acceptance Filter Configuration
  1029. Acceptance Filter Mode Register = Off */
  1030. LPC_CANAF->AFMR = 0x00000001;
  1031. total = ((CANAF_FullCAN_cnt+1)>>1)+((CANAF_std_cnt + 1) >> 1) + \
  1032. CANAF_gstd_cnt + CANAF_ext_cnt + (CANAF_gext_cnt<<1);
  1033. /************** Remove FullCAN Entry *************/
  1034. if(EntryType == FULLCAN_ENTRY)
  1035. {
  1036. if((CANAF_FullCAN_cnt==0)||(position >= CANAF_FullCAN_cnt))
  1037. {
  1038. return CAN_ENTRY_NOT_EXIT_ERROR;
  1039. }
  1040. else
  1041. {
  1042. cnt = position >> 1;
  1043. buf0 = LPC_CANAF_RAM->mask[cnt];
  1044. bound = (CANAF_FullCAN_cnt - position -1)>>1;
  1045. if((position & 0x0001) == 0) //event position
  1046. {
  1047. while(bound--)
  1048. {
  1049. //remove all remaining FullCAN entry one place down
  1050. buf1 = LPC_CANAF_RAM->mask[cnt+1];
  1051. LPC_CANAF_RAM->mask[cnt] = (buf1 >> 16) | (buf0 << 16);
  1052. buf0 = buf1;
  1053. cnt++;
  1054. }
  1055. }
  1056. else //odd position
  1057. {
  1058. while(bound--)
  1059. {
  1060. //remove all remaining FullCAN entry one place down
  1061. buf1 = LPC_CANAF_RAM->mask[cnt+1];
  1062. LPC_CANAF_RAM->mask[cnt] = (buf0 & 0xFFFF0000)|(buf1 >> 16);
  1063. LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+1] << 16;
  1064. buf0 = buf1<<16;
  1065. cnt++;
  1066. }
  1067. }
  1068. if((CANAF_FullCAN_cnt & 0x0001) == 0)
  1069. {
  1070. if((position & 0x0001)==0)
  1071. LPC_CANAF_RAM->mask[cnt] = (buf0 << 16) | (0x0000FFFF);
  1072. else
  1073. LPC_CANAF_RAM->mask[cnt] = buf0 | 0x0000FFFF;
  1074. }
  1075. else
  1076. {
  1077. //remove all remaining section one place down
  1078. cnt = (CANAF_FullCAN_cnt + 1)>>1;
  1079. bound = total + CANAF_FullCAN_cnt * 3;
  1080. while(bound>cnt)
  1081. {
  1082. LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
  1083. cnt++;
  1084. }
  1085. LPC_CANAF_RAM->mask[cnt-1]=0x00;
  1086. //update address values
  1087. LPC_CANAF->SFF_sa -=0x04;
  1088. LPC_CANAF->SFF_GRP_sa -=0x04 ;
  1089. LPC_CANAF->EFF_sa -=0x04 ;
  1090. LPC_CANAF->EFF_GRP_sa -=0x04;
  1091. LPC_CANAF->ENDofTable -=0x04;
  1092. }
  1093. CANAF_FullCAN_cnt--;
  1094. //delete its FullCAN Object in the FullCAN Object section
  1095. //remove all remaining FullCAN Object three place down
  1096. cnt = total + position * 3;
  1097. bound = (CANAF_FullCAN_cnt - position + 1) * 3;
  1098. while(bound)
  1099. {
  1100. LPC_CANAF_RAM->mask[cnt]=LPC_CANAF_RAM->mask[cnt+3];;
  1101. LPC_CANAF_RAM->mask[cnt+1]=LPC_CANAF_RAM->mask[cnt+4];
  1102. LPC_CANAF_RAM->mask[cnt+2]=LPC_CANAF_RAM->mask[cnt+5];
  1103. bound -=3;
  1104. cnt +=3;
  1105. }
  1106. }
  1107. }
  1108. /************** Remove Explicit Standard ID Entry *************/
  1109. else if(EntryType == EXPLICIT_STANDARD_ENTRY)
  1110. {
  1111. if((CANAF_std_cnt==0)||(position >= CANAF_std_cnt))
  1112. {
  1113. return CAN_ENTRY_NOT_EXIT_ERROR;
  1114. }
  1115. else
  1116. {
  1117. cnt = ((CANAF_FullCAN_cnt+1)>>1)+ (position >> 1);
  1118. buf0 = LPC_CANAF_RAM->mask[cnt];
  1119. bound = (CANAF_std_cnt - position - 1)>>1;
  1120. if((position & 0x0001) == 0) //event position
  1121. {
  1122. while(bound--)
  1123. {
  1124. //remove all remaining FullCAN entry one place down
  1125. buf1 = LPC_CANAF_RAM->mask[cnt+1];
  1126. LPC_CANAF_RAM->mask[cnt] = (buf1 >> 16) | (buf0 << 16);
  1127. buf0 = buf1;
  1128. cnt++;
  1129. }
  1130. }
  1131. else //odd position
  1132. {
  1133. while(bound--)
  1134. {
  1135. //remove all remaining FullCAN entry one place down
  1136. buf1 = LPC_CANAF_RAM->mask[cnt+1];
  1137. LPC_CANAF_RAM->mask[cnt] = (buf0 & 0xFFFF0000)|(buf1 >> 16);
  1138. LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+1] << 16;
  1139. buf0 = buf1<<16;
  1140. cnt++;
  1141. }
  1142. }
  1143. if((CANAF_std_cnt & 0x0001) == 0)
  1144. {
  1145. if((position & 0x0001)==0)
  1146. LPC_CANAF_RAM->mask[cnt] = (buf0 << 16) | (0x0000FFFF);
  1147. else
  1148. LPC_CANAF_RAM->mask[cnt] = buf0 | 0x0000FFFF;
  1149. }
  1150. else
  1151. {
  1152. //remove all remaining section one place down
  1153. cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1);
  1154. bound = total + CANAF_FullCAN_cnt * 3;
  1155. while(bound>cnt)
  1156. {
  1157. LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
  1158. cnt++;
  1159. }
  1160. LPC_CANAF_RAM->mask[cnt-1]=0x00;
  1161. //update address value
  1162. LPC_CANAF->SFF_GRP_sa -=0x04 ;
  1163. LPC_CANAF->EFF_sa -=0x04 ;
  1164. LPC_CANAF->EFF_GRP_sa -=0x04;
  1165. LPC_CANAF->ENDofTable -=0x04;
  1166. }
  1167. CANAF_std_cnt--;
  1168. }
  1169. }
  1170. /************** Remove Group of Standard ID Entry *************/
  1171. else if(EntryType == GROUP_STANDARD_ENTRY)
  1172. {
  1173. if((CANAF_gstd_cnt==0)||(position >= CANAF_gstd_cnt))
  1174. {
  1175. return CAN_ENTRY_NOT_EXIT_ERROR;
  1176. }
  1177. else
  1178. {
  1179. cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1)+ position + 1;
  1180. bound = total + CANAF_FullCAN_cnt * 3;
  1181. while (cnt<bound)
  1182. {
  1183. LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
  1184. cnt++;
  1185. }
  1186. LPC_CANAF_RAM->mask[cnt-1]=0x00;
  1187. }
  1188. CANAF_gstd_cnt--;
  1189. //update address value
  1190. LPC_CANAF->EFF_sa -=0x04;
  1191. LPC_CANAF->EFF_GRP_sa -=0x04;
  1192. LPC_CANAF->ENDofTable -=0x04;
  1193. }
  1194. /************** Remove Explicit Extended ID Entry *************/
  1195. else if(EntryType == EXPLICIT_EXTEND_ENTRY)
  1196. {
  1197. if((CANAF_ext_cnt==0)||(position >= CANAF_ext_cnt))
  1198. {
  1199. return CAN_ENTRY_NOT_EXIT_ERROR;
  1200. }
  1201. else
  1202. {
  1203. cnt = ((CANAF_FullCAN_cnt + 1)>>1) + ((CANAF_std_cnt + 1) >> 1)+ CANAF_gstd_cnt + position + 1;
  1204. bound = total + CANAF_FullCAN_cnt * 3;
  1205. while (cnt<bound)
  1206. {
  1207. LPC_CANAF_RAM->mask[cnt-1] = LPC_CANAF_RAM->mask[cnt];
  1208. cnt++;
  1209. }
  1210. LPC_CANAF_RAM->mask[cnt-1]=0x00;
  1211. }
  1212. CANAF_ext_cnt--;
  1213. LPC_CANAF->EFF_GRP_sa -=0x04;
  1214. LPC_CANAF->ENDofTable -=0x04;
  1215. }
  1216. /************** Remove Group of Extended ID Entry *************/
  1217. else
  1218. {
  1219. if((CANAF_gext_cnt==0)||(position >= CANAF_gext_cnt))
  1220. {
  1221. return CAN_ENTRY_NOT_EXIT_ERROR;
  1222. }
  1223. else
  1224. {
  1225. cnt = total - (CANAF_gext_cnt<<1) + (position<<1);
  1226. bound = total + CANAF_FullCAN_cnt * 3;
  1227. while (cnt<bound)
  1228. {
  1229. //remove all remaining entry two place up
  1230. LPC_CANAF_RAM->mask[cnt] = LPC_CANAF_RAM->mask[cnt+2];
  1231. LPC_CANAF_RAM->mask[cnt+1] = LPC_CANAF_RAM->mask[cnt+3];
  1232. cnt+=2;
  1233. }
  1234. }
  1235. CANAF_gext_cnt--;
  1236. LPC_CANAF->ENDofTable -=0x08;
  1237. }
  1238. LPC_CANAF->AFMR = 0x04;
  1239. return CAN_OK;
  1240. }
  1241. /********************************************************************//**
  1242. * @brief Send message data
  1243. * @param[in] CANx pointer to LPC_CAN_TypeDef, should be:
  1244. * - LPC_CAN1: CAN1 peripheral
  1245. * - LPC_CAN2: CAN2 peripheral
  1246. * @param[in] CAN_Msg point to the CAN_MSG_Type Structure, it contains message
  1247. * information such as: ID, DLC, RTR, ID Format
  1248. * @return Status:
  1249. * - SUCCESS: send message successfully
  1250. * - ERROR: send message unsuccessfully
  1251. *********************************************************************/
  1252. Status CAN_SendMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
  1253. {
  1254. uint32_t data;
  1255. CHECK_PARAM(PARAM_CANx(CANx));
  1256. CHECK_PARAM(PARAM_ID_FORMAT(CAN_Msg->format));
  1257. if(CAN_Msg->format==STD_ID_FORMAT)
  1258. {
  1259. CHECK_PARAM(PARAM_ID_11(CAN_Msg->id));
  1260. }
  1261. else
  1262. {
  1263. CHECK_PARAM(PARAM_ID_29(CAN_Msg->id));
  1264. }
  1265. CHECK_PARAM(PARAM_DLC(CAN_Msg->len));
  1266. CHECK_PARAM(PARAM_FRAME_TYPE(CAN_Msg->type));
  1267. //Check status of Transmit Buffer 1
  1268. if (CANx->SR & (1<<2))
  1269. {
  1270. /* Transmit Channel 1 is available */
  1271. /* Write frame informations and frame data into its CANxTFI1,
  1272. * CANxTID1, CANxTDA1, CANxTDB1 register */
  1273. CANx->TFI1 &= ~0x000F0000;
  1274. CANx->TFI1 |= (CAN_Msg->len)<<16;
  1275. if(CAN_Msg->type == REMOTE_FRAME)
  1276. {
  1277. CANx->TFI1 |= (1<<30); //set bit RTR
  1278. }
  1279. else
  1280. {
  1281. CANx->TFI1 &= ~(1<<30);
  1282. }
  1283. if(CAN_Msg->format == EXT_ID_FORMAT)
  1284. {
  1285. CANx->TFI1 |= (0x80000000); //set bit FF
  1286. }
  1287. else
  1288. {
  1289. CANx->TFI1 &= ~(0x80000000);
  1290. }
  1291. /* Write CAN ID*/
  1292. CANx->TID1 = CAN_Msg->id;
  1293. /*Write first 4 data bytes*/
  1294. data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24);
  1295. CANx->TDA1 = data;
  1296. /*Write second 4 data bytes*/
  1297. data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24);
  1298. CANx->TDB1 = data;
  1299. /*Write transmission request*/
  1300. CANx->CMR = 0x21;
  1301. return SUCCESS;
  1302. }
  1303. //check status of Transmit Buffer 2
  1304. else if(CANx->SR & (1<<10))
  1305. {
  1306. /* Transmit Channel 2 is available */
  1307. /* Write frame informations and frame data into its CANxTFI2,
  1308. * CANxTID2, CANxTDA2, CANxTDB2 register */
  1309. CANx->TFI2 &= ~0x000F0000;
  1310. CANx->TFI2 |= (CAN_Msg->len)<<16;
  1311. if(CAN_Msg->type == REMOTE_FRAME)
  1312. {
  1313. CANx->TFI2 |= (1<<30); //set bit RTR
  1314. }
  1315. else
  1316. {
  1317. CANx->TFI2 &= ~(1<<30);
  1318. }
  1319. if(CAN_Msg->format == EXT_ID_FORMAT)
  1320. {
  1321. CANx->TFI2 |= (0x80000000); //set bit FF
  1322. }
  1323. else
  1324. {
  1325. CANx->TFI2 &= ~(0x80000000);
  1326. }
  1327. /* Write CAN ID*/
  1328. CANx->TID2 = CAN_Msg->id;
  1329. /*Write first 4 data bytes*/
  1330. data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24);
  1331. CANx->TDA2 = data;
  1332. /*Write second 4 data bytes*/
  1333. data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24);
  1334. CANx->TDB2 = data;
  1335. /*Write transmission request*/
  1336. CANx->CMR = 0x41;
  1337. return SUCCESS;
  1338. }
  1339. //check status of Transmit Buffer 3
  1340. else if (CANx->SR & (1<<18))
  1341. {
  1342. /* Transmit Channel 3 is available */
  1343. /* Write frame informations and frame data into its CANxTFI3,
  1344. * CANxTID3, CANxTDA3, CANxTDB3 register */
  1345. CANx->TFI3 &= ~0x000F0000;
  1346. CANx->TFI3 |= (CAN_Msg->len)<<16;
  1347. if(CAN_Msg->type == REMOTE_FRAME)
  1348. {
  1349. CANx->TFI3 |= (1<<30); //set bit RTR
  1350. }
  1351. else
  1352. {
  1353. CANx->TFI3 &= ~(1<<30);
  1354. }
  1355. if(CAN_Msg->format == EXT_ID_FORMAT)
  1356. {
  1357. CANx->TFI3 |= (0x80000000); //set bit FF
  1358. }
  1359. else
  1360. {
  1361. CANx->TFI3 &= ~(0x80000000);
  1362. }
  1363. /* Write CAN ID*/
  1364. CANx->TID3 = CAN_Msg->id;
  1365. /*Write first 4 data bytes*/
  1366. data = (CAN_Msg->dataA[0])|(((CAN_Msg->dataA[1]))<<8)|((CAN_Msg->dataA[2])<<16)|((CAN_Msg->dataA[3])<<24);
  1367. CANx->TDA3 = data;
  1368. /*Write second 4 data bytes*/
  1369. data = (CAN_Msg->dataB[0])|(((CAN_Msg->dataB[1]))<<8)|((CAN_Msg->dataB[2])<<16)|((CAN_Msg->dataB[3])<<24);
  1370. CANx->TDB3 = data;
  1371. /*Write transmission request*/
  1372. CANx->CMR = 0x81;
  1373. return SUCCESS;
  1374. }
  1375. else
  1376. {
  1377. return ERROR;
  1378. }
  1379. }
  1380. /********************************************************************//**
  1381. * @brief Receive message data
  1382. * @param[in] CANx pointer to LPC_CAN_TypeDef, should be:
  1383. * - LPC_CAN1: CAN1 peripheral
  1384. * - LPC_CAN2: CAN2 peripheral
  1385. * @param[in] CAN_Msg point to the CAN_MSG_Type Struct, it will contain received
  1386. * message information such as: ID, DLC, RTR, ID Format
  1387. * @return Status:
  1388. * - SUCCESS: receive message successfully
  1389. * - ERROR: receive message unsuccessfully
  1390. *********************************************************************/
  1391. Status CAN_ReceiveMsg (LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg)
  1392. {
  1393. uint32_t data;
  1394. CHECK_PARAM(PARAM_CANx(CANx));
  1395. //check status of Receive Buffer
  1396. if((CANx->SR &0x00000001))
  1397. {
  1398. /* Receive message is available */
  1399. /* Read frame informations */
  1400. CAN_Msg->format = (uint8_t)(((CANx->RFS) & 0x80000000)>>31);
  1401. CAN_Msg->type = (uint8_t)(((CANx->RFS) & 0x40000000)>>30);
  1402. CAN_Msg->len = (uint8_t)(((CANx->RFS) & 0x000F0000)>>16);
  1403. /* Read CAN message identifier */
  1404. CAN_Msg->id = CANx->RID;
  1405. /* Read the data if received message was DATA FRAME */
  1406. if (CAN_Msg->type == DATA_FRAME)
  1407. {
  1408. /* Read first 4 data bytes */
  1409. data = CANx->RDA;
  1410. *((uint8_t *) &CAN_Msg->dataA[0])= data & 0x000000FF;
  1411. *((uint8_t *) &CAN_Msg->dataA[1])= (data & 0x0000FF00)>>8;;
  1412. *((uint8_t *) &CAN_Msg->dataA[2])= (data & 0x00FF0000)>>16;
  1413. *((uint8_t *) &CAN_Msg->dataA[3])= (data & 0xFF000000)>>24;
  1414. /* Read second 4 data bytes */
  1415. data = CANx->RDB;
  1416. *((uint8_t *) &CAN_Msg->dataB[0])= data & 0x000000FF;
  1417. *((uint8_t *) &CAN_Msg->dataB[1])= (data & 0x0000FF00)>>8;
  1418. *((uint8_t *) &CAN_Msg->dataB[2])= (data & 0x00FF0000)>>16;
  1419. *((uint8_t *) &CAN_Msg->dataB[3])= (data & 0xFF000000)>>24;
  1420. /*release receive buffer*/
  1421. CANx->CMR = 0x04;
  1422. }
  1423. else
  1424. {
  1425. /* Received Frame is a Remote Frame, not have data, we just receive
  1426. * message information only */
  1427. CANx->CMR = 0x04; /*release receive buffer*/
  1428. return SUCCESS;
  1429. }
  1430. }
  1431. else
  1432. {
  1433. // no receive message available
  1434. return ERROR;
  1435. }
  1436. return SUCCESS;
  1437. }
  1438. /********************************************************************//**
  1439. * @brief Receive FullCAN Object
  1440. * @param[in] CANAFx: CAN Acceptance Filter register, should be: LPC_CANAF
  1441. * @param[in] CAN_Msg point to the CAN_MSG_Type Struct, it will contain received
  1442. * message information such as: ID, DLC, RTR, ID Format
  1443. * @return CAN_ERROR, could be:
  1444. * - CAN_FULL_OBJ_NOT_RCV: FullCAN Object is not be received
  1445. * - CAN_OK: Received FullCAN Object successful
  1446. *
  1447. *********************************************************************/
  1448. CAN_ERROR FCAN_ReadObj (LPC_CANAF_TypeDef* CANAFx, CAN_MSG_Type *CAN_Msg)
  1449. {
  1450. uint32_t *pSrc, data;
  1451. uint32_t interrut_word, msg_idx, test_bit, head_idx, tail_idx;
  1452. CHECK_PARAM(PARAM_CANAFx(CANAFx));
  1453. interrut_word = 0;
  1454. if (LPC_CANAF->FCANIC0 != 0)
  1455. {
  1456. interrut_word = LPC_CANAF->FCANIC0;
  1457. head_idx = 0;
  1458. tail_idx = 31;
  1459. }
  1460. else if (LPC_CANAF->FCANIC1 != 0)
  1461. {
  1462. interrut_word = LPC_CANAF->FCANIC1;
  1463. head_idx = 32;
  1464. tail_idx = 63;
  1465. }
  1466. if (interrut_word != 0)
  1467. {
  1468. /* Detect for interrupt pending */
  1469. msg_idx = 0;
  1470. for (msg_idx = head_idx; msg_idx <= tail_idx; msg_idx++)
  1471. {
  1472. test_bit = interrut_word & 0x1;
  1473. interrut_word = interrut_word >> 1;
  1474. if (test_bit)
  1475. {
  1476. pSrc = (uint32_t *) (LPC_CANAF->ENDofTable + LPC_CANAF_RAM_BASE + msg_idx * 12);
  1477. /* Has been finished updating the content */
  1478. if ((*pSrc & 0x03000000L) == 0x03000000L)
  1479. {
  1480. /*clear semaphore*/
  1481. *pSrc &= 0xFCFFFFFF;
  1482. /*Set to DatA*/
  1483. pSrc++;
  1484. /* Copy to dest buf */
  1485. data = *pSrc;
  1486. *((uint8_t *) &CAN_Msg->dataA[0])= data & 0x000000FF;
  1487. *((uint8_t *) &CAN_Msg->dataA[1])= (data & 0x0000FF00)>>8;
  1488. *((uint8_t *) &CAN_Msg->dataA[2])= (data & 0x00FF0000)>>16;
  1489. *((uint8_t *) &CAN_Msg->dataA[3])= (data & 0xFF000000)>>24;
  1490. /*Set to DatB*/
  1491. pSrc++;
  1492. /* Copy to dest buf */
  1493. data = *pSrc;
  1494. *((uint8_t *) &CAN_Msg->dataB[0])= data & 0x000000FF;
  1495. *((uint8_t *) &CAN_Msg->dataB[1])= (data & 0x0000FF00)>>8;
  1496. *((uint8_t *) &CAN_Msg->dataB[2])= (data & 0x00FF0000)>>16;
  1497. *((uint8_t *) &CAN_Msg->dataB[3])= (data & 0xFF000000)>>24;
  1498. /*Back to Dat1*/
  1499. pSrc -= 2;
  1500. CAN_Msg->id = *pSrc & 0x7FF;
  1501. CAN_Msg->len = (uint8_t) (*pSrc >> 16) & 0x0F;
  1502. CAN_Msg->format = 0; //FullCAN Object ID always is 11-bit value
  1503. CAN_Msg->type = (uint8_t)(*pSrc >> 30) &0x01;
  1504. /*Re-read semaphore*/
  1505. if ((*pSrc & 0x03000000L) == 0)
  1506. {
  1507. return CAN_OK;
  1508. }
  1509. }
  1510. }
  1511. }
  1512. }
  1513. return CAN_FULL_OBJ_NOT_RCV;
  1514. }
  1515. /********************************************************************//**
  1516. * @brief Get CAN Control Status
  1517. * @param[in] CANx pointer to LPC_CAN_TypeDef, should be:
  1518. * - LPC_CAN1: CAN1 peripheral
  1519. * - LPC_CAN2: CAN2 peripheral
  1520. * @param[in] arg: type of CAN status to get from CAN status register
  1521. * Should be:
  1522. * - CANCTRL_GLOBAL_STS: CAN Global Status
  1523. * - CANCTRL_INT_CAP: CAN Interrupt and Capture
  1524. * - CANCTRL_ERR_WRN: CAN Error Warning Limit
  1525. * - CANCTRL_STS: CAN Control Status
  1526. * @return Current Control Status that you want to get value
  1527. *********************************************************************/
  1528. uint32_t CAN_GetCTRLStatus (LPC_CAN_TypeDef* CANx, CAN_CTRL_STS_Type arg)
  1529. {
  1530. CHECK_PARAM(PARAM_CANx(CANx));
  1531. CHECK_PARAM(PARAM_CTRL_STS_TYPE(arg));
  1532. switch (arg)
  1533. {
  1534. case CANCTRL_GLOBAL_STS:
  1535. return CANx->GSR;
  1536. case CANCTRL_INT_CAP:
  1537. return CANx->ICR;
  1538. case CANCTRL_ERR_WRN:
  1539. return CANx->EWL;
  1540. default: // CANCTRL_STS
  1541. return CANx->SR;
  1542. }
  1543. }
  1544. /********************************************************************//**
  1545. * @brief Get CAN Central Status
  1546. * @param[in] CANCRx point to LPC_CANCR_TypeDef, should be: LPC_CANCR
  1547. * @param[in] arg: type of CAN status to get from CAN Central status register
  1548. * Should be:
  1549. * - CANCR_TX_STS: Central CAN Tx Status
  1550. * - CANCR_RX_STS: Central CAN Rx Status
  1551. * - CANCR_MS: Central CAN Miscellaneous Status
  1552. * @return Current Central Status that you want to get value
  1553. *********************************************************************/
  1554. uint32_t CAN_GetCRStatus (LPC_CANCR_TypeDef* CANCRx, CAN_CR_STS_Type arg)
  1555. {
  1556. CHECK_PARAM(PARAM_CANCRx(CANCRx));
  1557. CHECK_PARAM(PARAM_CR_STS_TYPE(arg));
  1558. switch (arg)
  1559. {
  1560. case CANCR_TX_STS:
  1561. return CANCRx->CANTxSR;
  1562. case CANCR_RX_STS:
  1563. return CANCRx->CANRxSR;
  1564. default: // CANCR_MS
  1565. return CANCRx->CANMSR;
  1566. }
  1567. }
  1568. /********************************************************************//**
  1569. * @brief Enable/Disable CAN Interrupt
  1570. * @param[in] CANx pointer to LPC_CAN_TypeDef, should be:
  1571. * - LPC_CAN1: CAN1 peripheral
  1572. * - LPC_CAN2: CAN2 peripheral
  1573. * @param[in] arg: type of CAN interrupt that you want to enable/disable
  1574. * Should be:
  1575. * - CANINT_RIE: CAN Receiver Interrupt Enable
  1576. * - CANINT_TIE1: CAN Transmit Interrupt Enable
  1577. * - CANINT_EIE: CAN Error Warning Interrupt Enable
  1578. * - CANINT_DOIE: CAN Data Overrun Interrupt Enable
  1579. * - CANINT_WUIE: CAN Wake-Up Interrupt Enable
  1580. * - CANINT_EPIE: CAN Error Passive Interrupt Enable
  1581. * - CANINT_ALIE: CAN Arbitration Lost Interrupt Enable
  1582. * - CANINT_BEIE: CAN Bus Error Interrupt Enable
  1583. * - CANINT_IDIE: CAN ID Ready Interrupt Enable
  1584. * - CANINT_TIE2: CAN Transmit Interrupt Enable for Buffer2
  1585. * - CANINT_TIE3: CAN Transmit Interrupt Enable for Buffer3
  1586. * - CANINT_FCE: FullCAN Interrupt Enable
  1587. * @param[in] NewState: New state of this function, should be:
  1588. * - ENABLE
  1589. * - DISABLE
  1590. * @return none
  1591. *********************************************************************/
  1592. void CAN_IRQCmd (LPC_CAN_TypeDef* CANx, CAN_INT_EN_Type arg, FunctionalState NewState)
  1593. {
  1594. CHECK_PARAM(PARAM_CANx(CANx));
  1595. CHECK_PARAM(PARAM_INT_EN_TYPE(arg));
  1596. CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
  1597. if(NewState == ENABLE)
  1598. {
  1599. if(arg==CANINT_FCE)
  1600. {
  1601. LPC_CANAF->AFMR = 0x01;
  1602. LPC_CANAF->FCANIE = 0x01;
  1603. LPC_CANAF->AFMR = 0x04;
  1604. }
  1605. else
  1606. CANx->IER |= (1 << arg);
  1607. }
  1608. else
  1609. {
  1610. if(arg==CANINT_FCE){
  1611. LPC_CANAF->AFMR = 0x01;
  1612. LPC_CANAF->FCANIE = 0x01;
  1613. LPC_CANAF->AFMR = 0x00;
  1614. }
  1615. else
  1616. CANx->IER &= ~(1 << arg);
  1617. }
  1618. }
  1619. /********************************************************************//**
  1620. * @brief Setting Acceptance Filter mode
  1621. * @param[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF
  1622. * @param[in] AFMode: type of AF mode that you want to set, should be:
  1623. * - CAN_Normal: Normal mode
  1624. * - CAN_AccOff: Acceptance Filter Off Mode
  1625. * - CAN_AccBP: Acceptance Fileter Bypass Mode
  1626. * - CAN_eFCAN: FullCAN Mode Enhancement
  1627. * @return none
  1628. *********************************************************************/
  1629. void CAN_SetAFMode (LPC_CANAF_TypeDef* CANAFx, CAN_AFMODE_Type AFMode)
  1630. {
  1631. CHECK_PARAM(PARAM_CANAFx(CANAFx));
  1632. CHECK_PARAM(PARAM_AFMODE_TYPE(AFMode));
  1633. switch(AFMode)
  1634. {
  1635. case CAN_Normal:
  1636. CANAFx->AFMR = 0x00;
  1637. break;
  1638. case CAN_AccOff:
  1639. CANAFx->AFMR = 0x01;
  1640. break;
  1641. case CAN_AccBP:
  1642. CANAFx->AFMR = 0x02;
  1643. break;
  1644. case CAN_eFCAN:
  1645. CANAFx->AFMR = 0x04;
  1646. break;
  1647. }
  1648. }
  1649. /********************************************************************//**
  1650. * @brief Enable/Disable CAN Mode
  1651. * @param[in] CANx pointer to LPC_CAN_TypeDef, should be:
  1652. * - LPC_CAN1: CAN1 peripheral
  1653. * - LPC_CAN2: CAN2 peripheral
  1654. * @param[in] mode: type of CAN mode that you want to enable/disable, should be:
  1655. * - CAN_OPERATING_MODE: Normal Operating Mode
  1656. * - CAN_RESET_MODE: Reset Mode
  1657. * - CAN_LISTENONLY_MODE: Listen Only Mode
  1658. * - CAN_SELFTEST_MODE: Self Test Mode
  1659. * - CAN_TXPRIORITY_MODE: Transmit Priority Mode
  1660. * - CAN_SLEEP_MODE: Sleep Mode
  1661. * - CAN_RXPOLARITY_MODE: Receive Polarity Mode
  1662. * - CAN_TEST_MODE: Test Mode
  1663. * @param[in] NewState: New State of this function, should be:
  1664. * - ENABLE
  1665. * - DISABLE
  1666. * @return none
  1667. *********************************************************************/
  1668. void CAN_ModeConfig(LPC_CAN_TypeDef* CANx, CAN_MODE_Type mode, FunctionalState NewState)
  1669. {
  1670. CHECK_PARAM(PARAM_CANx(CANx));
  1671. CHECK_PARAM(PARAM_MODE_TYPE(mode));
  1672. CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
  1673. switch(mode)
  1674. {
  1675. case CAN_OPERATING_MODE:
  1676. CANx->MOD = 0x00;
  1677. break;
  1678. case CAN_RESET_MODE:
  1679. if(NewState == ENABLE)
  1680. CANx->MOD |=CAN_MOD_RM;
  1681. else
  1682. CANx->MOD &= ~CAN_MOD_RM;
  1683. break;
  1684. case CAN_LISTENONLY_MODE:
  1685. CANx->MOD |=CAN_MOD_RM;//Enter Reset mode
  1686. if(NewState == ENABLE)
  1687. CANx->MOD |=CAN_MOD_LOM;
  1688. else
  1689. CANx->MOD &=~CAN_MOD_LOM;
  1690. CANx->MOD &=~CAN_MOD_RM;//Release Reset mode
  1691. break;
  1692. case CAN_SELFTEST_MODE:
  1693. CANx->MOD |=CAN_MOD_RM;//Enter Reset mode
  1694. if(NewState == ENABLE)
  1695. CANx->MOD |=CAN_MOD_STM;
  1696. else
  1697. CANx->MOD &=~CAN_MOD_STM;
  1698. CANx->MOD &=~CAN_MOD_RM;//Release Reset mode
  1699. break;
  1700. case CAN_TXPRIORITY_MODE:
  1701. if(NewState == ENABLE)
  1702. CANx->MOD |=CAN_MOD_TPM;
  1703. else
  1704. CANx->MOD &=~CAN_MOD_TPM;
  1705. break;
  1706. case CAN_SLEEP_MODE:
  1707. if(NewState == ENABLE)
  1708. CANx->MOD |=CAN_MOD_SM;
  1709. else
  1710. CANx->MOD &=~CAN_MOD_SM;
  1711. break;
  1712. case CAN_RXPOLARITY_MODE:
  1713. if(NewState == ENABLE)
  1714. CANx->MOD |=CAN_MOD_RPM;
  1715. else
  1716. CANx->MOD &=~CAN_MOD_RPM;
  1717. break;
  1718. case CAN_TEST_MODE:
  1719. if(NewState == ENABLE)
  1720. CANx->MOD |=CAN_MOD_TM;
  1721. else
  1722. CANx->MOD &=~CAN_MOD_TM;
  1723. break;
  1724. }
  1725. }
  1726. /*********************************************************************//**
  1727. * @brief Set CAN command request
  1728. * @param[in] CANx point to CAN peripheral selected, should be:
  1729. * - LPC_CAN1: CAN1 peripheral
  1730. * - LPC_CAN2: CAN2 peripheral
  1731. * @param[in] CMRType command request type, should be:
  1732. * - CAN_CMR_TR: Transmission request
  1733. * - CAN_CMR_AT: Abort Transmission request
  1734. * - CAN_CMR_RRB: Release Receive Buffer request
  1735. * - CAN_CMR_CDO: Clear Data Overrun request
  1736. * - CAN_CMR_SRR: Self Reception request
  1737. * - CAN_CMR_STB1: Select Tx Buffer 1 request
  1738. * - CAN_CMR_STB2: Select Tx Buffer 2 request
  1739. * - CAN_CMR_STB3: Select Tx Buffer 3 request
  1740. * @return CANICR (CAN interrupt and Capture register) value
  1741. **********************************************************************/
  1742. void CAN_SetCommand(LPC_CAN_TypeDef* CANx, uint32_t CMRType)
  1743. {
  1744. CHECK_PARAM(PARAM_CANx(CANx));
  1745. CANx->CMR |= CMRType;
  1746. }
  1747. /*********************************************************************//**
  1748. * @brief Get CAN interrupt status
  1749. * @param[in] CANx point to CAN peripheral selected, should be:
  1750. * - LPC_CAN1: CAN1 peripheral
  1751. * - LPC_CAN2: CAN2 peripheral
  1752. * @return CANICR (CAN interrupt and Capture register) value
  1753. **********************************************************************/
  1754. uint32_t CAN_IntGetStatus(LPC_CAN_TypeDef* CANx)
  1755. {
  1756. CHECK_PARAM(PARAM_CANx(CANx));
  1757. return CANx->ICR;
  1758. }
  1759. /*********************************************************************//**
  1760. * @brief Check if FullCAN interrupt enable or not
  1761. * @param[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF
  1762. * @return IntStatus, could be:
  1763. * - SET: if FullCAN interrupt is enable
  1764. * - RESET: if FullCAN interrupt is disable
  1765. **********************************************************************/
  1766. IntStatus CAN_FullCANIntGetStatus (LPC_CANAF_TypeDef* CANAFx)
  1767. {
  1768. CHECK_PARAM( PARAM_CANAFx(CANAFx));
  1769. if (CANAFx->FCANIE)
  1770. return SET;
  1771. return RESET;
  1772. }
  1773. /*********************************************************************//**
  1774. * @brief Get value of FullCAN interrupt and capture register
  1775. * @param[in] CANAFx point to LPC_CANAF_TypeDef object, should be: LPC_CANAF
  1776. * @param[in] type: FullCAN IC type, should be:
  1777. * - FULLCAN_IC0: FullCAN Interrupt Capture 0
  1778. * - FULLCAN_IC1: FullCAN Interrupt Capture 1
  1779. * @return FCANIC0 or FCANIC1 (FullCAN interrupt and Capture register) value
  1780. **********************************************************************/
  1781. uint32_t CAN_FullCANPendGetStatus(LPC_CANAF_TypeDef* CANAFx, FullCAN_IC_Type type)
  1782. {
  1783. CHECK_PARAM(PARAM_CANAFx(CANAFx));
  1784. CHECK_PARAM( PARAM_FULLCAN_IC(type));
  1785. if (type == FULLCAN_IC0)
  1786. return CANAFx->FCANIC0;
  1787. return CANAFx->FCANIC1;
  1788. }
  1789. /* End of Public Variables ---------------------------------------------------------- */
  1790. /**
  1791. * @}
  1792. */
  1793. #endif /* _CAN */
  1794. /**
  1795. * @}
  1796. */
  1797. /* --------------------------------- End Of File ------------------------------ */