My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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lpc17xx_i2c.c 38KB

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  1. /**********************************************************************
  2. * $Id$ lpc17xx_i2c.c 2011-03-31
  3. *//**
  4. * @file lpc17xx_i2c.c
  5. * @brief Contains all functions support for I2C firmware
  6. * library on LPC17xx
  7. * @version 2.1
  8. * @date 31. Mar. 2011
  9. * @author NXP MCU SW Application Team
  10. *
  11. * Copyright(C) 2010, NXP Semiconductor
  12. * All rights reserved.
  13. *
  14. ***********************************************************************
  15. * Software that is described herein is for illustrative purposes only
  16. * which provides customers with programming information regarding the
  17. * products. This software is supplied "AS IS" without any warranties.
  18. * NXP Semiconductors assumes no responsibility or liability for the
  19. * use of the software, conveys no license or title under any patent,
  20. * copyright, or mask work right to the product. NXP Semiconductors
  21. * reserves the right to make changes in the software without
  22. * notification. NXP Semiconductors also make no representation or
  23. * warranty that such application will be suitable for the specified
  24. * use without further testing or modification.
  25. * Permission to use, copy, modify, and distribute this software and its
  26. * documentation is hereby granted, under NXP Semiconductors'
  27. * relevant copyright in the software, without fee, provided that it
  28. * is used in conjunction with NXP Semiconductors microcontrollers. This
  29. * copyright, permission, and disclaimer notice must appear in all copies of
  30. * this code.
  31. **********************************************************************/
  32. /* Peripheral group ----------------------------------------------------------- */
  33. /** @addtogroup I2C
  34. * @{
  35. */
  36. /* Includes ------------------------------------------------------------------- */
  37. #include "lpc17xx_i2c.h"
  38. #include "lpc17xx_clkpwr.h"
  39. #include "lpc17xx_pinsel.h"
  40. /* If this source file built with example, the LPC17xx FW library configuration
  41. * file in each example directory ("lpc17xx_libcfg.h") must be included,
  42. * otherwise the default FW library configuration file must be included instead
  43. */
  44. #ifdef __BUILD_WITH_EXAMPLE__
  45. #include "lpc17xx_libcfg.h"
  46. #else
  47. #include "lpc17xx_libcfg_default.h"
  48. #endif /* __BUILD_WITH_EXAMPLE__ */
  49. #ifdef _I2C
  50. /* Private Types -------------------------------------------------------------- */
  51. /** @defgroup I2C_Private_Types I2C Private Types
  52. * @{
  53. */
  54. /**
  55. * @brief I2C device configuration structure type
  56. */
  57. typedef struct
  58. {
  59. uint32_t txrx_setup; /* Transmission setup */
  60. int32_t dir; /* Current direction phase, 0 - write, 1 - read */
  61. } I2C_CFG_T;
  62. /**
  63. * @}
  64. */
  65. /* Private Variables ---------------------------------------------------------- */
  66. /**
  67. * @brief II2C driver data for I2C0, I2C1 and I2C2
  68. */
  69. static I2C_CFG_T i2cdat[3];
  70. static uint32_t I2C_MasterComplete[3];
  71. static uint32_t I2C_SlaveComplete[3];
  72. static uint32_t I2C_MonitorBufferIndex;
  73. /* Private Functions ---------------------------------------------------------- */
  74. /* Get I2C number */
  75. static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx);
  76. /* Generate a start condition on I2C bus (in master mode only) */
  77. static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx);
  78. /* Generate a stop condition on I2C bus (in master mode only) */
  79. static void I2C_Stop (LPC_I2C_TypeDef *I2Cx);
  80. /* I2C send byte subroutine */
  81. static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte);
  82. /* I2C get byte subroutine */
  83. static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack);
  84. /* I2C set clock (hz) */
  85. static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock);
  86. /*--------------------------------------------------------------------------------*/
  87. /********************************************************************//**
  88. * @brief Convert from I2C peripheral to number
  89. * @param[in] I2Cx: I2C peripheral selected, should be:
  90. * - LPC_I2C0
  91. * - LPC_I2C1
  92. * - LPC_I2C2
  93. * @return I2C number, could be: 0..2
  94. *********************************************************************/
  95. static int32_t I2C_getNum(LPC_I2C_TypeDef *I2Cx){
  96. if (I2Cx == LPC_I2C0) {
  97. return (0);
  98. } else if (I2Cx == LPC_I2C1) {
  99. return (1);
  100. } else if (I2Cx == LPC_I2C2) {
  101. return (2);
  102. }
  103. return (-1);
  104. }
  105. /********************************************************************//**
  106. * @brief Generate a start condition on I2C bus (in master mode only)
  107. * @param[in] I2Cx: I2C peripheral selected, should be:
  108. * - LPC_I2C0
  109. * - LPC_I2C1
  110. * - LPC_I2C2
  111. * @return value of I2C status register after generate a start condition
  112. *********************************************************************/
  113. static uint32_t I2C_Start (LPC_I2C_TypeDef *I2Cx)
  114. {
  115. // Reset STA, STO, SI
  116. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC|I2C_I2CONCLR_STOC|I2C_I2CONCLR_STAC;
  117. // Enter to Master Transmitter mode
  118. I2Cx->I2CONSET = I2C_I2CONSET_STA;
  119. // Wait for complete
  120. while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
  121. I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
  122. return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
  123. }
  124. /********************************************************************//**
  125. * @brief Generate a stop condition on I2C bus (in master mode only)
  126. * @param[in] I2Cx: I2C peripheral selected, should be:
  127. * - LPC_I2C0
  128. * - LPC_I2C1
  129. * - LPC_I2C2
  130. * @return None
  131. *********************************************************************/
  132. static void I2C_Stop (LPC_I2C_TypeDef *I2Cx)
  133. {
  134. /* Make sure start bit is not active */
  135. if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
  136. {
  137. I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
  138. }
  139. I2Cx->I2CONSET = I2C_I2CONSET_STO|I2C_I2CONSET_AA;
  140. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  141. }
  142. /********************************************************************//**
  143. * @brief Send a byte
  144. * @param[in] I2Cx: I2C peripheral selected, should be:
  145. * - LPC_I2C0
  146. * - LPC_I2C1
  147. * - LPC_I2C2
  148. * @param[in] databyte: number of byte
  149. * @return value of I2C status register after sending
  150. *********************************************************************/
  151. static uint32_t I2C_SendByte (LPC_I2C_TypeDef *I2Cx, uint8_t databyte)
  152. {
  153. uint32_t CodeStatus = I2Cx->I2STAT & I2C_STAT_CODE_BITMASK;
  154. if((CodeStatus != I2C_I2STAT_M_TX_START) &&
  155. (CodeStatus != I2C_I2STAT_M_TX_RESTART) &&
  156. (CodeStatus != I2C_I2STAT_M_TX_SLAW_ACK) &&
  157. (CodeStatus != I2C_I2STAT_M_TX_DAT_ACK) )
  158. {
  159. return CodeStatus;
  160. }
  161. /* Make sure start bit is not active */
  162. if (I2Cx->I2CONSET & I2C_I2CONSET_STA)
  163. {
  164. I2Cx->I2CONCLR = I2C_I2CONCLR_STAC;
  165. }
  166. I2Cx->I2DAT = databyte & I2C_I2DAT_BITMASK;
  167. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  168. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  169. return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
  170. }
  171. /********************************************************************//**
  172. * @brief Get a byte
  173. * @param[in] I2Cx: I2C peripheral selected, should be:
  174. * - LPC_I2C0
  175. * - LPC_I2C1
  176. * - LPC_I2C2
  177. * @param[out] retdat pointer to return data
  178. * @param[in] ack assert acknowledge or not, should be: TRUE/FALSE
  179. * @return value of I2C status register after sending
  180. *********************************************************************/
  181. static uint32_t I2C_GetByte (LPC_I2C_TypeDef *I2Cx, uint8_t *retdat, Bool ack)
  182. {
  183. *retdat = (uint8_t) (I2Cx->I2DAT & I2C_I2DAT_BITMASK);
  184. if (ack == TRUE)
  185. {
  186. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  187. }
  188. else
  189. {
  190. I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
  191. }
  192. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  193. return (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
  194. }
  195. /*********************************************************************//**
  196. * @brief Setup clock rate for I2C peripheral
  197. * @param[in] I2Cx I2C peripheral selected, should be:
  198. * - LPC_I2C0
  199. * - LPC_I2C1
  200. * - LPC_I2C2
  201. * @param[in] target_clock : clock of SSP (Hz)
  202. * @return None
  203. ***********************************************************************/
  204. static void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock)
  205. {
  206. uint32_t temp;
  207. CHECK_PARAM(PARAM_I2Cx(I2Cx));
  208. // Get PCLK of I2C controller
  209. if (I2Cx == LPC_I2C0)
  210. {
  211. temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C0) / target_clock;
  212. }
  213. else if (I2Cx == LPC_I2C1)
  214. {
  215. temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C1) / target_clock;
  216. }
  217. else if (I2Cx == LPC_I2C2)
  218. {
  219. temp = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_I2C2) / target_clock;
  220. }
  221. /* Set the I2C clock value to register */
  222. I2Cx->I2SCLH = (uint32_t)(temp / 2);
  223. I2Cx->I2SCLL = (uint32_t)(temp - I2Cx->I2SCLH);
  224. }
  225. /* End of Private Functions --------------------------------------------------- */
  226. /* Public Functions ----------------------------------------------------------- */
  227. /** @addtogroup I2C_Public_Functions
  228. * @{
  229. */
  230. /********************************************************************//**
  231. * @brief Initializes the I2Cx peripheral with specified parameter.
  232. * @param[in] I2Cx I2C peripheral selected, should be
  233. * - LPC_I2C0
  234. * - LPC_I2C1
  235. * - LPC_I2C2
  236. * @param[in] clockrate Target clock rate value to initialized I2C
  237. * peripheral (Hz)
  238. * @return None
  239. *********************************************************************/
  240. void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate)
  241. {
  242. CHECK_PARAM(PARAM_I2Cx(I2Cx));
  243. if (I2Cx==LPC_I2C0)
  244. {
  245. /* Set up clock and power for I2C0 module */
  246. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, ENABLE);
  247. /* As default, peripheral clock for I2C0 module
  248. * is set to FCCLK / 2 */
  249. CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C0, CLKPWR_PCLKSEL_CCLK_DIV_2);
  250. }
  251. else if (I2Cx==LPC_I2C1)
  252. {
  253. /* Set up clock and power for I2C1 module */
  254. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, ENABLE);
  255. /* As default, peripheral clock for I2C1 module
  256. * is set to FCCLK / 2 */
  257. CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C1, CLKPWR_PCLKSEL_CCLK_DIV_2);
  258. }
  259. else if (I2Cx==LPC_I2C2)
  260. {
  261. /* Set up clock and power for I2C2 module */
  262. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, ENABLE);
  263. /* As default, peripheral clock for I2C2 module
  264. * is set to FCCLK / 2 */
  265. CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_I2C2, CLKPWR_PCLKSEL_CCLK_DIV_2);
  266. }
  267. else {
  268. // Up-Support this device
  269. return;
  270. }
  271. /* Set clock rate */
  272. I2C_SetClock(I2Cx, clockrate);
  273. /* Set I2C operation to default */
  274. I2Cx->I2CONCLR = (I2C_I2CONCLR_AAC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_I2ENC);
  275. }
  276. /*********************************************************************//**
  277. * @brief De-initializes the I2C peripheral registers to their
  278. * default reset values.
  279. * @param[in] I2Cx I2C peripheral selected, should be
  280. * - LPC_I2C0
  281. * - LPC_I2C1
  282. * - LPC_I2C2
  283. * @return None
  284. **********************************************************************/
  285. void I2C_DeInit(LPC_I2C_TypeDef* I2Cx)
  286. {
  287. CHECK_PARAM(PARAM_I2Cx(I2Cx));
  288. /* Disable I2C control */
  289. I2Cx->I2CONCLR = I2C_I2CONCLR_I2ENC;
  290. if (I2Cx==LPC_I2C0)
  291. {
  292. /* Disable power for I2C0 module */
  293. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C0, DISABLE);
  294. }
  295. else if (I2Cx==LPC_I2C1)
  296. {
  297. /* Disable power for I2C1 module */
  298. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C1, DISABLE);
  299. }
  300. else if (I2Cx==LPC_I2C2)
  301. {
  302. /* Disable power for I2C2 module */
  303. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCI2C2, DISABLE);
  304. }
  305. }
  306. /*********************************************************************//**
  307. * @brief Enable or disable I2C peripheral's operation
  308. * @param[in] I2Cx I2C peripheral selected, should be
  309. * - LPC_I2C0
  310. * - LPC_I2C1
  311. * - LPC_I2C2
  312. * @param[in] NewState New State of I2Cx peripheral's operation
  313. * @return none
  314. **********************************************************************/
  315. void I2C_Cmd(LPC_I2C_TypeDef* I2Cx, en_I2C_Mode Mode, FunctionalState NewState)
  316. {
  317. CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
  318. CHECK_PARAM(PARAM_I2Cx(I2Cx));
  319. if (NewState == ENABLE)
  320. {
  321. if(Mode != I2C_SLAVE_MODE)
  322. I2Cx->I2CONSET = I2C_I2CONSET_I2EN;
  323. else
  324. I2Cx->I2CONSET = I2C_I2CONSET_I2EN | I2C_I2CONSET_AA;
  325. }
  326. else
  327. {
  328. I2Cx->I2CONCLR = I2C_I2CONCLR_I2ENC;
  329. }
  330. }
  331. /*********************************************************************//**
  332. * @brief Enable/Disable interrupt for I2C peripheral
  333. * @param[in] I2Cx I2C peripheral selected, should be:
  334. * - LPC_I2C0
  335. * - LPC_I2C1
  336. * - LPC_I2C2
  337. * @param[in] NewState New State of I2C peripheral interrupt in NVIC core
  338. * should be:
  339. * - ENABLE: enable interrupt for this I2C peripheral
  340. * - DISABLE: disable interrupt for this I2C peripheral
  341. * @return None
  342. **********************************************************************/
  343. void I2C_IntCmd (LPC_I2C_TypeDef *I2Cx, Bool NewState)
  344. {
  345. if (NewState)
  346. {
  347. if(I2Cx == LPC_I2C0)
  348. {
  349. NVIC_EnableIRQ(I2C0_IRQn);
  350. }
  351. else if (I2Cx == LPC_I2C1)
  352. {
  353. NVIC_EnableIRQ(I2C1_IRQn);
  354. }
  355. else if (I2Cx == LPC_I2C2)
  356. {
  357. NVIC_EnableIRQ(I2C2_IRQn);
  358. }
  359. }
  360. else
  361. {
  362. if(I2Cx == LPC_I2C0)
  363. {
  364. NVIC_DisableIRQ(I2C0_IRQn);
  365. }
  366. else if (I2Cx == LPC_I2C1)
  367. {
  368. NVIC_DisableIRQ(I2C1_IRQn);
  369. }
  370. else if (I2Cx == LPC_I2C2)
  371. {
  372. NVIC_DisableIRQ(I2C2_IRQn);
  373. }
  374. }
  375. return;
  376. }
  377. /*********************************************************************//**
  378. * @brief Handle I2C Master states.
  379. * @param[in] I2Cx I2C peripheral selected, should be:
  380. * - LPC_I2C
  381. * - LPC_I2C1
  382. * - LPC_I2C2
  383. * @param[in] CodeStatus I2C state
  384. * @param[in] TransferCfg Pointer to a I2C_S_SETUP_Type structure that
  385. * contains specified information about the
  386. * configuration for master transfer.
  387. * @return It can be
  388. * - I2C_OK
  389. * -I2C_BYTE_RECV
  390. * -I2C_BYTE_SENT
  391. * -I2C_SEND_END
  392. * -I2C_RECV_END
  393. * - I2C_ERR
  394. * - I2C_NAK_RECV
  395. **********************************************************************/
  396. int32_t I2C_MasterHanleStates(LPC_I2C_TypeDef *I2Cx, uint32_t CodeStatus, I2C_M_SETUP_Type *TransferCfg)
  397. {
  398. uint8_t *txdat;
  399. uint8_t *rxdat;
  400. uint8_t tmp;
  401. int32_t Ret = I2C_OK;
  402. //get buffer to send/receive
  403. txdat = (uint8_t *) &TransferCfg->tx_data[TransferCfg->tx_count];
  404. rxdat = (uint8_t *) &TransferCfg->rx_data[TransferCfg->rx_count];
  405. switch(CodeStatus)
  406. {
  407. case I2C_I2STAT_M_TX_START:
  408. case I2C_I2STAT_M_TX_RESTART:
  409. //case I2C_I2STAT_M_RX_START:
  410. //case I2C_I2STAT_M_RX_RESTART
  411. // Send data first
  412. if(TransferCfg->tx_count < TransferCfg->tx_length)
  413. {
  414. /* Send slave address + WR direction bit = 0 ----------------------------------- */
  415. I2C_SendByte(I2Cx, (TransferCfg->sl_addr7bit << 1));
  416. Ret = I2C_BYTE_SENT;
  417. }
  418. else if (TransferCfg->rx_count < TransferCfg->rx_length)
  419. {
  420. /* Send slave address + RD direction bit = 1 ----------------------------------- */
  421. I2C_SendByte(I2Cx, ((TransferCfg->sl_addr7bit << 1) | 0x01));
  422. Ret = I2C_BYTE_SENT;
  423. }
  424. break;
  425. case I2C_I2STAT_M_TX_SLAW_ACK:
  426. case I2C_I2STAT_M_TX_DAT_ACK:
  427. if(TransferCfg->tx_count < TransferCfg->tx_length)
  428. {
  429. I2C_SendByte(I2Cx, *txdat);
  430. txdat++;
  431. TransferCfg->tx_count++;
  432. Ret = I2C_BYTE_SENT;
  433. }
  434. else
  435. {
  436. I2C_Stop(I2Cx);
  437. Ret = I2C_SEND_END;
  438. }
  439. break;
  440. case I2C_I2STAT_M_TX_DAT_NACK:
  441. I2C_Stop(I2Cx);
  442. Ret = I2C_SEND_END;
  443. break;
  444. case I2C_I2STAT_M_RX_ARB_LOST:
  445. //case I2C_I2STAT_M_TX_ARB_LOST:
  446. I2Cx->I2CONSET = I2C_I2CONSET_STA|I2C_I2CONSET_AA;
  447. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  448. break;
  449. case I2C_I2STAT_M_RX_SLAR_ACK:
  450. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  451. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  452. Ret = I2C_BYTE_RECV;
  453. break;
  454. case I2C_I2STAT_M_RX_DAT_ACK:
  455. if (TransferCfg->rx_count <TransferCfg->rx_length)
  456. {
  457. if (TransferCfg->rx_count < (TransferCfg->rx_length - 2))
  458. {
  459. I2C_GetByte(I2Cx, &tmp, TRUE);
  460. Ret = I2C_BYTE_RECV;
  461. }
  462. else // the next byte is the last byte, send NACK instead.
  463. {
  464. I2C_GetByte(I2Cx, &tmp, FALSE);
  465. Ret = I2C_BYTE_RECV;
  466. }
  467. *rxdat++ = tmp;
  468. TransferCfg->rx_count++;
  469. }
  470. else
  471. {
  472. Ret = I2C_RECV_END;
  473. }
  474. break;
  475. case I2C_I2STAT_M_RX_DAT_NACK:
  476. I2C_GetByte(I2Cx, &tmp, FALSE);
  477. *rxdat++ = tmp;
  478. TransferCfg->rx_count++;
  479. I2C_Stop(I2Cx);
  480. Ret = I2C_RECV_END;
  481. break;
  482. case I2C_I2STAT_M_RX_SLAR_NACK:
  483. case I2C_I2STAT_M_TX_SLAW_NACK:
  484. case I2C_I2STAT_BUS_ERROR:
  485. // Send STOP condition
  486. I2C_Stop(I2Cx);
  487. Ret = I2C_ERR;
  488. break;
  489. /* No status information */
  490. case I2C_I2STAT_NO_INF:
  491. default:
  492. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  493. break;
  494. }
  495. return Ret;
  496. }
  497. /*********************************************************************//**
  498. * @brief Handle I2C Slave states.
  499. * @param[in] I2Cx I2C peripheral selected, should be:
  500. * - LPC_I2C
  501. * - LPC_I2C1
  502. * - LPC_I2C2
  503. * @param[in] CodeStatus I2C state
  504. * @param[in] TransferCfg Pointer to a I2C_S_SETUP_Type structure that
  505. * contains specified information about the
  506. * configuration for master transfer.
  507. * @return It can be
  508. * - I2C_OK
  509. * -I2C_BYTE_RECV
  510. * -I2C_BYTE_SENT
  511. * -I2C_SEND_END
  512. * -I2C_RECV_END
  513. * - I2C_ERR
  514. * - I2C_NAK_RECV
  515. **********************************************************************/
  516. int32_t I2C_SlaveHanleStates(LPC_I2C_TypeDef *I2Cx, uint32_t CodeStatus, I2C_S_SETUP_Type *TransferCfg)
  517. {
  518. int32_t Ret = I2C_OK;
  519. uint8_t *txdat;
  520. uint8_t *rxdat;
  521. //get buffer to send/receive
  522. txdat = (uint8_t *) &TransferCfg->tx_data[TransferCfg->tx_count];
  523. rxdat = (uint8_t *) &TransferCfg->rx_data[TransferCfg->rx_count];
  524. switch (CodeStatus)
  525. {
  526. /* Reading phase -------------------------------------------------------- */
  527. /* Own SLA+R has been received, ACK has been returned */
  528. case I2C_I2STAT_S_RX_SLAW_ACK:
  529. /* General call address has been received, ACK has been returned */
  530. case I2C_I2STAT_S_RX_GENCALL_ACK:
  531. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  532. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  533. break;
  534. /* Arbitration has been lost in Slave Address + R/W bit as bus Master. General Call has
  535. been received and ACK has been returned.*/
  536. case I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL:
  537. I2Cx->I2CONSET = I2C_I2CONSET_AA|I2C_I2CONSET_STA;
  538. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  539. break;
  540. /* Previously addressed with own SLA;
  541. * DATA byte has been received;
  542. * ACK has been returned */
  543. case I2C_I2STAT_S_RX_ARB_LOST_M_SLA:
  544. case I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK:
  545. /*
  546. * All data bytes that over-flow the specified receive
  547. * data length, just ignore them.
  548. */
  549. if ((TransferCfg->rx_count < TransferCfg->rx_length) && (TransferCfg->rx_data != NULL))
  550. {
  551. *rxdat++ = (uint8_t)I2Cx->I2DAT;
  552. TransferCfg->rx_count++;
  553. Ret = I2C_BYTE_RECV;
  554. }
  555. if(TransferCfg->rx_count == (TransferCfg->rx_length) ) {
  556. I2Cx->I2CONCLR = I2C_I2CONCLR_AAC|I2C_I2CONCLR_SIC;
  557. Ret = I2C_BYTE_RECV;
  558. }
  559. else {
  560. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  561. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  562. }
  563. break;
  564. /* DATA has been received, Only the first data byte will be received with ACK. Additional
  565. data will be received with NOT ACK. */
  566. case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK:
  567. if ((TransferCfg->rx_count < TransferCfg->rx_length) && (TransferCfg->rx_data != NULL))
  568. {
  569. *rxdat++ = (uint8_t)I2Cx->I2DAT;
  570. TransferCfg->rx_count++;
  571. Ret = I2C_BYTE_RECV;
  572. }
  573. I2Cx->I2CONCLR = I2C_I2CONCLR_AAC|I2C_I2CONCLR_SIC;
  574. break;
  575. /* Writing phase -------------------------------------------------------- */
  576. /* Own SLA+R has been received, ACK has been returned */
  577. case I2C_I2STAT_S_TX_SLAR_ACK:
  578. /* Data has been transmitted, ACK has been received */
  579. case I2C_I2STAT_S_TX_DAT_ACK:
  580. /*
  581. * All data bytes that over-flow the specified receive
  582. * data length, just ignore them.
  583. */
  584. if ((TransferCfg->tx_count < TransferCfg->tx_length) && (TransferCfg->tx_data != NULL))
  585. {
  586. I2Cx->I2DAT = *txdat++;
  587. TransferCfg->tx_count++;
  588. Ret = I2C_BYTE_SENT;
  589. }
  590. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  591. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  592. break;
  593. /* Arbitration lost in Slave Address and R/W bit as bus Master. Own Slave Address + Read
  594. has been received, ACK has been returned. */
  595. case I2C_I2STAT_S_TX_ARB_LOST_M_SLA:
  596. if ((TransferCfg->tx_count < TransferCfg->tx_length) && (TransferCfg->tx_data != NULL))
  597. {
  598. I2Cx->I2DAT = *txdat++;
  599. TransferCfg->tx_count++;
  600. Ret = I2C_BYTE_SENT;
  601. }
  602. I2Cx->I2CONSET = I2C_I2CONSET_AA|I2C_I2CONSET_STA;
  603. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  604. break;
  605. case I2C_I2STAT_S_TX_LAST_DAT_ACK:
  606. /* Data has been transmitted, NACK has been received,
  607. * that means there's no more data to send, exit now */
  608. /*
  609. * Note: Don't wait for stop event since in slave transmit mode,
  610. * since there no proof lets us know when a stop signal has been received
  611. * on slave side.
  612. */
  613. case I2C_I2STAT_S_TX_DAT_NACK:
  614. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  615. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  616. Ret = I2C_SEND_END;
  617. break;
  618. /* Previously addressed with own SLA;
  619. * DATA byte has been received;
  620. * NOT ACK has been returned */
  621. case I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK:
  622. /* DATA has been received, NOT ACK has been returned */
  623. case I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK:
  624. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  625. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  626. Ret = I2C_RECV_END;
  627. break;
  628. /*
  629. * Note that: Return code only let us know a stop condition mixed
  630. * with a repeat start condition in the same code value.
  631. * So we should provide a time-out. In case this is really a stop
  632. * condition, this will return back after time out condition. Otherwise,
  633. * next session that is slave receive data will be completed.
  634. */
  635. /* A Stop or a repeat start condition */
  636. case I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX:
  637. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  638. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  639. Ret = I2C_STA_STO_RECV;
  640. break;
  641. /* No status information */
  642. case I2C_I2STAT_NO_INF:
  643. /* Other status must be captured */
  644. default:
  645. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  646. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  647. break;
  648. }
  649. return Ret;
  650. }
  651. /*********************************************************************//**
  652. * @brief General Master Interrupt handler for I2C peripheral
  653. * @param[in] I2Cx I2C peripheral selected, should be:
  654. * - LPC_I2C
  655. * - LPC_I2C1
  656. * - LPC_I2C2
  657. * @return None
  658. **********************************************************************/
  659. void I2C_MasterHandler(LPC_I2C_TypeDef *I2Cx)
  660. {
  661. uint32_t i2cId = I2C_getNum(I2Cx);
  662. uint8_t returnCode;
  663. I2C_M_SETUP_Type *txrx_setup;
  664. int32_t Ret = I2C_OK;
  665. txrx_setup = (I2C_M_SETUP_Type *) i2cdat[i2cId].txrx_setup;
  666. returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
  667. // Save current status
  668. txrx_setup->status = returnCode;
  669. Ret = I2C_MasterHanleStates(I2Cx, returnCode, txrx_setup);
  670. if(I2C_CheckError(Ret))
  671. {
  672. if(txrx_setup->retransmissions_count < txrx_setup->retransmissions_max)
  673. {
  674. // Retry
  675. txrx_setup->retransmissions_count ++;
  676. txrx_setup->tx_count = 0;
  677. txrx_setup->rx_count = 0;
  678. // Reset STA, STO, SI
  679. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC|I2C_I2CONCLR_STOC|I2C_I2CONCLR_STAC;
  680. I2Cx->I2CONSET = I2C_I2CONSET_STA;
  681. return;
  682. }
  683. else
  684. {
  685. goto s_int_end;
  686. }
  687. }
  688. else if (Ret & I2C_SEND_END)
  689. {
  690. // If no need to wait for data from Slave
  691. if(txrx_setup->rx_count >= (txrx_setup->rx_length))
  692. {
  693. goto s_int_end;
  694. }
  695. else // Start to wait for data from Slave
  696. {
  697. // Reset STA, STO, SI
  698. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC|I2C_I2CONCLR_STOC|I2C_I2CONCLR_STAC;
  699. I2Cx->I2CONSET = I2C_I2CONSET_STA;
  700. return;
  701. }
  702. }
  703. else if (Ret & I2C_RECV_END)
  704. {
  705. goto s_int_end;
  706. }
  707. else
  708. {
  709. return;
  710. }
  711. s_int_end:
  712. // Disable interrupt
  713. I2C_IntCmd(I2Cx, FALSE);
  714. I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
  715. I2C_MasterComplete[i2cId] = TRUE;
  716. }
  717. /*********************************************************************//**
  718. * @brief General Slave Interrupt handler for I2C peripheral
  719. * @param[in] I2Cx I2C peripheral selected, should be:
  720. * - LPC_I2C0
  721. * - LPC_I2C1
  722. * - LPC_I2C2
  723. * @return None
  724. **********************************************************************/
  725. void I2C_SlaveHandler (LPC_I2C_TypeDef *I2Cx)
  726. {
  727. uint32_t i2cId = I2C_getNum(I2Cx);
  728. uint8_t returnCode;
  729. I2C_S_SETUP_Type *txrx_setup;
  730. uint32_t timeout;
  731. int32_t Ret = I2C_OK;
  732. txrx_setup = (I2C_S_SETUP_Type *) i2cdat[i2cId].txrx_setup;
  733. handle_state:
  734. returnCode = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
  735. // Save current status
  736. txrx_setup->status = returnCode;
  737. Ret = I2C_SlaveHanleStates(I2Cx, returnCode, txrx_setup);
  738. if(I2C_CheckError(Ret))
  739. {
  740. goto s_int_end;
  741. }
  742. else if (Ret & I2C_STA_STO_RECV)
  743. {
  744. // Temporally lock the interrupt for timeout condition
  745. I2C_IntCmd(I2Cx, FALSE);
  746. // enable time out
  747. timeout = I2C_SLAVE_TIME_OUT;
  748. while(1)
  749. {
  750. if (I2Cx->I2CONSET & I2C_I2CONSET_SI)
  751. {
  752. // re-Enable interrupt
  753. I2C_IntCmd(I2Cx, TRUE);
  754. goto handle_state;
  755. }
  756. else
  757. {
  758. timeout--;
  759. if (timeout == 0)
  760. {
  761. // timeout occur, it's really a stop condition
  762. txrx_setup->status |= I2C_SETUP_STATUS_DONE;
  763. goto s_int_end;
  764. }
  765. }
  766. }
  767. }
  768. else if(Ret &I2C_SEND_END)
  769. {
  770. goto s_int_end;
  771. }
  772. else
  773. {
  774. return;
  775. }
  776. s_int_end:
  777. // Disable interrupt
  778. I2C_IntCmd(I2Cx, FALSE);
  779. I2Cx->I2CONCLR = I2C_I2CONCLR_AAC | I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
  780. I2C_SlaveComplete[i2cId] = TRUE;
  781. }
  782. /*********************************************************************//**
  783. * @brief Transmit and Receive data in master mode
  784. * @param[in] I2Cx I2C peripheral selected, should be:
  785. * - LPC_I2C0
  786. * - LPC_I2C1
  787. * - LPC_I2C2
  788. * @param[in] TransferCfg Pointer to a I2C_M_SETUP_Type structure that
  789. * contains specified information about the
  790. * configuration for master transfer.
  791. * @param[in] Opt a I2C_TRANSFER_OPT_Type type that selected for
  792. * interrupt or polling mode.
  793. * @return SUCCESS or ERROR
  794. *
  795. * Note:
  796. * - In case of using I2C to transmit data only, either transmit length set to 0
  797. * or transmit data pointer set to NULL.
  798. * - In case of using I2C to receive data only, either receive length set to 0
  799. * or receive data pointer set to NULL.
  800. * - In case of using I2C to transmit followed by receive data, transmit length,
  801. * transmit data pointer, receive length and receive data pointer should be set
  802. * corresponding.
  803. **********************************************************************/
  804. Status I2C_MasterTransferData(LPC_I2C_TypeDef *I2Cx, I2C_M_SETUP_Type *TransferCfg, \
  805. I2C_TRANSFER_OPT_Type Opt)
  806. {
  807. uint32_t i2cId = I2C_getNum(I2Cx); uint32_t CodeStatus;
  808. int32_t Ret = I2C_OK;
  809. // Reset I2C setup value to default state
  810. TransferCfg->tx_count = 0;
  811. TransferCfg->rx_count = 0;
  812. TransferCfg->status = 0;
  813. if (Opt == I2C_TRANSFER_POLLING)
  814. {
  815. /* First Start condition -------------------------------------------------------------- */
  816. TransferCfg->retransmissions_count = 0;
  817. retry:
  818. // Reset I2C setup value to default state
  819. TransferCfg->tx_count = 0;
  820. TransferCfg->rx_count = 0;
  821. // Start command
  822. CodeStatus = I2C_Start(I2Cx);
  823. while(1) // send data first and then receive data from Slave.
  824. {
  825. Ret = I2C_MasterHanleStates(I2Cx, CodeStatus, TransferCfg);
  826. if(I2C_CheckError(Ret))
  827. {
  828. TransferCfg->retransmissions_count++;
  829. if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max){
  830. // save status
  831. TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
  832. goto error;
  833. } else {
  834. goto retry;
  835. }
  836. }
  837. else if( (Ret & I2C_BYTE_SENT) ||
  838. (Ret & I2C_BYTE_RECV))
  839. {
  840. // Wait for sending ends
  841. while (!(I2Cx->I2CONSET & I2C_I2CONSET_SI));
  842. }
  843. else if (Ret & I2C_SEND_END) // already send all data
  844. {
  845. // If no need to wait for data from Slave
  846. if(TransferCfg->rx_count >= (TransferCfg->rx_length))
  847. {
  848. break;
  849. }
  850. else
  851. {
  852. I2C_Start(I2Cx);
  853. }
  854. }
  855. else if (Ret & I2C_RECV_END) // already receive all data
  856. {
  857. break;
  858. }
  859. CodeStatus = I2Cx->I2STAT & I2C_STAT_CODE_BITMASK;
  860. }
  861. return SUCCESS;
  862. error:
  863. return ERROR;
  864. }
  865. else if (Opt == I2C_TRANSFER_INTERRUPT)
  866. {
  867. // Setup tx_rx data, callback and interrupt handler
  868. i2cdat[i2cId].txrx_setup = (uint32_t) TransferCfg;
  869. // Set direction phase, write first
  870. i2cdat[i2cId].dir = 0;
  871. /* First Start condition -------------------------------------------------------------- */
  872. // Reset STA, STO, SI
  873. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC|I2C_I2CONCLR_STOC|I2C_I2CONCLR_STAC;
  874. I2Cx->I2CONSET = I2C_I2CONSET_STA;
  875. I2C_IntCmd(I2Cx, TRUE);
  876. return (SUCCESS);
  877. }
  878. return ERROR;
  879. }
  880. /*********************************************************************//**
  881. * @brief Receive and Transmit data in slave mode
  882. * @param[in] I2Cx I2C peripheral selected, should be
  883. * - LPC_I2C0
  884. * - LPC_I2C1
  885. * - LPC_I2C2
  886. * @param[in] TransferCfg Pointer to a I2C_S_SETUP_Type structure that
  887. * contains specified information about the
  888. * configuration for master transfer.
  889. * @param[in] Opt I2C_TRANSFER_OPT_Type type that selected for
  890. * interrupt or polling mode.
  891. * @return SUCCESS or ERROR
  892. *
  893. * Note:
  894. * The mode of slave's operation depends on the command sent from master on
  895. * the I2C bus. If the master send a SLA+W command, this sub-routine will
  896. * use receive data length and receive data pointer. If the master send a SLA+R
  897. * command, this sub-routine will use transmit data length and transmit data
  898. * pointer.
  899. * If the master issue an repeat start command or a stop command, the slave will
  900. * enable an time out condition, during time out condition, if there's no activity
  901. * on I2C bus, the slave will exit, otherwise (i.e. the master send a SLA+R/W),
  902. * the slave then switch to relevant operation mode. The time out should be used
  903. * because the return status code can not show difference from stop and repeat
  904. * start command in slave operation.
  905. * In case of the expected data length from master is greater than data length
  906. * that slave can support:
  907. * - In case of reading operation (from master): slave will return I2C_I2DAT_IDLE_CHAR
  908. * value.
  909. * - In case of writing operation (from master): slave will ignore remain data from master.
  910. **********************************************************************/
  911. Status I2C_SlaveTransferData(LPC_I2C_TypeDef *I2Cx, I2C_S_SETUP_Type *TransferCfg, \
  912. I2C_TRANSFER_OPT_Type Opt)
  913. {
  914. int32_t Ret = I2C_OK;
  915. uint32_t CodeStatus;
  916. uint32_t timeout;
  917. int32_t time_en;
  918. uint32_t i2cId = I2C_getNum(I2Cx);
  919. // Reset I2C setup value to default state
  920. TransferCfg->tx_count = 0;
  921. TransferCfg->rx_count = 0;
  922. TransferCfg->status = 0;
  923. // Polling option
  924. if (Opt == I2C_TRANSFER_POLLING)
  925. {
  926. /* Set AA bit to ACK command on I2C bus */
  927. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  928. /* Clear SI bit to be ready ... */
  929. I2Cx->I2CONCLR = (I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC|I2C_I2CONCLR_STOC);
  930. time_en = 0;
  931. timeout = 0;
  932. while (1)
  933. {
  934. /* Check SI flag ready */
  935. if (I2Cx->I2CONSET & I2C_I2CONSET_SI)
  936. {
  937. time_en = 0;
  938. CodeStatus = (I2Cx->I2STAT & I2C_STAT_CODE_BITMASK);
  939. Ret = I2C_SlaveHanleStates(I2Cx, CodeStatus, TransferCfg);
  940. if(I2C_CheckError(Ret))
  941. {
  942. goto s_error;
  943. }
  944. else if(Ret & I2C_STA_STO_RECV)
  945. {
  946. time_en = 1;
  947. timeout = 0;
  948. }
  949. else if (Ret & I2C_SEND_END)
  950. {
  951. goto s_end_stage;
  952. }
  953. }
  954. else if (time_en)
  955. {
  956. if (timeout++ > I2C_SLAVE_TIME_OUT)
  957. {
  958. // it's really a stop condition, goto end stage
  959. goto s_end_stage;
  960. }
  961. }
  962. }
  963. s_end_stage:
  964. /* Clear AA bit to disable ACK on I2C bus */
  965. I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
  966. // Check if there's no error during operation
  967. // Update status
  968. TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_DONE;
  969. return SUCCESS;
  970. s_error:
  971. /* Clear AA bit to disable ACK on I2C bus */
  972. I2Cx->I2CONCLR = I2C_I2CONCLR_AAC;
  973. // Update status
  974. TransferCfg->status = CodeStatus;
  975. return ERROR;
  976. }
  977. else if (Opt == I2C_TRANSFER_INTERRUPT)
  978. {
  979. // Setup tx_rx data, callback and interrupt handler
  980. i2cdat[i2cId].txrx_setup = (uint32_t) TransferCfg;
  981. // Set direction phase, read first
  982. i2cdat[i2cId].dir = 1;
  983. // Enable AA
  984. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  985. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
  986. I2C_IntCmd(I2Cx, TRUE);
  987. return (SUCCESS);
  988. }
  989. return ERROR;
  990. }
  991. /*********************************************************************//**
  992. * @brief Set Own slave address in I2C peripheral corresponding to
  993. * parameter specified in OwnSlaveAddrConfigStruct.
  994. * @param[in] I2Cx I2C peripheral selected, should be
  995. * - LPC_I2C0
  996. * - LPC_I2C1
  997. * - LPC_I2C2
  998. * @param[in] OwnSlaveAddrConfigStruct Pointer to a I2C_OWNSLAVEADDR_CFG_Type
  999. * structure that contains the configuration information for the
  1000. * specified I2C slave address.
  1001. * @return None
  1002. **********************************************************************/
  1003. void I2C_SetOwnSlaveAddr(LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
  1004. {
  1005. uint32_t tmp;
  1006. CHECK_PARAM(PARAM_I2Cx(I2Cx));
  1007. CHECK_PARAM(PARAM_I2C_SLAVEADDR_CH(OwnSlaveAddrConfigStruct->SlaveAddrChannel));
  1008. CHECK_PARAM(PARAM_FUNCTIONALSTATE(OwnSlaveAddrConfigStruct->GeneralCallState));
  1009. tmp = (((uint32_t)(OwnSlaveAddrConfigStruct->SlaveAddr_7bit << 1)) \
  1010. | ((OwnSlaveAddrConfigStruct->GeneralCallState == ENABLE) ? 0x01 : 0x00))& I2C_I2ADR_BITMASK;
  1011. switch (OwnSlaveAddrConfigStruct->SlaveAddrChannel)
  1012. {
  1013. case 0:
  1014. I2Cx->I2ADR0 = tmp;
  1015. I2Cx->I2MASK0 = I2C_I2MASK_MASK((uint32_t) \
  1016. (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
  1017. break;
  1018. case 1:
  1019. I2Cx->I2ADR1 = tmp;
  1020. I2Cx->I2MASK1 = I2C_I2MASK_MASK((uint32_t) \
  1021. (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
  1022. break;
  1023. case 2:
  1024. I2Cx->I2ADR2 = tmp;
  1025. I2Cx->I2MASK2 = I2C_I2MASK_MASK((uint32_t) \
  1026. (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
  1027. break;
  1028. case 3:
  1029. I2Cx->I2ADR3 = tmp;
  1030. I2Cx->I2MASK3 = I2C_I2MASK_MASK((uint32_t) \
  1031. (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
  1032. break;
  1033. }
  1034. }
  1035. /*********************************************************************//**
  1036. * @brief Configures functionality in I2C monitor mode
  1037. * @param[in] I2Cx I2C peripheral selected, should be
  1038. * - LPC_I2C0
  1039. * - LPC_I2C1
  1040. * - LPC_I2C2
  1041. * @param[in] MonitorCfgType Monitor Configuration type, should be:
  1042. * - I2C_MONITOR_CFG_SCL_OUTPUT: I2C module can 'stretch'
  1043. * the clock line (hold it low) until it has had time to
  1044. * respond to an I2C interrupt.
  1045. * - I2C_MONITOR_CFG_MATCHALL: When this bit is set to '1'
  1046. * and the I2C is in monitor mode, an interrupt will be
  1047. * generated on ANY address received.
  1048. * @param[in] NewState New State of this function, should be:
  1049. * - ENABLE: Enable this function.
  1050. * - DISABLE: Disable this function.
  1051. * @return None
  1052. **********************************************************************/
  1053. void I2C_MonitorModeConfig(LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState)
  1054. {
  1055. CHECK_PARAM(PARAM_I2Cx(I2Cx));
  1056. CHECK_PARAM(PARAM_I2C_MONITOR_CFG(MonitorCfgType));
  1057. CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
  1058. if (NewState == ENABLE)
  1059. {
  1060. I2Cx->MMCTRL |= MonitorCfgType;
  1061. }
  1062. else
  1063. {
  1064. I2Cx->MMCTRL &= (~MonitorCfgType) & I2C_I2MMCTRL_BITMASK;
  1065. }
  1066. }
  1067. /*********************************************************************//**
  1068. * @brief Enable/Disable I2C monitor mode
  1069. * @param[in] I2Cx I2C peripheral selected, should be
  1070. * - LPC_I2C0
  1071. * - LPC_I2C1
  1072. * - LPC_I2C2
  1073. * @param[in] NewState New State of this function, should be:
  1074. * - ENABLE: Enable monitor mode.
  1075. * - DISABLE: Disable monitor mode.
  1076. * @return None
  1077. **********************************************************************/
  1078. void I2C_MonitorModeCmd(LPC_I2C_TypeDef *I2Cx, FunctionalState NewState)
  1079. {
  1080. CHECK_PARAM(PARAM_I2Cx(I2Cx));
  1081. CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
  1082. if (NewState == ENABLE)
  1083. {
  1084. I2Cx->MMCTRL |= I2C_I2MMCTRL_MM_ENA;
  1085. I2Cx->I2CONSET = I2C_I2CONSET_AA;
  1086. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC;
  1087. }
  1088. else
  1089. {
  1090. I2Cx->MMCTRL &= (~I2C_I2MMCTRL_MM_ENA) & I2C_I2MMCTRL_BITMASK;
  1091. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC | I2C_I2CONCLR_STAC | I2C_I2CONCLR_AAC;
  1092. }
  1093. I2C_MonitorBufferIndex = 0;
  1094. }
  1095. /*********************************************************************//**
  1096. * @brief Get data from I2C data buffer in monitor mode.
  1097. * @param[in] I2Cx I2C peripheral selected, should be
  1098. * - LPC_I2C0
  1099. * - LPC_I2C1
  1100. * - LPC_I2C2
  1101. * @return None
  1102. * Note: In monitor mode, the I2C module may lose the ability to stretch
  1103. * the clock (stall the bus) if the ENA_SCL bit is not set. This means that
  1104. * the processor will have a limited amount of time to read the contents of
  1105. * the data received on the bus. If the processor reads the I2DAT shift
  1106. * register, as it ordinarily would, it could have only one bit-time to
  1107. * respond to the interrupt before the received data is overwritten by
  1108. * new data.
  1109. **********************************************************************/
  1110. uint8_t I2C_MonitorGetDatabuffer(LPC_I2C_TypeDef *I2Cx)
  1111. {
  1112. CHECK_PARAM(PARAM_I2Cx(I2Cx));
  1113. return ((uint8_t)(I2Cx->I2DATA_BUFFER));
  1114. }
  1115. /*********************************************************************//**
  1116. * @brief Get data from I2C data buffer in monitor mode.
  1117. * @param[in] I2Cx I2C peripheral selected, should be
  1118. * - LPC_I2C0
  1119. * - LPC_I2C1
  1120. * - LPC_I2C2
  1121. * @return None
  1122. * Note: In monitor mode, the I2C module may lose the ability to stretch
  1123. * the clock (stall the bus) if the ENA_SCL bit is not set. This means that
  1124. * the processor will have a limited amount of time to read the contents of
  1125. * the data received on the bus. If the processor reads the I2DAT shift
  1126. * register, as it ordinarily would, it could have only one bit-time to
  1127. * respond to the interrupt before the received data is overwritten by
  1128. * new data.
  1129. **********************************************************************/
  1130. BOOL_8 I2C_MonitorHandler(LPC_I2C_TypeDef *I2Cx, uint8_t *buffer, uint32_t size)
  1131. {
  1132. BOOL_8 ret=FALSE;
  1133. I2Cx->I2CONCLR = I2C_I2CONCLR_SIC;
  1134. buffer[I2C_MonitorBufferIndex] = (uint8_t)(I2Cx->I2DATA_BUFFER);
  1135. I2C_MonitorBufferIndex++;
  1136. if(I2C_MonitorBufferIndex >= size)
  1137. {
  1138. ret = TRUE;
  1139. }
  1140. return ret;
  1141. }
  1142. /*********************************************************************//**
  1143. * @brief Get status of Master Transfer
  1144. * @param[in] I2Cx I2C peripheral selected, should be:
  1145. * - LPC_I2C0
  1146. * - LPC_I2C1
  1147. * - LPC_I2C2
  1148. * @return Master transfer status, could be:
  1149. * - TRUE master transfer completed
  1150. * - FALSE master transfer have not completed yet
  1151. **********************************************************************/
  1152. uint32_t I2C_MasterTransferComplete(LPC_I2C_TypeDef *I2Cx)
  1153. {
  1154. uint32_t retval, tmp;
  1155. tmp = I2C_getNum(I2Cx);
  1156. retval = I2C_MasterComplete[tmp];
  1157. I2C_MasterComplete[tmp] = FALSE;
  1158. return retval;
  1159. }
  1160. /*********************************************************************//**
  1161. * @brief Get status of Slave Transfer
  1162. * @param[in] I2Cx I2C peripheral selected, should be:
  1163. * - LPC_I2C0
  1164. * - LPC_I2C1
  1165. * - LPC_I2C2
  1166. * @return Complete status, could be: TRUE/FALSE
  1167. **********************************************************************/
  1168. uint32_t I2C_SlaveTransferComplete(LPC_I2C_TypeDef *I2Cx)
  1169. {
  1170. uint32_t retval, tmp;
  1171. tmp = I2C_getNum(I2Cx);
  1172. retval = I2C_SlaveComplete[tmp];
  1173. I2C_SlaveComplete[tmp] = FALSE;
  1174. return retval;
  1175. }
  1176. /**
  1177. * @}
  1178. */
  1179. #endif /* _I2C */
  1180. /**
  1181. * @}
  1182. */
  1183. /* --------------------------------- End Of File ------------------------------ */