My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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  1. /*-------------------------------------------------------------------*/
  2. /* LPC176x Register Definitions and Cortex-M3 Supplement Definitions */
  3. /* This file is a non-copyrighted public domain software */
  4. /*-------------------------------------------------------------------*/
  5. #ifndef __LPC176x
  6. #define __LPC176x
  7. #include <stdint.h>
  8. #define USE_SV_SERVICE 0 /* Enable supervisor service for user mode task */
  9. /* System Controls */
  10. #define EXTINT (*(volatile uint32_t*)0x400FC140)
  11. #define EXTMODE (*(volatile uint32_t*)0x400FC148)
  12. #define EXTPOLAR (*(volatile uint32_t*)0x400FC14C)
  13. #define RSID (*(volatile uint32_t*)0x400FC180)
  14. #define SCS (*(volatile uint32_t*)0x400FC1A0)
  15. /* Clocking and Power Controls */
  16. #define CLKSRCSEL (*(volatile uint32_t*)0x400FC10C)
  17. #define PLL0CON (*(volatile uint32_t*)0x400FC080)
  18. #define PLL0CFG (*(volatile uint32_t*)0x400FC084)
  19. #define PLL0STAT (*(volatile uint32_t*)0x400FC088)
  20. #define PLL0FEED (*(volatile uint32_t*)0x400FC08C)
  21. #define PLL1CON (*(volatile uint32_t*)0x400FC0A0)
  22. #define PLL1CFG (*(volatile uint32_t*)0x400FC0A4)
  23. #define PLL1STAT (*(volatile uint32_t*)0x400FC0A8)
  24. #define PLL1FEED (*(volatile uint32_t*)0x400FC0AC)
  25. #define CCLKCFG (*(volatile uint32_t*)0x400FC104)
  26. #define USBCLKCFG (*(volatile uint32_t*)0x400FC108)
  27. #define PCLKSEL ( (volatile uint32_t*)0x400FC1A8)
  28. #define PCLKSEL0 (*(volatile uint32_t*)0x400FC1A8)
  29. #define PCLKSEL1 (*(volatile uint32_t*)0x400FC1AC)
  30. #define PCON (*(volatile uint32_t*)0x400FC0C0)
  31. #define PCONP (*(volatile uint32_t*)0x400FC0C4)
  32. #define CLKOUTCFG (*(volatile uint32_t*)0x400FC1C8)
  33. /* Flash Accelerator */
  34. #define FLASHCFG (*(volatile uint32_t*)0x400FC000)
  35. /* Pin Configurations */
  36. #define PINSEL ( (volatile uint32_t*)0x4002C000)
  37. #define PINSEL0 (*(volatile uint32_t*)0x4002C000)
  38. #define PINSEL1 (*(volatile uint32_t*)0x4002C004)
  39. #define PINSEL2 (*(volatile uint32_t*)0x4002C008)
  40. #define PINSEL3 (*(volatile uint32_t*)0x4002C00C)
  41. #define PINSEL4 (*(volatile uint32_t*)0x4002C010)
  42. #define PINSEL7 (*(volatile uint32_t*)0x4002C01C)
  43. #define PINSEL8 (*(volatile uint32_t*)0x4002C020)
  44. #define PINSEL9 (*(volatile uint32_t*)0x4002C024)
  45. #define PINSEL10 (*(volatile uint32_t*)0x4002C028)
  46. #define PINMODE ( (volatile uint32_t*)0x4002C040)
  47. #define PINMODE0 (*(volatile uint32_t*)0x4002C040)
  48. #define PINMODE1 (*(volatile uint32_t*)0x4002C044)
  49. #define PINMODE2 (*(volatile uint32_t*)0x4002C048)
  50. #define PINMODE3 (*(volatile uint32_t*)0x4002C04C)
  51. #define PINMODE4 (*(volatile uint32_t*)0x4002C050)
  52. #define PINMODE5 (*(volatile uint32_t*)0x4002C054)
  53. #define PINMODE6 (*(volatile uint32_t*)0x4002C058)
  54. #define PINMODE7 (*(volatile uint32_t*)0x4002C05C)
  55. #define PINMODE9 (*(volatile uint32_t*)0x4002C064)
  56. #define PINMODE_OD ( (volatile uint32_t*)0x4002C068)
  57. #define PINMODE_OD0 (*(volatile uint32_t*)0x4002C068)
  58. #define PINMODE_OD1 (*(volatile uint32_t*)0x4002C06C)
  59. #define PINMODE_OD2 (*(volatile uint32_t*)0x4002C070)
  60. #define PINMODE_OD3 (*(volatile uint32_t*)0x4002C074)
  61. #define PINMODE_OD4 (*(volatile uint32_t*)0x4002C078)
  62. #define I2CPADCFG (*(volatile uint32_t*)0x4002C07C)
  63. /* GPIO */
  64. #define FIO0DIR (*(volatile uint32_t*)0x2009C000)
  65. #define FIO0DIRL (*(volatile uint16_t*)0x2009C000)
  66. #define FIO0DIRH (*(volatile uint16_t*)0x2009C002)
  67. #define FIO0DIR0 (*(volatile uint8_t*)0x2009C000)
  68. #define FIO0DIR1 (*(volatile uint8_t*)0x2009C001)
  69. #define FIO0DIR2 (*(volatile uint8_t*)0x2009C002)
  70. #define FIO0DIR3 (*(volatile uint8_t*)0x2009C003)
  71. #define FIO1DIR (*(volatile uint32_t*)0x2009C020)
  72. #define FIO1DIRL (*(volatile uint16_t*)0x2009C020)
  73. #define FIO1DIRH (*(volatile uint16_t*)0x2009C022)
  74. #define FIO1DIR0 (*(volatile uint8_t*)0x2009C020)
  75. #define FIO1DIR1 (*(volatile uint8_t*)0x2009C021)
  76. #define FIO1DIR2 (*(volatile uint8_t*)0x2009C022)
  77. #define FIO1DIR3 (*(volatile uint8_t*)0x2009C023)
  78. #define FIO2DIR (*(volatile uint32_t*)0x2009C040)
  79. #define FIO2DIRL (*(volatile uint16_t*)0x2009C040)
  80. #define FIO2DIRH (*(volatile uint16_t*)0x2009C042)
  81. #define FIO2DIR0 (*(volatile uint8_t*)0x2009C040)
  82. #define FIO2DIR1 (*(volatile uint8_t*)0x2009C041)
  83. #define FIO2DIR2 (*(volatile uint8_t*)0x2009C042)
  84. #define FIO2DIR3 (*(volatile uint8_t*)0x2009C043)
  85. #define FIO3DIR (*(volatile uint32_t*)0x2009C060)
  86. #define FIO3DIRL (*(volatile uint16_t*)0x2009C060)
  87. #define FIO3DIRH (*(volatile uint16_t*)0x2009C062)
  88. #define FIO3DIR0 (*(volatile uint8_t*)0x2009C060)
  89. #define FIO3DIR1 (*(volatile uint8_t*)0x2009C061)
  90. #define FIO3DIR2 (*(volatile uint8_t*)0x2009C062)
  91. #define FIO3DIR3 (*(volatile uint8_t*)0x2009C063)
  92. #define FIO4DIR (*(volatile uint32_t*)0x2009C080)
  93. #define FIO4DIRL (*(volatile uint16_t*)0x2009C080)
  94. #define FIO4DIRH (*(volatile uint16_t*)0x2009C082)
  95. #define FIO4DIR0 (*(volatile uint8_t*)0x2009C080)
  96. #define FIO4DIR1 (*(volatile uint8_t*)0x2009C081)
  97. #define FIO4DIR2 (*(volatile uint8_t*)0x2009C082)
  98. #define FIO4DIR3 (*(volatile uint8_t*)0x2009C083)
  99. #define FIO0MASK (*(volatile uint32_t*)0x2009C010)
  100. #define FIO0MASKL (*(volatile uint16_t*)0x2009C010)
  101. #define FIO0MASKH (*(volatile uint16_t*)0x2009C012)
  102. #define FIO0MASK0 (*(volatile uint8_t*)0x2009C010)
  103. #define FIO0MASK1 (*(volatile uint8_t*)0x2009C011)
  104. #define FIO0MASK2 (*(volatile uint8_t*)0x2009C012)
  105. #define FIO0MASK3 (*(volatile uint8_t*)0x2009C013)
  106. #define FIO1MASK (*(volatile uint32_t*)0x2009C030)
  107. #define FIO1MASKL (*(volatile uint16_t*)0x2009C030)
  108. #define FIO1MASKH (*(volatile uint16_t*)0x2009C032)
  109. #define FIO1MASK0 (*(volatile uint8_t*)0x2009C030)
  110. #define FIO1MASK1 (*(volatile uint8_t*)0x2009C031)
  111. #define FIO1MASK2 (*(volatile uint8_t*)0x2009C032)
  112. #define FIO1MASK3 (*(volatile uint8_t*)0x2009C033)
  113. #define FIO2MASK (*(volatile uint32_t*)0x2009C050)
  114. #define FIO2MASKL (*(volatile uint16_t*)0x2009C050)
  115. #define FIO2MASKH (*(volatile uint16_t*)0x2009C052)
  116. #define FIO2MASK0 (*(volatile uint8_t*)0x2009C050)
  117. #define FIO2MASK1 (*(volatile uint8_t*)0x2009C051)
  118. #define FIO2MASK2 (*(volatile uint8_t*)0x2009C052)
  119. #define FIO2MASK3 (*(volatile uint8_t*)0x2009C053)
  120. #define FIO3MASK (*(volatile uint32_t*)0x2009C070)
  121. #define FIO3MASKL (*(volatile uint16_t*)0x2009C070)
  122. #define FIO3MASKH (*(volatile uint16_t*)0x2009C072)
  123. #define FIO3MASK0 (*(volatile uint8_t*)0x2009C070)
  124. #define FIO3MASK1 (*(volatile uint8_t*)0x2009C071)
  125. #define FIO3MASK2 (*(volatile uint8_t*)0x2009C072)
  126. #define FIO3MASK3 (*(volatile uint8_t*)0x2009C073)
  127. #define FIO4MASK (*(volatile uint32_t*)0x2009C090)
  128. #define FIO4MASKL (*(volatile uint16_t*)0x2009C090)
  129. #define FIO4MASKH (*(volatile uint16_t*)0x2009C092)
  130. #define FIO4MASK0 (*(volatile uint8_t*)0x2009C090)
  131. #define FIO4MASK1 (*(volatile uint8_t*)0x2009C091)
  132. #define FIO4MASK2 (*(volatile uint8_t*)0x2009C092)
  133. #define FIO4MASK3 (*(volatile uint8_t*)0x2009C093)
  134. #define FIO0PIN (*(volatile uint32_t*)0x2009C014)
  135. #define FIO0PINL (*(volatile uint16_t*)0x2009C014)
  136. #define FIO0PINH (*(volatile uint16_t*)0x2009C016)
  137. #define FIO0PIN0 (*(volatile uint8_t*)0x2009C014)
  138. #define FIO0PIN1 (*(volatile uint8_t*)0x2009C015)
  139. #define FIO0PIN2 (*(volatile uint8_t*)0x2009C016)
  140. #define FIO0PIN3 (*(volatile uint8_t*)0x2009C017)
  141. #define FIO1PIN (*(volatile uint32_t*)0x2009C034)
  142. #define FIO1PINL (*(volatile uint16_t*)0x2009C034)
  143. #define FIO1PINH (*(volatile uint16_t*)0x2009C036)
  144. #define FIO1PIN0 (*(volatile uint8_t*)0x2009C034)
  145. #define FIO1PIN1 (*(volatile uint8_t*)0x2009C035)
  146. #define FIO1PIN2 (*(volatile uint8_t*)0x2009C036)
  147. #define FIO1PIN3 (*(volatile uint8_t*)0x2009C037)
  148. #define FIO2PIN (*(volatile uint32_t*)0x2009C054)
  149. #define FIO2PINL (*(volatile uint16_t*)0x2009C054)
  150. #define FIO2PINH (*(volatile uint16_t*)0x2009C056)
  151. #define FIO2PIN0 (*(volatile uint8_t*)0x2009C054)
  152. #define FIO2PIN1 (*(volatile uint8_t*)0x2009C055)
  153. #define FIO2PIN2 (*(volatile uint8_t*)0x2009C056)
  154. #define FIO2PIN3 (*(volatile uint8_t*)0x2009C057)
  155. #define FIO3PIN (*(volatile uint32_t*)0x2009C074)
  156. #define FIO3PINL (*(volatile uint16_t*)0x2009C074)
  157. #define FIO3PINH (*(volatile uint16_t*)0x2009C076)
  158. #define FIO3PIN0 (*(volatile uint8_t*)0x2009C074)
  159. #define FIO3PIN1 (*(volatile uint8_t*)0x2009C075)
  160. #define FIO3PIN2 (*(volatile uint8_t*)0x2009C076)
  161. #define FIO3PIN3 (*(volatile uint8_t*)0x2009C077)
  162. #define FIO4PIN (*(volatile uint32_t*)0x2009C094)
  163. #define FIO4PINL (*(volatile uint16_t*)0x2009C094)
  164. #define FIO4PINH (*(volatile uint16_t*)0x2009C096)
  165. #define FIO4PIN0 (*(volatile uint8_t*)0x2009C094)
  166. #define FIO4PIN1 (*(volatile uint8_t*)0x2009C095)
  167. #define FIO4PIN2 (*(volatile uint8_t*)0x2009C096)
  168. #define FIO4PIN3 (*(volatile uint8_t*)0x2009C097)
  169. #define FIO0SET (*(volatile uint32_t*)0x2009C018)
  170. #define FIO0SETL (*(volatile uint16_t*)0x2009C018)
  171. #define FIO0SETH (*(volatile uint16_t*)0x2009C01A)
  172. #define FIO0SET0 (*(volatile uint8_t*)0x2009C018)
  173. #define FIO0SET1 (*(volatile uint8_t*)0x2009C019)
  174. #define FIO0SET2 (*(volatile uint8_t*)0x2009C01A)
  175. #define FIO0SET3 (*(volatile uint8_t*)0x2009C01B)
  176. #define FIO1SET (*(volatile uint32_t*)0x2009C038)
  177. #define FIO1SETL (*(volatile uint16_t*)0x2009C038)
  178. #define FIO1SETH (*(volatile uint16_t*)0x2009C03A)
  179. #define FIO1SET0 (*(volatile uint8_t*)0x2009C038)
  180. #define FIO1SET1 (*(volatile uint8_t*)0x2009C039)
  181. #define FIO1SET2 (*(volatile uint8_t*)0x2009C03A)
  182. #define FIO1SET3 (*(volatile uint8_t*)0x2009C03B)
  183. #define FIO2SET (*(volatile uint32_t*)0x2009C058)
  184. #define FIO2SETL (*(volatile uint16_t*)0x2009C058)
  185. #define FIO2SETH (*(volatile uint16_t*)0x2009C05A)
  186. #define FIO2SET0 (*(volatile uint8_t*)0x2009C058)
  187. #define FIO2SET1 (*(volatile uint8_t*)0x2009C059)
  188. #define FIO2SET2 (*(volatile uint8_t*)0x2009C05A)
  189. #define FIO2SET3 (*(volatile uint8_t*)0x2009C05B)
  190. #define FIO3SET (*(volatile uint32_t*)0x2009C078)
  191. #define FIO3SETL (*(volatile uint16_t*)0x2009C078)
  192. #define FIO3SETH (*(volatile uint16_t*)0x2009C07A)
  193. #define FIO3SET0 (*(volatile uint8_t*)0x2009C078)
  194. #define FIO3SET1 (*(volatile uint8_t*)0x2009C079)
  195. #define FIO3SET2 (*(volatile uint8_t*)0x2009C07A)
  196. #define FIO3SET3 (*(volatile uint8_t*)0x2009C07B)
  197. #define FIO4SET (*(volatile uint32_t*)0x2009C098)
  198. #define FIO4SETL (*(volatile uint16_t*)0x2009C098)
  199. #define FIO4SETH (*(volatile uint16_t*)0x2009C09A)
  200. #define FIO4SET0 (*(volatile uint8_t*)0x2009C098)
  201. #define FIO4SET1 (*(volatile uint8_t*)0x2009C099)
  202. #define FIO4SET2 (*(volatile uint8_t*)0x2009C09A)
  203. #define FIO4SET3 (*(volatile uint8_t*)0x2009C09B)
  204. #define FIO0CLR (*(volatile uint32_t*)0x2009C01C)
  205. #define FIO0CLRL (*(volatile uint16_t*)0x2009C01C)
  206. #define FIO0CLRH (*(volatile uint16_t*)0x2009C01E)
  207. #define FIO0CLR0 (*(volatile uint8_t*)0x2009C01C)
  208. #define FIO0CLR1 (*(volatile uint8_t*)0x2009C01D)
  209. #define FIO0CLR2 (*(volatile uint8_t*)0x2009C01E)
  210. #define FIO0CLR3 (*(volatile uint8_t*)0x2009C01F)
  211. #define FIO1CLR (*(volatile uint32_t*)0x2009C03C)
  212. #define FIO1CLRL (*(volatile uint16_t*)0x2009C03C)
  213. #define FIO1CLRH (*(volatile uint16_t*)0x2009C03E)
  214. #define FIO1CLR0 (*(volatile uint8_t*)0x2009C03C)
  215. #define FIO1CLR1 (*(volatile uint8_t*)0x2009C03D)
  216. #define FIO1CLR2 (*(volatile uint8_t*)0x2009C03E)
  217. #define FIO1CLR3 (*(volatile uint8_t*)0x2009C03F)
  218. #define FIO2CLR (*(volatile uint32_t*)0x2009C05C)
  219. #define FIO2CLRL (*(volatile uint16_t*)0x2009C05C)
  220. #define FIO2CLRH (*(volatile uint16_t*)0x2009C05E)
  221. #define FIO2CLR0 (*(volatile uint8_t*)0x2009C05C)
  222. #define FIO2CLR1 (*(volatile uint8_t*)0x2009C05D)
  223. #define FIO2CLR2 (*(volatile uint8_t*)0x2009C05E)
  224. #define FIO2CLR3 (*(volatile uint8_t*)0x2009C05F)
  225. #define FIO3CLR (*(volatile uint32_t*)0x2009C07C)
  226. #define FIO3CLRL (*(volatile uint16_t*)0x2009C07C)
  227. #define FIO3CLRH (*(volatile uint16_t*)0x2009C07E)
  228. #define FIO3CLR0 (*(volatile uint8_t*)0x2009C07C)
  229. #define FIO3CLR1 (*(volatile uint8_t*)0x2009C07D)
  230. #define FIO3CLR2 (*(volatile uint8_t*)0x2009C07E)
  231. #define FIO3CLR3 (*(volatile uint8_t*)0x2009C07F)
  232. #define FIO4CLR (*(volatile uint32_t*)0x2009C09C)
  233. #define FIO4CLRL (*(volatile uint16_t*)0x2009C09C)
  234. #define FIO4CLRH (*(volatile uint16_t*)0x2009C09E)
  235. #define FIO4CLR0 (*(volatile uint8_t*)0x2009C09C)
  236. #define FIO4CLR1 (*(volatile uint8_t*)0x2009C09D)
  237. #define FIO4CLR2 (*(volatile uint8_t*)0x2009C09E)
  238. #define FIO4CLR3 (*(volatile uint8_t*)0x2009C09F)
  239. #define IOIntStatus (*(volatile uint32_t*)0x40028080)
  240. #define IO0IntStatR (*(volatile uint32_t*)0x40028084)
  241. #define IO0IntStatF (*(volatile uint32_t*)0x40028088)
  242. #define IO0IntClr (*(volatile uint32_t*)0x4002808C)
  243. #define IO0IntEnR (*(volatile uint32_t*)0x40028090)
  244. #define IO0IntEnF (*(volatile uint32_t*)0x40028094)
  245. #define IO2IntStatR (*(volatile uint32_t*)0x400280A4)
  246. #define IO2IntStatF (*(volatile uint32_t*)0x400280A8)
  247. #define IO2IntClr (*(volatile uint32_t*)0x400280AC)
  248. #define IO2IntEnR (*(volatile uint32_t*)0x400280B0)
  249. #define IO2IntEnF (*(volatile uint32_t*)0x400280B4)
  250. /* Ethernet MAC */
  251. #define MAC1 (*(volatile uint32_t*)0x50000000)
  252. #define MAC2 (*(volatile uint32_t*)0x50000004)
  253. #define IPGT (*(volatile uint32_t*)0x50000008)
  254. #define IPGR (*(volatile uint32_t*)0x5000000C)
  255. #define CLRT (*(volatile uint32_t*)0x50000010)
  256. #define MAXF (*(volatile uint32_t*)0x50000014)
  257. #define SUPP (*(volatile uint32_t*)0x50000018)
  258. #define TEST (*(volatile uint32_t*)0x5000001C)
  259. #define MCFG (*(volatile uint32_t*)0x50000020)
  260. #define MCMD (*(volatile uint32_t*)0x50000024)
  261. #define MADR (*(volatile uint32_t*)0x50000028)
  262. #define MWTD (*(volatile uint32_t*)0x5000002C)
  263. #define MRDD (*(volatile uint32_t*)0x50000030)
  264. #define MIND (*(volatile uint32_t*)0x50000034)
  265. #define SA0 (*(volatile uint32_t*)0x50000040)
  266. #define SA1 (*(volatile uint32_t*)0x50000044)
  267. #define SA2 (*(volatile uint32_t*)0x50000048)
  268. #define Command (*(volatile uint32_t*)0x50000100)
  269. #define Status (*(volatile uint32_t*)0x50000104)
  270. #define RxDescriptor (*(volatile uint32_t*)0x50000108)
  271. #define RxStatus (*(volatile uint32_t*)0x5000010C)
  272. #define RxDescriptorNumber (*(volatile uint32_t*)0x50000110)
  273. #define RxProduceIndex (*(volatile uint32_t*)0x50000114)
  274. #define RxConsumeIndex (*(volatile uint32_t*)0x50000118)
  275. #define TxDescriptor (*(volatile uint32_t*)0x5000011C)
  276. #define TxStatus (*(volatile uint32_t*)0x50000120)
  277. #define TxDescriptorNumber (*(volatile uint32_t*)0x50000124)
  278. #define TxProduceIndex (*(volatile uint32_t*)0x50000128)
  279. #define TxConsumeIndex (*(volatile uint32_t*)0x5000012C)
  280. #define TSV0 (*(volatile uint32_t*)0x50000158)
  281. #define TSV1 (*(volatile uint32_t*)0x5000015C)
  282. #define RSV (*(volatile uint32_t*)0x50000160)
  283. #define FlowControlCounter (*(volatile uint32_t*)0x50000170)
  284. #define FlowControlStatus (*(volatile uint32_t*)0x50000174)
  285. #define RxFliterCtrl (*(volatile uint32_t*)0x50000200)
  286. #define RxFilterWoLStatus (*(volatile uint32_t*)0x50000204)
  287. #define RxFilterWoLClear (*(volatile uint32_t*)0x50000208)
  288. #define HashFilterL (*(volatile uint32_t*)0x50000210)
  289. #define HashFilterH (*(volatile uint32_t*)0x50000214)
  290. #define IntStatus (*(volatile uint32_t*)0x50000FE0)
  291. #define IntEnable (*(volatile uint32_t*)0x50000FE4)
  292. #define IntClear (*(volatile uint32_t*)0x50000FE8)
  293. #define IntSet (*(volatile uint32_t*)0x50000FEC)
  294. #define PowerDown (*(volatile uint32_t*)0x50000FF4)
  295. /* USB Device */
  296. #define USBClkCtrl (*(volatile uint32_t*)0x5000CFF4)
  297. #define USBClkSt (*(volatile uint32_t*)0x5000CFF8)
  298. #define USBIntSt (*(volatile uint32_t*)0x400FC1C0)
  299. #define USBDevIntSt (*(volatile uint32_t*)0x5000C200)
  300. #define USBDevIntEn (*(volatile uint32_t*)0x5000C204)
  301. #define USBDevIntClr (*(volatile uint32_t*)0x5000C208)
  302. #define USBDevIntSet (*(volatile uint32_t*)0x5000C20C)
  303. #define USBDevIntPri (*(volatile uint32_t*)0x5000C22C)
  304. #define USBEpIntSt (*(volatile uint32_t*)0x5000C230)
  305. #define USBEpIntEn (*(volatile uint32_t*)0x5000C234)
  306. #define USBEpIntClr (*(volatile uint32_t*)0x5000C238)
  307. #define USBEpIntSet (*(volatile uint32_t*)0x5000C23C)
  308. #define USBEpIntPri (*(volatile uint32_t*)0x5000C240)
  309. #define USBReEp (*(volatile uint32_t*)0x5000C244)
  310. #define USBEpIn (*(volatile uint32_t*)0x5000C248)
  311. #define USBMaxPSize (*(volatile uint32_t*)0x5000C24C)
  312. #define USBRxData (*(volatile uint32_t*)0x5000C218)
  313. #define USBRxPLen (*(volatile uint32_t*)0x5000C220)
  314. #define USBTxData (*(volatile uint32_t*)0x5000C21C)
  315. #define USBTxPLen (*(volatile uint32_t*)0x5000C224)
  316. #define USBCtrl (*(volatile uint32_t*)0x5000C228)
  317. #define USBCmdCode (*(volatile uint32_t*)0x5000C210)
  318. #define USBCmdData (*(volatile uint32_t*)0x5000C214)
  319. #define USBDMARSt (*(volatile uint32_t*)0x5000C250)
  320. #define USBDMARClr (*(volatile uint32_t*)0x5000C254)
  321. #define USBDMARSet (*(volatile uint32_t*)0x5000C258)
  322. #define USBUDCAH (*(volatile uint32_t*)0x5000C280)
  323. #define USBEpDMASt (*(volatile uint32_t*)0x5000C284)
  324. #define USBEpDMAEn (*(volatile uint32_t*)0x5000C288)
  325. #define USBEpDMADis (*(volatile uint32_t*)0x5000C28C)
  326. #define USBDMAIntSt (*(volatile uint32_t*)0x5000C290)
  327. #define USBDMAIntEn (*(volatile uint32_t*)0x5000C294)
  328. #define USBEoTIntSt (*(volatile uint32_t*)0x5000C2A0)
  329. #define USBEoTIntClr (*(volatile uint32_t*)0x5000C2A4)
  330. #define USBEoTIntSet (*(volatile uint32_t*)0x5000C2A8)
  331. #define USBNDDRIntSt (*(volatile uint32_t*)0x5000C2AC)
  332. #define USBNDDRIntClr (*(volatile uint32_t*)0x5000C2B0)
  333. #define USBNDDRIntSet (*(volatile uint32_t*)0x5000C2B4)
  334. #define USBSysErrIntSt (*(volatile uint32_t*)0x5000C2B8)
  335. #define USBSysErrIntClr (*(volatile uint32_t*)0x5000C2BC)
  336. #define USBSysErrIntSet (*(volatile uint32_t*)0x5000C2C0)
  337. /* USB OTG */
  338. #define USBIntSt (*(volatile uint32_t*)0x400FC1C0)
  339. #define OTGIntSt (*(volatile uint32_t*)0x5000C100)
  340. #define OTGIntEn (*(volatile uint32_t*)0x5000C104)
  341. #define OTGIntSet (*(volatile uint32_t*)0x5000C108)
  342. #define OTGIntClr (*(volatile uint32_t*)0x5000C10C)
  343. #define OTGStCtrl (*(volatile uint32_t*)0x5000C110)
  344. #define OTGTmr (*(volatile uint32_t*)0x5000C114)
  345. #define I2C_RX (*(volatile uint32_t*)0x5000C300)
  346. #define I2C_TX (*(volatile uint32_t*)0x5000C300)
  347. #define I2C_STS (*(volatile uint32_t*)0x5000C304)
  348. #define I2C_CTL (*(volatile uint32_t*)0x5000C308)
  349. #define I2C_CLKHI (*(volatile uint32_t*)0x5000C30C)
  350. #define I2C_CLKLO (*(volatile uint32_t*)0x5000C310)
  351. #define OTGClkCtrl (*(volatile uint32_t*)0x5000CFF4)
  352. #define OTGClkSt (*(volatile uint32_t*)0x5000CFF8)
  353. /* UART0,UART1,UART2,UART3 */
  354. #define U0RBR (*(volatile uint32_t*)0x4000C000)
  355. #define U0THR (*(volatile uint32_t*)0x4000C000)
  356. #define U0DLL (*(volatile uint32_t*)0x4000C000)
  357. #define U0DLM (*(volatile uint32_t*)0x4000C004)
  358. #define U0IER (*(volatile uint32_t*)0x4000C004)
  359. #define U0IIR (*(volatile uint32_t*)0x4000C008)
  360. #define U0FCR (*(volatile uint32_t*)0x4000C008)
  361. #define U0LCR (*(volatile uint32_t*)0x4000C00C)
  362. #define U0LSR (*(volatile uint32_t*)0x4000C014)
  363. #define U0SCR (*(volatile uint32_t*)0x4000C01C)
  364. #define U0ACR (*(volatile uint32_t*)0x4000C020)
  365. #define U0ICR (*(volatile uint32_t*)0x4000C024)
  366. #define U0FDR (*(volatile uint32_t*)0x4000C028)
  367. #define U0TER (*(volatile uint32_t*)0x4000C030)
  368. #define U1RBR (*(volatile uint32_t*)0x40010000)
  369. #define U1THR (*(volatile uint32_t*)0x40010000)
  370. #define U1DLL (*(volatile uint32_t*)0x40010000)
  371. #define U1DLM (*(volatile uint32_t*)0x40010004)
  372. #define U1IER (*(volatile uint32_t*)0x40010004)
  373. #define U1IIR (*(volatile uint32_t*)0x40010008)
  374. #define U1FCR (*(volatile uint32_t*)0x40010008)
  375. #define U1LCR (*(volatile uint32_t*)0x4001000C)
  376. #define U1MCR (*(volatile uint32_t*)0x40010010)
  377. #define U1LSR (*(volatile uint32_t*)0x40010014)
  378. #define U1MSR (*(volatile uint32_t*)0x40010018)
  379. #define U1SCR (*(volatile uint32_t*)0x4001001C)
  380. #define U1ACR (*(volatile uint32_t*)0x40010020)
  381. #define U1FDR (*(volatile uint32_t*)0x40010028)
  382. #define U1TER (*(volatile uint32_t*)0x40010030)
  383. #define U1RS485CTRL (*(volatile uint32_t*)0x4001004C)
  384. #define U1ADRMATCH (*(volatile uint32_t*)0x40010050)
  385. #define U1RS485DLY (*(volatile uint32_t*)0x40010054)
  386. #define U2RBR (*(volatile uint32_t*)0x40098000)
  387. #define U2THR (*(volatile uint32_t*)0x40098000)
  388. #define U2DLL (*(volatile uint32_t*)0x40098000)
  389. #define U2DLM (*(volatile uint32_t*)0x40098004)
  390. #define U2IER (*(volatile uint32_t*)0x40098004)
  391. #define U2IIR (*(volatile uint32_t*)0x40098008)
  392. #define U2FCR (*(volatile uint32_t*)0x40098008)
  393. #define U2LCR (*(volatile uint32_t*)0x4009800C)
  394. #define U2LSR (*(volatile uint32_t*)0x40098014)
  395. #define U2SCR (*(volatile uint32_t*)0x4009801C)
  396. #define U2ACR (*(volatile uint32_t*)0x40098020)
  397. #define U2ICR (*(volatile uint32_t*)0x40098024)
  398. #define U2FDR (*(volatile uint32_t*)0x40098028)
  399. #define U2TER (*(volatile uint32_t*)0x40098030)
  400. #define U3RBR (*(volatile uint32_t*)0x4009C000)
  401. #define U3THR (*(volatile uint32_t*)0x4009C000)
  402. #define U3DLL (*(volatile uint32_t*)0x4009C000)
  403. #define U3DLM (*(volatile uint32_t*)0x4009C004)
  404. #define U3IER (*(volatile uint32_t*)0x4009C004)
  405. #define U3IIR (*(volatile uint32_t*)0x4009C008)
  406. #define U3FCR (*(volatile uint32_t*)0x4009C008)
  407. #define U3LCR (*(volatile uint32_t*)0x4009C00C)
  408. #define U3LSR (*(volatile uint32_t*)0x4009C014)
  409. #define U3SCR (*(volatile uint32_t*)0x4009C01C)
  410. #define U3ACR (*(volatile uint32_t*)0x4009C020)
  411. #define U3ICR (*(volatile uint32_t*)0x4009C024)
  412. #define U3FDR (*(volatile uint32_t*)0x4009C028)
  413. #define U3TER (*(volatile uint32_t*)0x4009C030)
  414. /* CAN1,CAN2 */
  415. #define AFMR (*(volatile uint32_t*)0x4003C000)
  416. #define SFF_sa (*(volatile uint32_t*)0x4003C004)
  417. #define SFF_GRP_sa (*(volatile uint32_t*)0x4003C008)
  418. #define EFF_sa (*(volatile uint32_t*)0x4003C00C)
  419. #define EFF_GRP_sa (*(volatile uint32_t*)0x4003C010)
  420. #define ENDofTable (*(volatile uint32_t*)0x4003C014)
  421. #define LUTerrAd (*(volatile uint32_t*)0x4003C018)
  422. #define LUTerr (*(volatile uint32_t*)0x4003C01C)
  423. #define CANTxSR (*(volatile uint32_t*)0x40040000)
  424. #define CANRxSR (*(volatile uint32_t*)0x40040004)
  425. #define CANMSR (*(volatile uint32_t*)0x40040008)
  426. #define CAN1MOD (*(volatile uint32_t*)0x40044000)
  427. #define CAN1CMR (*(volatile uint32_t*)0x40044004)
  428. #define CAN1GSR (*(volatile uint32_t*)0x40044008)
  429. #define CAN1ICR (*(volatile uint32_t*)0x4004400C)
  430. #define CAN1IER (*(volatile uint32_t*)0x40044010)
  431. #define CAN1BTR (*(volatile uint32_t*)0x40044014)
  432. #define CAN1EWL (*(volatile uint32_t*)0x40044018)
  433. #define CAN1SR (*(volatile uint32_t*)0x4004401C)
  434. #define CAN1RFS (*(volatile uint32_t*)0x40044020)
  435. #define CAN1RID (*(volatile uint32_t*)0x40044024)
  436. #define CAN1RDA (*(volatile uint32_t*)0x40044028)
  437. #define CAN1RDB (*(volatile uint32_t*)0x4004402C)
  438. #define CAN1TFI1 (*(volatile uint32_t*)0x40044030)
  439. #define CAN1TID1 (*(volatile uint32_t*)0x40044034)
  440. #define CAN1TDA1 (*(volatile uint32_t*)0x40044038)
  441. #define CAN1TDB1 (*(volatile uint32_t*)0x4004403C)
  442. #define CAN1TFI2 (*(volatile uint32_t*)0x40044040)
  443. #define CAN1TID2 (*(volatile uint32_t*)0x40044044)
  444. #define CAN1TDA2 (*(volatile uint32_t*)0x40044048)
  445. #define CAN1TDB2 (*(volatile uint32_t*)0x4004404C)
  446. #define CAN1TFI3 (*(volatile uint32_t*)0x40044050)
  447. #define CAN1TID3 (*(volatile uint32_t*)0x40044054)
  448. #define CAN1TDA3 (*(volatile uint32_t*)0x40044058)
  449. #define CAN1TDB3 (*(volatile uint32_t*)0x4004405C)
  450. #define CAN2MOD (*(volatile uint32_t*)0x40048000)
  451. #define CAN2CMR (*(volatile uint32_t*)0x40048004)
  452. #define CAN2GSR (*(volatile uint32_t*)0x40048008)
  453. #define CAN2ICR (*(volatile uint32_t*)0x4004800C)
  454. #define CAN2IER (*(volatile uint32_t*)0x40048010)
  455. #define CAN2BTR (*(volatile uint32_t*)0x40048014)
  456. #define CAN2EWL (*(volatile uint32_t*)0x40048018)
  457. #define CAN2SR (*(volatile uint32_t*)0x4004801C)
  458. #define CAN2RFS (*(volatile uint32_t*)0x40048020)
  459. #define CAN2RID (*(volatile uint32_t*)0x40048024)
  460. #define CAN2RDA (*(volatile uint32_t*)0x40048028)
  461. #define CAN2RDB (*(volatile uint32_t*)0x4004802C)
  462. #define CAN2TFI1 (*(volatile uint32_t*)0x40048030)
  463. #define CAN2TID1 (*(volatile uint32_t*)0x40048034)
  464. #define CAN2TDA1 (*(volatile uint32_t*)0x40048038)
  465. #define CAN2TDB1 (*(volatile uint32_t*)0x4004803C)
  466. #define CAN2TFI2 (*(volatile uint32_t*)0x40048040)
  467. #define CAN2TID2 (*(volatile uint32_t*)0x40048044)
  468. #define CAN2TDA2 (*(volatile uint32_t*)0x40048048)
  469. #define CAN2TDB2 (*(volatile uint32_t*)0x4004804C)
  470. #define CAN2TFI3 (*(volatile uint32_t*)0x40048050)
  471. #define CAN2TID3 (*(volatile uint32_t*)0x40048054)
  472. #define CAN2TDA3 (*(volatile uint32_t*)0x40048058)
  473. #define CAN2TDB3 (*(volatile uint32_t*)0x4004805C)
  474. /* SPI0 */
  475. #define S0SPCR (*(volatile uint32_t*)0x40020000)
  476. #define S0SPSR (*(volatile uint32_t*)0x40020004)
  477. #define S0SPDR (*(volatile uint32_t*)0x40020008)
  478. #define S0SPCCR (*(volatile uint32_t*)0x4002000C)
  479. #define S0SPINT (*(volatile uint32_t*)0x4002001C)
  480. /* SSP0,SSP1 */
  481. #define SSP0CR0 (*(volatile uint32_t*)0x40088000)
  482. #define SSP0CR1 (*(volatile uint32_t*)0x40088004)
  483. #define SSP0DR (*(volatile uint32_t*)0x40088008)
  484. #define SSP0SR (*(volatile uint32_t*)0x4008800C)
  485. #define SSP0CPSR (*(volatile uint32_t*)0x40088010)
  486. #define SSP0IMSC (*(volatile uint32_t*)0x40088014)
  487. #define SSP0RIS (*(volatile uint32_t*)0x40088018)
  488. #define SSP0MIS (*(volatile uint32_t*)0x4008801C)
  489. #define SSP0ICR (*(volatile uint32_t*)0x40088020)
  490. #define SSP0DMACR (*(volatile uint32_t*)0x40088024)
  491. #define SSP1CR0 (*(volatile uint32_t*)0x40030000)
  492. #define SSP1CR1 (*(volatile uint32_t*)0x40030004)
  493. #define SSP1DR (*(volatile uint32_t*)0x40030008)
  494. #define SSP1SR (*(volatile uint32_t*)0x4003000C)
  495. #define SSP1CPSR (*(volatile uint32_t*)0x40030010)
  496. #define SSP1IMSC (*(volatile uint32_t*)0x40030014)
  497. #define SSP1RIS (*(volatile uint32_t*)0x40030018)
  498. #define SSP1MIS (*(volatile uint32_t*)0x4003001C)
  499. #define SSP1ICR (*(volatile uint32_t*)0x40030020)
  500. #define SSP1DMACR (*(volatile uint32_t*)0x40030024)
  501. /* I2C0,I2C1,I2C2 */
  502. #define I2C0CONSET (*(volatile uint32_t*)0x4001C000)
  503. #define I2C0STAT (*(volatile uint32_t*)0x4001C004)
  504. #define I2C0DAT (*(volatile uint32_t*)0x4001C008)
  505. #define I2C0ADR0 (*(volatile uint32_t*)0x4001C00C)
  506. #define I2C0SCLH (*(volatile uint32_t*)0x4001C010)
  507. #define I2C0SCLL (*(volatile uint32_t*)0x4001C014)
  508. #define I2C0CONCLR (*(volatile uint32_t*)0x4001C018)
  509. #define I2C0MMCTRL (*(volatile uint32_t*)0x4001C01C)
  510. #define I2C0ADR1 (*(volatile uint32_t*)0x4001C020)
  511. #define I2C0ADR2 (*(volatile uint32_t*)0x4001C024)
  512. #define I2C0ADR3 (*(volatile uint32_t*)0x4001C028)
  513. #define I2C0DATA_BUFFER (*(volatile uint32_t*)0x4001C02C)
  514. #define I2C0MASK ( (volatile uint32_t*)0x4001C030)
  515. #define I2C0MASK0 (*(volatile uint32_t*)0x4001C030)
  516. #define I2C0MASK1 (*(volatile uint32_t*)0x4001C034)
  517. #define I2C0MASK2 (*(volatile uint32_t*)0x4001C038)
  518. #define I2C0MASK3 (*(volatile uint32_t*)0x4001C03C)
  519. #define I2C1CONSET (*(volatile uint32_t*)0x4005C000)
  520. #define I2C1STAT (*(volatile uint32_t*)0x4005C004)
  521. #define I2C1DAT (*(volatile uint32_t*)0x4005C008)
  522. #define I2C1ADR0 (*(volatile uint32_t*)0x4005C00C)
  523. #define I2C1SCLH (*(volatile uint32_t*)0x4005C010)
  524. #define I2C1SCLL (*(volatile uint32_t*)0x4005C014)
  525. #define I2C1CONCLR (*(volatile uint32_t*)0x4005C018)
  526. #define I2C1MMCTRL (*(volatile uint32_t*)0x4005C01C)
  527. #define I2C1ADR1 (*(volatile uint32_t*)0x4005C020)
  528. #define I2C1ADR2 (*(volatile uint32_t*)0x4005C024)
  529. #define I2C1ADR3 (*(volatile uint32_t*)0x4005C028)
  530. #define I2C1DATA_BUFFER (*(volatile uint32_t*)0x4005C02C)
  531. #define I2C1MASK ( (volatile uint32_t*)0x4005C030)
  532. #define I2C1MASK0 (*(volatile uint32_t*)0x4005C030)
  533. #define I2C1MASK1 (*(volatile uint32_t*)0x4005C034)
  534. #define I2C1MASK2 (*(volatile uint32_t*)0x4005C038)
  535. #define I2C1MASK3 (*(volatile uint32_t*)0x4005C03C)
  536. #define I2C2CONSET (*(volatile uint32_t*)0x400A0000)
  537. #define I2C2STAT (*(volatile uint32_t*)0x400A0004)
  538. #define I2C2DAT (*(volatile uint32_t*)0x400A0008)
  539. #define I2C2ADR0 (*(volatile uint32_t*)0x400A000C)
  540. #define I2C2SCLH (*(volatile uint32_t*)0x400A0010)
  541. #define I2C2SCLL (*(volatile uint32_t*)0x400A0014)
  542. #define I2C2CONCLR (*(volatile uint32_t*)0x400A0018)
  543. #define I2C2MMCTRL (*(volatile uint32_t*)0x400A001C)
  544. #define I2C2ADR1 (*(volatile uint32_t*)0x400A0020)
  545. #define I2C2ADR2 (*(volatile uint32_t*)0x400A0024)
  546. #define I2C2ADR3 (*(volatile uint32_t*)0x400A0028)
  547. #define I2C2DATA_BUFFER (*(volatile uint32_t*)0x400A002C)
  548. #define I2C2MASK ( (volatile uint32_t*)0x400A0030)
  549. #define I2C2MASK0 (*(volatile uint32_t*)0x400A0030)
  550. #define I2C2MASK1 (*(volatile uint32_t*)0x400A0034)
  551. #define I2C2MASK2 (*(volatile uint32_t*)0x400A0038)
  552. #define I2C2MASK3 (*(volatile uint32_t*)0x400A003C)
  553. /* I2S */
  554. #define I2SDAO (*(volatile uint32_t*)0x400A8000)
  555. #define I2SDAI (*(volatile uint32_t*)0x400A8004)
  556. #define I2STXFIFO (*(volatile uint32_t*)0x400A8008)
  557. #define I2SRXFIFO (*(volatile uint32_t*)0x400A800C)
  558. #define I2SSTATE (*(volatile uint32_t*)0x400A8010)
  559. #define I2SDMA1 (*(volatile uint32_t*)0x400A8014)
  560. #define I2SDMA2 (*(volatile uint32_t*)0x400A8018)
  561. #define I2SIRQ (*(volatile uint32_t*)0x400A801C)
  562. #define I2STXRATE (*(volatile uint32_t*)0x400A8020)
  563. #define I2SRXRATE (*(volatile uint32_t*)0x400A8024)
  564. #define I2STXBITRATE (*(volatile uint32_t*)0x400A8028)
  565. #define I2SRXBITRATE (*(volatile uint32_t*)0x400A802C)
  566. #define I2STXMODE (*(volatile uint32_t*)0x400A8030)
  567. #define I2SRXMODE (*(volatile uint32_t*)0x400A8034)
  568. /* Timer0,Timer1,Timer2,Timer3 */
  569. #define T0IR (*(volatile uint32_t*)0x40004000)
  570. #define T0TCR (*(volatile uint32_t*)0x40004004)
  571. #define T0TC (*(volatile uint32_t*)0x40004008)
  572. #define T0PR (*(volatile uint32_t*)0x4000400C)
  573. #define T0PC (*(volatile uint32_t*)0x40004010)
  574. #define T0MCR (*(volatile uint32_t*)0x40004014)
  575. #define T0MR ( (volatile uint32_t*)0x40004018)
  576. #define T0MR0 (*(volatile uint32_t*)0x40004018)
  577. #define T0MR1 (*(volatile uint32_t*)0x4000401C)
  578. #define T0MR2 (*(volatile uint32_t*)0x40004020)
  579. #define T0MR3 (*(volatile uint32_t*)0x40004024)
  580. #define T0CCR (*(volatile uint32_t*)0x40004028)
  581. #define T0CR0 (*(volatile uint32_t*)0x4000402C)
  582. #define T0CR1 (*(volatile uint32_t*)0x40004030)
  583. #define T0EMR (*(volatile uint32_t*)0x4000403C)
  584. #define T0CTCR (*(volatile uint32_t*)0x40004070)
  585. #define T1IR (*(volatile uint32_t*)0x40008000)
  586. #define T1TCR (*(volatile uint32_t*)0x40008004)
  587. #define T1TC (*(volatile uint32_t*)0x40008008)
  588. #define T1PR (*(volatile uint32_t*)0x4000800C)
  589. #define T1PC (*(volatile uint32_t*)0x40008010)
  590. #define T1MCR (*(volatile uint32_t*)0x40008014)
  591. #define T1MR ( (volatile uint32_t*)0x40008018)
  592. #define T1MR0 (*(volatile uint32_t*)0x40008018)
  593. #define T1MR1 (*(volatile uint32_t*)0x4000801C)
  594. #define T1MR2 (*(volatile uint32_t*)0x40008020)
  595. #define T1MR3 (*(volatile uint32_t*)0x40008024)
  596. #define T1CCR (*(volatile uint32_t*)0x40008028)
  597. #define T1CR0 (*(volatile uint32_t*)0x4000802C)
  598. #define T1CR1 (*(volatile uint32_t*)0x40008030)
  599. #define T1EMR (*(volatile uint32_t*)0x4000803C)
  600. #define T1CTCR (*(volatile uint32_t*)0x40008070)
  601. #define T2IR (*(volatile uint32_t*)0x40090000)
  602. #define T2TCR (*(volatile uint32_t*)0x40090004)
  603. #define T2TC (*(volatile uint32_t*)0x40090008)
  604. #define T2PR (*(volatile uint32_t*)0x4009000C)
  605. #define T2PC (*(volatile uint32_t*)0x40090010)
  606. #define T2MCR (*(volatile uint32_t*)0x40090014)
  607. #define T2MR ( (volatile uint32_t*)0x40090018)
  608. #define T2MR0 (*(volatile uint32_t*)0x40090018)
  609. #define T2MR1 (*(volatile uint32_t*)0x4009001C)
  610. #define T2MR2 (*(volatile uint32_t*)0x40090020)
  611. #define T2MR3 (*(volatile uint32_t*)0x40090024)
  612. #define T2CCR (*(volatile uint32_t*)0x40090028)
  613. #define T2CR0 (*(volatile uint32_t*)0x4009002C)
  614. #define T2CR1 (*(volatile uint32_t*)0x40090030)
  615. #define T2EMR (*(volatile uint32_t*)0x4009003C)
  616. #define T2CTCR (*(volatile uint32_t*)0x40090070)
  617. #define T3IR (*(volatile uint32_t*)0x40094000)
  618. #define T3TCR (*(volatile uint32_t*)0x40094004)
  619. #define T3TC (*(volatile uint32_t*)0x40094008)
  620. #define T3PR (*(volatile uint32_t*)0x4009400C)
  621. #define T3PC (*(volatile uint32_t*)0x40094010)
  622. #define T3MCR (*(volatile uint32_t*)0x40094014)
  623. #define T3MR ( (volatile uint32_t*)0x40094018)
  624. #define T3MR0 (*(volatile uint32_t*)0x40094018)
  625. #define T3MR1 (*(volatile uint32_t*)0x4009401C)
  626. #define T3MR2 (*(volatile uint32_t*)0x40094020)
  627. #define T3MR3 (*(volatile uint32_t*)0x40094024)
  628. #define T3CCR (*(volatile uint32_t*)0x40094028)
  629. #define T3CR0 (*(volatile uint32_t*)0x4009402C)
  630. #define T3CR1 (*(volatile uint32_t*)0x40094030)
  631. #define T3EMR (*(volatile uint32_t*)0x4009403C)
  632. #define T3CTCR (*(volatile uint32_t*)0x40094070)
  633. /* Repeative Interrupt Timer */
  634. #define RICOMPVAL (*(volatile uint32_t*)0x400B0000)
  635. #define RIMASK (*(volatile uint32_t*)0x400B0004)
  636. #define RICTRL (*(volatile uint32_t*)0x400B0008)
  637. #define RICOUNTER (*(volatile uint32_t*)0x400B000C)
  638. /* PWM1 */
  639. #define PWM1IR (*(volatile uint32_t*)0x40018000)
  640. #define PWM1TCR (*(volatile uint32_t*)0x40018004)
  641. #define PWM1TC (*(volatile uint32_t*)0x40018008)
  642. #define PWM1PR (*(volatile uint32_t*)0x4001800C)
  643. #define PWM1PC (*(volatile uint32_t*)0x40018010)
  644. #define PWM1MCR (*(volatile uint32_t*)0x40018014)
  645. #define PWM1MR0 (*(volatile uint32_t*)0x40018018)
  646. #define PWM1MR1 (*(volatile uint32_t*)0x4001801C)
  647. #define PWM1MR2 (*(volatile uint32_t*)0x40018020)
  648. #define PWM1MR3 (*(volatile uint32_t*)0x40018024)
  649. #define PWM1CCR (*(volatile uint32_t*)0x40018028)
  650. #define PWM1CR0 (*(volatile uint32_t*)0x4001802C)
  651. #define PWM1CR1 (*(volatile uint32_t*)0x40018030)
  652. #define PWM1CR2 (*(volatile uint32_t*)0x40018034)
  653. #define PWM1CR3 (*(volatile uint32_t*)0x40018038)
  654. #define PWM1MR4 (*(volatile uint32_t*)0x40018040)
  655. #define PWM1MR5 (*(volatile uint32_t*)0x40018044)
  656. #define PWM1MR6 (*(volatile uint32_t*)0x40018048)
  657. #define PWM1PCR (*(volatile uint32_t*)0x4001804C)
  658. #define PWM1LER (*(volatile uint32_t*)0x40018050)
  659. #define PWM1CTCR (*(volatile uint32_t*)0x40018070)
  660. /* Motor Control PWM */
  661. #define MCCON (*(volatile uint32_t*)0x400B8000)
  662. #define MCCON_SET (*(volatile uint32_t*)0x400B8004)
  663. #define MCCON_CLR (*(volatile uint32_t*)0x400B8008)
  664. #define MCCAPCON (*(volatile uint32_t*)0x400B800C)
  665. #define MCCAPCON_SET (*(volatile uint32_t*)0x400B8010)
  666. #define MCCAPCON_CLR (*(volatile uint32_t*)0x400B8014)
  667. #define MCTC ( (volatile uint32_t*)0x400B8018)
  668. #define MCTC0 (*(volatile uint32_t*)0x400B8018)
  669. #define MCTC1 (*(volatile uint32_t*)0x400B801C)
  670. #define MCTC2 (*(volatile uint32_t*)0x400B8020)
  671. #define MCLIM ( (volatile uint32_t*)0x400B8024)
  672. #define MCLIM0 (*(volatile uint32_t*)0x400B8024)
  673. #define MCLIM1 (*(volatile uint32_t*)0x400B8028)
  674. #define MCLIM2 (*(volatile uint32_t*)0x400B802C)
  675. #define MCMAT ( (volatile uint32_t*)0x400B8030)
  676. #define MCMAT0 (*(volatile uint32_t*)0x400B8030)
  677. #define MCMAT1 (*(volatile uint32_t*)0x400B8034)
  678. #define MCMAT2 (*(volatile uint32_t*)0x400B8038)
  679. #define MCDT (*(volatile uint32_t*)0x400B803C)
  680. #define MCCP (*(volatile uint32_t*)0x400B8040)
  681. #define MCCAP ( (volatile uint32_t*)0x400B8044)
  682. #define MCCAP0 (*(volatile uint32_t*)0x400B8044)
  683. #define MCCAP1 (*(volatile uint32_t*)0x400B8048)
  684. #define MCCAP2 (*(volatile uint32_t*)0x400B804C)
  685. #define MCINTEN (*(volatile uint32_t*)0x400B8050)
  686. #define MCINTEN_SET (*(volatile uint32_t*)0x400B8054)
  687. #define MCINTEN_CLR (*(volatile uint32_t*)0x400B8058)
  688. #define MCCNTCON (*(volatile uint32_t*)0x400B805C)
  689. #define MCCNTCON_SET (*(volatile uint32_t*)0x400B8060)
  690. #define MCCNTCON_CLR (*(volatile uint32_t*)0x400B8064)
  691. #define MCINTF (*(volatile uint32_t*)0x400B8068)
  692. #define MCINTF_SET (*(volatile uint32_t*)0x400B806C)
  693. #define MCINTF_CLR (*(volatile uint32_t*)0x400B8070)
  694. #define MCCAP_CLR (*(volatile uint32_t*)0x400B8074)
  695. /* Quadrature Encoder Interface */
  696. #define QEICON (*(volatile uint32_t*)0x400BC000)
  697. #define QEICONF (*(volatile uint32_t*)0x400BC008)
  698. #define QEISTAT (*(volatile uint32_t*)0x400BC004)
  699. #define QEIPOS (*(volatile uint32_t*)0x400BC00C)
  700. #define QEIMAXPOS (*(volatile uint32_t*)0x400BC010)
  701. #define CMPOS0 (*(volatile uint32_t*)0x400BC014)
  702. #define CMPOS1 (*(volatile uint32_t*)0x400BC018)
  703. #define CMPOS2 (*(volatile uint32_t*)0x400BC01C)
  704. #define INXCNT (*(volatile uint32_t*)0x400BC020)
  705. #define INXCMP (*(volatile uint32_t*)0x400BC024)
  706. #define QEILOAD (*(volatile uint32_t*)0x400BC028)
  707. #define QEITIME (*(volatile uint32_t*)0x400BC02C)
  708. #define QEIVEL (*(volatile uint32_t*)0x400BC030)
  709. #define QEICAP (*(volatile uint32_t*)0x400BC034)
  710. #define VELCOMP (*(volatile uint32_t*)0x400BC038)
  711. #define FILTER (*(volatile uint32_t*)0x400BC03C)
  712. #define QEIINTSTAT (*(volatile uint32_t*)0x400BCFE0)
  713. #define QEISET (*(volatile uint32_t*)0x400BCFEC)
  714. #define QEICLR (*(volatile uint32_t*)0x400BCFE8)
  715. #define QEIIE (*(volatile uint32_t*)0x400BCFE4)
  716. #define QEIIES (*(volatile uint32_t*)0x400BCFDC)
  717. #define QEIIEC (*(volatile uint32_t*)0x400BCFD8)
  718. /* RTC */
  719. #define RTC_ILR (*(volatile uint32_t*)0x40024000)
  720. #define RTC_CCR (*(volatile uint32_t*)0x40024008)
  721. #define RTC_CIIR (*(volatile uint32_t*)0x4002400C)
  722. #define RTC_AMR (*(volatile uint32_t*)0x40024010)
  723. #define RTC_AUX (*(volatile uint32_t*)0x4002405C)
  724. #define RTC_AUXEN (*(volatile uint32_t*)0x40024058)
  725. #define RTC_CTIME0 (*(volatile uint32_t*)0x40024014)
  726. #define RTC_CTIME1 (*(volatile uint32_t*)0x40024018)
  727. #define RTC_CTIME2 (*(volatile uint32_t*)0x4002401C)
  728. #define RTC_SEC (*(volatile uint32_t*)0x40024020)
  729. #define RTC_MIN (*(volatile uint32_t*)0x40024024)
  730. #define RTC_HOUR (*(volatile uint32_t*)0x40024028)
  731. #define RTC_DOM (*(volatile uint32_t*)0x4002402C)
  732. #define RTC_DOW (*(volatile uint32_t*)0x40024030)
  733. #define RTC_DOY (*(volatile uint32_t*)0x40024034)
  734. #define RTC_MONTH (*(volatile uint32_t*)0x40024038)
  735. #define RTC_YEAR (*(volatile uint32_t*)0x4002403C)
  736. #define RTC_CALIBRATION (*(volatile uint32_t*)0x40024040)
  737. #define RTC_GPREG ( (volatile uint32_t*)0x40024044)
  738. #define RTC_GPREG0 (*(volatile uint32_t*)0x40024044)
  739. #define RTC_GPREG1 (*(volatile uint32_t*)0x40024048)
  740. #define RTC_GPREG2 (*(volatile uint32_t*)0x4002404C)
  741. #define RTC_GPREG3 (*(volatile uint32_t*)0x40024050)
  742. #define RTC_GPREG4 (*(volatile uint32_t*)0x40024054)
  743. #define RTC_ALSEC (*(volatile uint32_t*)0x40024060)
  744. #define RTC_ALMIN (*(volatile uint32_t*)0x40024064)
  745. #define RTC_ALHOUR (*(volatile uint32_t*)0x40024068)
  746. #define RTC_ALDOM (*(volatile uint32_t*)0x4002406C)
  747. #define RTC_ALDOW (*(volatile uint32_t*)0x40024070)
  748. #define RTC_ALDOY (*(volatile uint32_t*)0x40024074)
  749. #define RTC_ALMON (*(volatile uint32_t*)0x40024078)
  750. #define RTC_ALYEAR (*(volatile uint32_t*)0x4002407C)
  751. /* WDT */
  752. #define WDMOD (*(volatile uint32_t*)0x40000000)
  753. #define WDTC (*(volatile uint32_t*)0x40000004)
  754. #define WDFEED (*(volatile uint32_t*)0x40000008)
  755. #define WDTV (*(volatile uint32_t*)0x4000000C)
  756. #define WDCLKSEL (*(volatile uint32_t*)0x40000010)
  757. /* ADC0 */
  758. #define AD0CR (*(volatile uint32_t*)0x40034000)
  759. #define AD0GDR (*(volatile uint32_t*)0x40034004)
  760. #define AD0INTEN (*(volatile uint32_t*)0x4003400C)
  761. #define AD0DR ( (volatile uint32_t*)0x40034010)
  762. #define AD0DR0 (*(volatile uint32_t*)0x40034010)
  763. #define AD0DR1 (*(volatile uint32_t*)0x40034014)
  764. #define AD0DR2 (*(volatile uint32_t*)0x40034018)
  765. #define AD0DR3 (*(volatile uint32_t*)0x4003401C)
  766. #define AD0DR4 (*(volatile uint32_t*)0x40034020)
  767. #define AD0DR5 (*(volatile uint32_t*)0x40034024)
  768. #define AD0DR6 (*(volatile uint32_t*)0x40034028)
  769. #define AD0DR7 (*(volatile uint32_t*)0x4003402C)
  770. #define AD0STAT (*(volatile uint32_t*)0x40034030)
  771. #define AD0TRM (*(volatile uint32_t*)0x40034034)
  772. /* DAC */
  773. #define DACR (*(volatile uint32_t*)0x4008C000)
  774. #define DACCTRL (*(volatile uint32_t*)0x4008C004)
  775. #define DACCNTVAL (*(volatile uint32_t*)0x4008C008)
  776. /* GPDMA */
  777. #define DMACIntStat (*(volatile uint32_t*)0x50004000)
  778. #define DMACIntTCStat (*(volatile uint32_t*)0x50004004)
  779. #define DMACIntTCClear (*(volatile uint32_t*)0x50004008)
  780. #define DMACIntErrStat (*(volatile uint32_t*)0x5000400C)
  781. #define DMACIntErrClr (*(volatile uint32_t*)0x50004010)
  782. #define DMACRawIntTCStat (*(volatile uint32_t*)0x50004014)
  783. #define DMACRawIntErrStat (*(volatile uint32_t*)0x50004018)
  784. #define DMACEnbldChns (*(volatile uint32_t*)0x5000401C)
  785. #define DMACSoftBReq (*(volatile uint32_t*)0x50004020)
  786. #define DMACSoftSReq (*(volatile uint32_t*)0x50004024)
  787. #define DMACSoftLBReq (*(volatile uint32_t*)0x50004028)
  788. #define DMACSoftLSReq (*(volatile uint32_t*)0x5000402C)
  789. #define DMACConfig (*(volatile uint32_t*)0x50004030)
  790. #define DMACSync (*(volatile uint32_t*)0x50004034)
  791. #define DMAREQSEL (*(volatile uint32_t*)0x400FC1C4)
  792. #define DMACC0SrcAddr (*(volatile uint32_t*)0x50004100)
  793. #define DMACC0DestAddr (*(volatile uint32_t*)0x50004104)
  794. #define DMACC0LLI (*(volatile uint32_t*)0x50004108)
  795. #define DMACC0Control (*(volatile uint32_t*)0x5000410C)
  796. #define DMACC0Config (*(volatile uint32_t*)0x50004110)
  797. #define DMACC1SrcAddr (*(volatile uint32_t*)0x50004120)
  798. #define DMACC1DestAddr (*(volatile uint32_t*)0x50004124)
  799. #define DMACC1LLI (*(volatile uint32_t*)0x50004128)
  800. #define DMACC1Control (*(volatile uint32_t*)0x5000412C)
  801. #define DMACC1Config (*(volatile uint32_t*)0x50004130)
  802. #define DMACC2SrcAddr (*(volatile uint32_t*)0x50004140)
  803. #define DMACC2DestAddr (*(volatile uint32_t*)0x50004144)
  804. #define DMACC2LLI (*(volatile uint32_t*)0x50004148)
  805. #define DMACC2Control (*(volatile uint32_t*)0x5000414C)
  806. #define DMACC2Config (*(volatile uint32_t*)0x50004150)
  807. #define DMACC3SrcAddr (*(volatile uint32_t*)0x50004160)
  808. #define DMACC3DestAddr (*(volatile uint32_t*)0x50004164)
  809. #define DMACC3LLI (*(volatile uint32_t*)0x50004168)
  810. #define DMACC3Control (*(volatile uint32_t*)0x5000416C)
  811. #define DMACC3Config (*(volatile uint32_t*)0x50004170)
  812. #define DMACC4SrcAddr (*(volatile uint32_t*)0x50004180)
  813. #define DMACC4DestAddr (*(volatile uint32_t*)0x50004184)
  814. #define DMACC4LLI (*(volatile uint32_t*)0x50004188)
  815. #define DMACC4Control (*(volatile uint32_t*)0x5000418C)
  816. #define DMACC4Config (*(volatile uint32_t*)0x50004190)
  817. #define DMACC5SrcAddr (*(volatile uint32_t*)0x500041A0)
  818. #define DMACC5DestAddr (*(volatile uint32_t*)0x500041A4)
  819. #define DMACC5LLI (*(volatile uint32_t*)0x500041A8)
  820. #define DMACC5Control (*(volatile uint32_t*)0x500041AC)
  821. #define DMACC5Config (*(volatile uint32_t*)0x500041B0)
  822. #define DMACC6SrcAddr (*(volatile uint32_t*)0x500041C0)
  823. #define DMACC6DestAddr (*(volatile uint32_t*)0x500041C4)
  824. #define DMACC6LLI (*(volatile uint32_t*)0x500041C8)
  825. #define DMACC6Control (*(volatile uint32_t*)0x500041CC)
  826. #define DMACC6Config (*(volatile uint32_t*)0x500041D0)
  827. #define DMACC7SrcAddr (*(volatile uint32_t*)0x500041E0)
  828. #define DMACC7DestAddr (*(volatile uint32_t*)0x500041E4)
  829. #define DMACC7LLI (*(volatile uint32_t*)0x500041E8)
  830. #define DMACC7Control (*(volatile uint32_t*)0x500041EC)
  831. #define DMACC7Config (*(volatile uint32_t*)0x500041F0)
  832. /* Cortex-M3 System timer */
  833. #define SYST_CSR (*(volatile uint32_t*)0xE000E010)
  834. #define SYST_RVR (*(volatile uint32_t*)0xE000E014)
  835. #define SYST_CVR (*(volatile uint32_t*)0xE000E018)
  836. #define SYST_CALIB (*(volatile uint32_t*)0xE000E01C)
  837. /* Cortex-M3 NVIC */
  838. #define ISER ( (volatile uint32_t*)0xE000E100)
  839. #define ICER ( (volatile uint32_t*)0xE000E180)
  840. #define ISPR ( (volatile uint32_t*)0xE000E200)
  841. #define ICPR ( (volatile uint32_t*)0xE000E280)
  842. #define IABR ( (volatile uint32_t*)0xE000E300)
  843. #define IPR ( (volatile uint8_t *)0xE000E400)
  844. #define STIR (*(volatile uint32_t*)0xE000EF00)
  845. /* Cortex-M3 SCB */
  846. #define ACTLR (*(volatile uint32_t*)0xE000E008)
  847. #define CPUID (*(volatile uint32_t*)0xE000ED00)
  848. #define ICSR (*(volatile uint32_t*)0xE000ED04)
  849. #define VTOR (*(volatile uint32_t*)0xE000ED08)
  850. #define AIRCR (*(volatile uint32_t*)0xE000ED0C)
  851. #define SCR (*(volatile uint32_t*)0xE000ED10)
  852. #define CCR (*(volatile uint32_t*)0xE000ED14)
  853. #define SHPR ( (volatile uint8_t *)0xE000ED14)
  854. #define CFSR (*(volatile uint32_t*)0xE000ED28)
  855. #define MMSR (*(volatile uint32_t*)0xE000ED28)
  856. #define BFSR (*(volatile uint32_t*)0xE000ED29)
  857. #define UFSR (*(volatile uint32_t*)0xE000ED2A)
  858. #define HFSR (*(volatile uint32_t*)0xE000ED2C)
  859. #define MMFAR (*(volatile uint32_t*)0xE000ED34)
  860. #define BFAR (*(volatile uint32_t*)0xE000ED38)
  861. /*--------------------------------------------------------------*/
  862. /* Cortex-M3 core/peripheral access macros */
  863. /*--------------------------------------------------------------*/
  864. /* These are for only privileged mode */
  865. #define __enable_irq() asm volatile ("CPSIE i\n")
  866. #define __disable_irq() asm volatile ("CPSID i\n")
  867. #define __enable_irqn(n) ISER[(n) / 32] = 1 << ((n) % 32)
  868. #define __disable_irqn(n) ICER[(n) / 32] = 1 << ((n) % 32)
  869. #define __test_irqn_enabled(n) (ISER[(n) / 32] & (1 << ((n) % 32)))
  870. #define __set_irqn(n) ISPR[(n) / 32] = 1 << ((n) % 32)
  871. #define __clear_irqn(n) ICPR[(n) / 32] = 1 << ((n) % 32)
  872. #define __test_irqn(n) (ICPR[(n) / 32] & (1 << ((n) % 32)))
  873. #define __test_irqn_active(n) (IABR[n / 32] & (1 << ((n) % 32)))
  874. #define __set_irqn_priority(n,v) IPR[n] = (v)
  875. #define __set_faultn_priority(n,v) SHPR[(n) + 16] = (v)
  876. #define __get_MSP() ({uint32_t __rv; asm ("MRS %0, MSP\n" : "=r" (__rv)); __rv;})
  877. #define __get_PSP() ({uint32_t __rv; asm ("MRS %0, PSP\n" : "=r" (__rv)); __rv;})
  878. #define __get_PRIMASK() ({uint32_t __rv; asm ("MRS %0, PRIMASK\n" : "=r" (__rv)); __rv;})
  879. #define __get_FAULTMASK() ({uint32_t __rv; asm ("MRS %0, FAULTMASK\n" : "=r" (__rv)); __rv;})
  880. #define __get_BASEPRI() ({uint32_t __rv; asm ("MRS %0, BASEPRI\n" : "=r" (__rv)); __rv;})
  881. #define __get_CONTROL() ({uint32_t __rv; asm ("MRS %0, CONTROL\n" : "=r" (__rv)); __rv;})
  882. #define __set_MSP(arg) {uint32_t __v=arg; asm ("MSR MSP, %0\n" :: "r" (__v));}
  883. #define __set_PSP(arg) {uint32_t __v=arg; asm ("MSR PSP, %0\n" :: "r" (__v));}
  884. #define __set_PRIMASK(arg) {uint32_t __v=arg; asm ("MSR PRIMASK, %0\n" :: "r" (__v));}
  885. #define __set_FAULTMASK(arg) {uint32_t __v=arg; asm ("MSR FAULTMASK, %0\n" :: "r" (__v));}
  886. #define __set_BASEPRI(arg) {uint32_t __v=arg; asm ("MSR BASEPRI, %0\n" :: "r" (__v));}
  887. #define __set_CONTORL(arg) {uint32_t __v=arg; asm ("MSR CONTROL, %0\nISB\n" :: "r" (__v));}
  888. /* These functions and macros are alternative of above for user mode */
  889. #if USE_SV_SERVICE
  890. #define __enable_irq_user() asm volatile ("SVC #0\n") /* CPSIE i */
  891. #define __disable_irq_user() asm volatile ("SVC #1\n") /* CPSID i */
  892. #define __enable_irq_user() asm volatile ("SVC #2\n") /* CPSIE f */
  893. #define __disable_irq_user() asm volatile ("SVC #3\n") /* CPSID f */
  894. uint32_t __get_scs_reg (volatile uint32_t* reg); /* Read a register in SCS */
  895. void __set_scs_reg (volatile uint32_t* reg, uint32_t val); /* Write a register in SCS */
  896. #define __enable_irqn_user(n) __set_scs_reg(&ISER[((n) / 32)], 1 << ((n) % 32))
  897. #define __disable_irqn_user(n) __set_scs_reg(&ISCR[((n) / 32)], 1 << ((n) % 32))
  898. #define __test_irqn_enabled_user(n) (__get_scs_reg(&ISCR[(n) / 32]) & (1 << ((n) % 32)))
  899. #define __set_irqn_user(n) __set_scs_reg(&ISPR[((n) / 32)], 1 << ((n) % 32))
  900. #define __clear_irqn_user(n) __set_scs_reg(&ICPR[((n) / 32)], 1 << ((n) % 32))
  901. #define __test_irqn_user(n) (__get_scs_reg(&ICPR[(n) / 32]) & (1 << ((n) % 32)))
  902. #define __test_active_irqn_user(n) (__get_scs_reg(&IABR[(n) / 32]) & (1 << ((n) % 32)))
  903. #define __set_irqn_priority_user(n,v) __set_scs_reg(&IPR[n], (v))
  904. #define __set_faultn_priority_user(n,v) __set_scs_reg(&SHPR[(n) + 16], (v))
  905. #endif
  906. /* These functions/macros can be used at user/privileged mode */
  907. #define __REV(arg) ({uint32_t __r, __v=arg; asm ("REV %0,%1\n" : "=r" (__r) : "r" (__v) ); __r;})
  908. #define __REV16(arg) ({uint32_t __r, __v=arg; asm ("REV16 %0,%1\n" : "=r" (__r) : "r" (__v) ); __r;})
  909. #define __REVSH(arg) ({uint32_t __r, __v=arg; asm ("REVSH %0,%1\n" : "=r" (__r) : "r" (__v) ); __r;})
  910. #define __RBIT(arg) ({uint32_t __r, __v=arg; asm ("RBIT %0,%1\n" : "=r" (__r) : "r" (__v) ); __r;})
  911. #define __LDREXB(p) ({uint8_t __r; asm ("LDREXB %0,[%1]\n" : "=r" (__r) : "r" (p)); __r;})
  912. #define __LDREXH(p) ({uint16_t __r; asm ("LDREXH %0,[%1]\n" : "=r" (__r) : "r" (p)); __r;})
  913. #define __LDREXW(p) ({uint32_t __r; asm ("LDREX %0,[%1]\n" : "=r" (__r) : "r" (p)); __r;})
  914. #define __STREXB(d,p) ({register uint32_t __r asm("r2"); register uint8_t __d asm("r1") = d; register volatile uint8_t *__p asm("r0") = p; asm ("STREXB %0,%2,[%1]\n" : "=r" (__r) : "r" (__p), "r" (__d)); __r;})
  915. #define __STREXH(d,p) ({register uint32_t __r asm("r2"); register uint16_t __d asm("r1") = d; register volatile uint16_t *__p asm("r0") = p; asm ("STREXH %0,%2,[%1]\n" : "=r" (__r) : "r" (p), "r" (__d)); __r;})
  916. #define __STREXW(d,p) ({register uint32_t __r asm("r2"); register uint32_t __d asm("r1") = d; register volatile uint32_t *__p asm("r0") = p; asm ("STREX %0,%2,[%1]\n" : "=r" (__r) : "r" (p), "r" (__d)); __r;})
  917. #define __CLREX() asm volatile ("CLREX\n")
  918. #define __SEV() asm volatile ("SEV\n")
  919. #define __WFE() asm volatile ("WFE\n")
  920. #define __WFI() asm volatile ("WFI\n")
  921. /* LPC176x IRQ number */
  922. #define MemManage_IRQn (-12)
  923. #define BusFault_IRQn (-11)
  924. #define UsageFault_IRQn (-10)
  925. #define SVC_IRQn (-5)
  926. #define DebugMon_IRQn (-4)
  927. #define PendSV_IRQn (-2)
  928. #define SysTick_IRQn (-1)
  929. #define WDT_IRQn 0
  930. #define TIMER0_IRQn 1
  931. #define TIMER1_IRQn 2
  932. #define TIMER2_IRQn 3
  933. #define TIMER3_IRQn 4
  934. #define UART0_IRQn 5
  935. #define UART1_IRQn 6
  936. #define UART2_IRQn 7
  937. #define UART3_IRQn 8
  938. #define PWM1_IRQn 9
  939. #define I2C0_IRQn 10
  940. #define I2C1_IRQn 11
  941. #define I2C2_IRQn 12
  942. #define SPI_IRQn 13
  943. #define SSP0_IRQn 14
  944. #define SSP1_IRQn 15
  945. #define PLL0_IRQn 16
  946. #define RTC_IRQn 17
  947. #define EINT0_IRQn 18
  948. #define EINT1_IRQn 19
  949. #define EINT2_IRQn 20
  950. #define EINT3_IRQn 21
  951. #define ADC_IRQn 22
  952. #define BOD_IRQn 23
  953. #define USB_IRQn 24
  954. #define CAN_IRQn 25
  955. #define GPDMA_IRQn 26
  956. #define I2S_IRQn 27
  957. #define ETHER_IRQn 28
  958. #define RIT_IRQn 29
  959. #define MCPWM_IRQn 30
  960. #define QEI_IRQn 31
  961. #define PLL1_IRQn 32
  962. #define USBACT_IRQn 33
  963. #define CANACT_IRQn 34
  964. /* LPC176x Peripheral Divider */
  965. #define __set_PCLKSEL(p,v) PCLKSEL[(p) / 16] = (PCLKSEL[(p) / 16] & ~(3 << ((p) * 2 % 32))) | (v << ((p) * 2 % 32))
  966. #define PCLKDIV_4 0
  967. #define PCLKDIV_1 1
  968. #define PCLKDIV_2 2
  969. #define PCLKDIV_8 3
  970. #define PCLK_WDT 0
  971. #define PCLK_TIMER0 1
  972. #define PCLK_TIMER1 2
  973. #define PCLK_UART0 3
  974. #define PCLK_UART1 4
  975. #define PCLK_PWM1 6
  976. #define PCLK_I2C0 7
  977. #define PCLK_SPI 8
  978. #define PCLK_SSP1 10
  979. #define PCLK_DAC 11
  980. #define PCLK_ADC 12
  981. #define PCLK_CAN1 13
  982. #define PCLK_CAN2 14
  983. #define PCLK_ACF 15
  984. #define PCLK_QEI 16
  985. #define PCLK_GPIOINT 17
  986. #define PCLK_PCB 18
  987. #define PCLK_I2C1 19
  988. #define PCLK_SSP0 21
  989. #define PCLK_TIMER2 22
  990. #define PCLK_TIMER3 23
  991. #define PCLK_UART2 24
  992. #define PCLK_UART3 25
  993. #define PCLK_I2C2 26
  994. #define PCLK_I2S 27
  995. #define PCLK_RIT 28
  996. #define PCLK_SYSCON 29
  997. #define PCLK_MC 30
  998. /* LPC176x Pin Configuration */
  999. #define __set_PINSEL(p,b,v) PINSEL[(p) * 2 + (b) / 16] = (PINSEL[(p) * 2 + (b) / 16] & ~(3 << ((b) * 2 % 32))) | (v << ((b) * 2 % 32))
  1000. #define __set_PINMODE(p,b,v) PINMODE[(p) * 2 + (b) / 16] = (PINMODE[(p) * 2 + (b) / 16] & ~(3 << ((b) * 2 % 32))) | (v << ((b) * 2 % 32))
  1001. #define __set_PINOD(p,b,v) PINOD[p] = (PINOD[p] & ~(1 << (b))) | ((v) << (b))
  1002. /* LPC176x Power Control */
  1003. #define __set_PCONP(p,v) PCONP = (PCONP & ~(1 << (p))) | (1 << (p))
  1004. #define PCTIM0 1
  1005. #define PCTIM1 2
  1006. #define PCUART0 3
  1007. #define PCUART1 4
  1008. #define PCPWM1 6
  1009. #define PCIIC0 7
  1010. #define PCSPI 8
  1011. #define PCRTC 9
  1012. #define PCSSP1 10
  1013. #define PCADC 12
  1014. #define PCCAN1 13
  1015. #define PCCAN2 14
  1016. #define PCGPIO 15
  1017. #define PCRIT 16
  1018. #define PCMCPWM 17
  1019. #define PCQEI 18
  1020. #define PCI2C1 19
  1021. #define PCSSP0 21
  1022. #define PCTIM2 22
  1023. #define PCTIM3 23
  1024. #define PCUART2 24
  1025. #define PCUART3 25
  1026. #define PCI2C2 26
  1027. #define PCI2S 27
  1028. #define PCGPDMA 29
  1029. #define PCENET 30
  1030. #define PCUSB 31
  1031. /*--------------------------------------------------------------*/
  1032. /* Misc Macros */
  1033. /*--------------------------------------------------------------*/
  1034. #define _BV(bit) (1<<(bit))
  1035. #define IMPORT_BIN(sect, file, sym) asm (\
  1036. ".section " #sect "\n"\
  1037. ".balign 4\n"\
  1038. ".global " #sym "\n"\
  1039. #sym ":\n"\
  1040. ".incbin \"" file "\"\n"\
  1041. ".global _sizeof_" #sym "\n"\
  1042. ".set _sizeof_" #sym ", . - " #sym "\n"\
  1043. ".balign 4\n"\
  1044. ".section \".text\"\n")
  1045. #define IMPORT_BIN_PART(sect, file, ofs, siz, sym) asm (\
  1046. ".section " #sect "\n"\
  1047. ".balign 4\n"\
  1048. ".global " #sym "\n"\
  1049. #sym ":\n"\
  1050. ".incbin \"" file "\"," #ofs "," #siz "\n"\
  1051. ".global _sizeof_" #sym "\n"\
  1052. ".set _sizeof_" #sym ", . - " #sym "\n"\
  1053. ".balign 4\n"\
  1054. ".section \".text\"\n")
  1055. /* Jump to secondary application */
  1056. #define JUMP_APP(appvt) asm (\
  1057. "LDR SP, [%0]\n" /* Initialize SP */\
  1058. "LDR PC, [%0, #4]\n" /* Go to reset vector */\
  1059. : : "r" (appvt))
  1060. #endif /* __LPC176x */