My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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variant.cpp 9.2KB

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  1. /*
  2. Copyright (c) 2011 Arduino. All right reserved.
  3. This library is free software; you can redistribute it and/or
  4. modify it under the terms of the GNU Lesser General Public
  5. License as published by the Free Software Foundation; either
  6. version 2.1 of the License, or (at your option) any later version.
  7. This library is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  10. See the GNU Lesser General Public License for more details.
  11. You should have received a copy of the GNU Lesser General Public
  12. License along with this library; if not, write to the Free Software
  13. Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  14. */
  15. #include "pins_arduino.h"
  16. #ifdef __cplusplus
  17. extern "C" {
  18. #endif
  19. // Digital PinName array
  20. const PinName digitalPin[] = {
  21. PA_0, // Digital pin 0
  22. PA_1, // Digital pin 1
  23. PA_2, // Digital pin 2
  24. PA_3, // Digital pin 3
  25. PA_4, // Digital pin 4
  26. PA_5, // Digital pin 5
  27. PA_6, // Digital pin 6
  28. PA_7, // Digital pin 7
  29. PA_8, // Digital pin 8
  30. PA_9, // Digital pin 9
  31. PA_10, // Digital pin 10
  32. PA_11, // Digital pin 11
  33. PA_12, // Digital pin 12
  34. PA_13, // Digital pin 13
  35. PA_14, // Digital pin 14
  36. PA_15, // Digital pin 15
  37. PB_0, // Digital pin 16
  38. PB_1, // Digital pin 17
  39. PB_2, // Digital pin 18
  40. PB_3, // Digital pin 19
  41. PB_4, // Digital pin 20
  42. PB_5, // Digital pin 21
  43. PB_6, // Digital pin 22
  44. PB_7, // Digital pin 23
  45. PB_8, // Digital pin 24
  46. PB_9, // Digital pin 25
  47. PB_10, // Digital pin 26
  48. PB_11, // Digital pin 27
  49. PB_12, // Digital pin 28
  50. PB_13, // Digital pin 29
  51. PB_14, // Digital pin 30
  52. PB_15, // Digital pin 31
  53. PC_0, // Digital pin 32
  54. PC_1, // Digital pin 33
  55. PC_2, // Digital pin 34
  56. PC_3, // Digital pin 35
  57. PC_4, // Digital pin 36
  58. PC_5, // Digital pin 37
  59. PC_6, // Digital pin 38
  60. PC_7, // Digital pin 39
  61. PC_8, // Digital pin 40
  62. PC_9, // Digital pin 41
  63. PC_10, // Digital pin 42
  64. PC_11, // Digital pin 43
  65. PC_12, // Digital pin 44
  66. PC_13, // Digital pin 45
  67. PC_14, // Digital pin 46
  68. PC_15, // Digital pin 47
  69. PD_0, // Digital pin 48
  70. PD_1, // Digital pin 49
  71. PD_2, // Digital pin 50
  72. PD_3, // Digital pin 51
  73. PD_4, // Digital pin 52
  74. PD_5, // Digital pin 53
  75. PD_6, // Digital pin 54
  76. PD_7, // Digital pin 55
  77. PD_8, // Digital pin 56
  78. PD_9, // Digital pin 57
  79. PD_10, // Digital pin 58
  80. PD_11, // Digital pin 59
  81. PD_12, // Digital pin 60
  82. PD_13, // Digital pin 61
  83. PD_14, // Digital pin 62
  84. PD_15, // Digital pin 63
  85. PE_0, // Digital pin 64
  86. PE_1, // Digital pin 65
  87. PE_2, // Digital pin 66
  88. PE_3, // Digital pin 67
  89. PE_4, // Digital pin 68
  90. PE_5, // Digital pin 69
  91. PE_6, // Digital pin 70
  92. PE_7, // Digital pin 71
  93. PE_8, // Digital pin 72
  94. PE_9, // Digital pin 73
  95. PE_10, // Digital pin 74
  96. PE_11, // Digital pin 75
  97. PE_12, // Digital pin 76
  98. PE_13, // Digital pin 77
  99. PE_14, // Digital pin 78
  100. PE_15, // Digital pin 79
  101. PH_0, // Digital pin 80, used by the external oscillator
  102. PH_1 // Digital pin 81, used by the external oscillator
  103. };
  104. // Analog (Ax) pin number array
  105. const uint32_t analogInputPin[] = {
  106. 0, // A0, PA0
  107. 1, // A1, PA1
  108. 2, // A2, PA2
  109. 3, // A3, PA3
  110. 4, // A4, PA4
  111. 5, // A5, PA5
  112. 6, // A6, PA6
  113. 7, // A7, PA7
  114. 16, // A8, PB0
  115. 17, // A9, PB1
  116. 32, // A10, PC0
  117. 33, // A11, PC1
  118. 34, // A12, PC2
  119. 35, // A13, PC3
  120. 36, // A14, PC4
  121. 37 // A15, PC5
  122. };
  123. #ifdef __cplusplus
  124. }
  125. #endif
  126. // ----------------------------------------------------------------------------
  127. #ifdef __cplusplus
  128. extern "C" {
  129. #endif
  130. /*
  131. * @brief Configures the System clock source, PLL Multiplier and Divider factors,
  132. * AHB/APBx prescalers and Flash settings
  133. * @note This function should be called only once the RCC clock configuration
  134. * is reset to the default reset state (done in SystemInit() function).
  135. * @param None
  136. * @retval None
  137. */
  138. /******************************************************************************/
  139. /* PLL (clocked by HSE) used as System clock source */
  140. /******************************************************************************/
  141. static uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
  142. {
  143. RCC_OscInitTypeDef RCC_OscInitStruct;
  144. RCC_ClkInitTypeDef RCC_ClkInitStruct;
  145. /* The voltage scaling allows optimizing the power consumption when the device is
  146. clocked below the maximum system frequency, to update the voltage scaling value
  147. regarding system frequency refer to product datasheet. */
  148. __HAL_RCC_PWR_CLK_ENABLE();
  149. __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  150. // Enable HSE oscillator and activate PLL with HSE as source
  151. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  152. if (bypass == 0) {
  153. RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
  154. } else {
  155. RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
  156. }
  157. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  158. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  159. RCC_OscInitStruct.PLL.PLLM = HSE_VALUE / 1000000L; // Expects an 8 MHz external clock by default. Redefine HSE_VALUE if not
  160. RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
  161. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 168 MHz (336 MHz / 2)
  162. RCC_OscInitStruct.PLL.PLLQ = 7;
  163. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
  164. return 0; // FAIL
  165. }
  166. // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
  167. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
  168. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  169. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 168 MHz
  170. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 42 MHz
  171. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 84 MHz
  172. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
  173. return 0; // FAIL
  174. }
  175. /* Output clock on MCO1 pin(PA8) for debugging purpose */
  176. /*
  177. if (bypass == 0)
  178. HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
  179. else
  180. HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
  181. */
  182. return 1; // OK
  183. }
  184. /******************************************************************************/
  185. /* PLL (clocked by HSI) used as System clock source */
  186. /******************************************************************************/
  187. uint8_t SetSysClock_PLL_HSI(void)
  188. {
  189. RCC_OscInitTypeDef RCC_OscInitStruct;
  190. RCC_ClkInitTypeDef RCC_ClkInitStruct;
  191. /* The voltage scaling allows optimizing the power consumption when the device is
  192. clocked below the maximum system frequency, to update the voltage scaling value
  193. regarding system frequency refer to product datasheet. */
  194. __HAL_RCC_PWR_CLK_ENABLE();
  195. __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  196. // Enable HSI oscillator and activate PLL with HSI as source
  197. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
  198. RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  199. RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
  200. RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  201. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  202. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
  203. RCC_OscInitStruct.PLL.PLLM = 16; // VCO input clock = 1 MHz (16 MHz / 16)
  204. RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
  205. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 168 MHz (336 MHz / 2)
  206. RCC_OscInitStruct.PLL.PLLQ = 7;
  207. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
  208. return 0; // FAIL
  209. }
  210. /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
  211. RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
  212. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  213. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 168 MHz
  214. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 42 MHz
  215. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 84 MHz
  216. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
  217. return 0; // FAIL
  218. }
  219. /* Output clock on MCO1 pin(PA8) for debugging purpose */
  220. //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
  221. return 1; // OK
  222. }
  223. WEAK void SystemClock_Config(void)
  224. {
  225. /* 1- If fail try to start with HSE and external xtal */
  226. if (SetSysClock_PLL_HSE(0) == 0) {
  227. /* 2- Try to start with HSE and external clock */
  228. if (SetSysClock_PLL_HSE(1) == 0) {
  229. /* 3- If fail start with HSI clock */
  230. if (SetSysClock_PLL_HSI() == 0) {
  231. Error_Handler();
  232. }
  233. }
  234. }
  235. /* Ensure CCM RAM clock is enabled */
  236. __HAL_RCC_CCMDATARAMEN_CLK_ENABLE();
  237. /* Output clock on MCO2 pin(PC9) for debugging purpose */
  238. //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4);
  239. }
  240. #ifdef __cplusplus
  241. }
  242. #endif