My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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LPC1768.ld 4.4KB

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  1. /* Linker script for mbed LPC1768 */
  2. MEMORY
  3. {
  4. /* Reserve first 16K (4 sectors * 4KB) for bootloader
  5. * Reserve the last 32KB sector for EEPROM emulation
  6. */
  7. FLASH (rx) : ORIGIN = 16K, LENGTH = (512K - 48K)
  8. RAM (rwx) : ORIGIN = 0x100000C8, LENGTH = (32K - 0xC8)
  9. USB_RAM(rwx) : ORIGIN = 0x2007C000, LENGTH = 16K
  10. ETH_RAM(rwx) : ORIGIN = 0x20080000, LENGTH = 16K
  11. }
  12. /* Linker script to place sections and symbol values. Should be used together
  13. * with other linker script that defines memory regions FLASH and RAM.
  14. * It references following symbols, which must be defined in code:
  15. * Reset_Handler : Entry of reset handler
  16. *
  17. * It defines following symbols, which code can use without definition:
  18. * __exidx_start
  19. * __exidx_end
  20. * __etext
  21. * __data_start__
  22. * __preinit_array_start
  23. * __preinit_array_end
  24. * __init_array_start
  25. * __init_array_end
  26. * __fini_array_start
  27. * __fini_array_end
  28. * __data_end__
  29. * __bss_start__
  30. * __bss_end__
  31. * __end__
  32. * end
  33. * __HeapLimit
  34. * __StackLimit
  35. * __StackTop
  36. * __stack
  37. */
  38. ENTRY(Reset_Handler)
  39. SECTIONS
  40. {
  41. .text :
  42. {
  43. KEEP(*(.isr_vector))
  44. *(.text*)
  45. KEEP(*(.init))
  46. KEEP(*(.fini))
  47. /* .ctors */
  48. *crtbegin.o(.ctors)
  49. *crtbegin?.o(.ctors)
  50. *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
  51. *(SORT(.ctors.*))
  52. *(.ctors)
  53. /* .dtors */
  54. *crtbegin.o(.dtors)
  55. *crtbegin?.o(.dtors)
  56. *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
  57. *(SORT(.dtors.*))
  58. *(.dtors)
  59. *(.rodata*)
  60. KEEP(*(.eh_frame*))
  61. } > FLASH
  62. .ARM.extab :
  63. {
  64. *(.ARM.extab* .gnu.linkonce.armextab.*)
  65. } > FLASH
  66. __exidx_start = .;
  67. .ARM.exidx :
  68. {
  69. *(.ARM.exidx* .gnu.linkonce.armexidx.*)
  70. } > FLASH
  71. __exidx_end = .;
  72. __etext = .;
  73. .data : AT (__etext)
  74. {
  75. __data_start__ = .;
  76. Image$$RW_IRAM1$$Base = .;
  77. *(vtable)
  78. *(.data*)
  79. . = ALIGN(4);
  80. /* preinit data */
  81. PROVIDE (__preinit_array_start = .);
  82. KEEP(*(.preinit_array))
  83. PROVIDE (__preinit_array_end = .);
  84. . = ALIGN(4);
  85. /* init data */
  86. PROVIDE (__init_array_start = .);
  87. KEEP(*(SORT(.init_array.*)))
  88. KEEP(*(.init_array))
  89. PROVIDE (__init_array_end = .);
  90. . = ALIGN(4);
  91. /* finit data */
  92. PROVIDE (__fini_array_start = .);
  93. KEEP(*(SORT(.fini_array.*)))
  94. KEEP(*(.fini_array))
  95. PROVIDE (__fini_array_end = .);
  96. . = ALIGN(4);
  97. /* All data end */
  98. __data_end__ = .;
  99. } > RAM
  100. .bss :
  101. {
  102. __bss_start__ = .;
  103. *(.bss*)
  104. *(COMMON)
  105. __bss_end__ = .;
  106. Image$$RW_IRAM1$$ZI$$Limit = . ;
  107. } > RAM
  108. .heap :
  109. {
  110. __end__ = .;
  111. end = __end__;
  112. *(.heap*)
  113. __HeapLimit = .;
  114. } > RAM
  115. /* .stack_dummy section doesn't contains any symbols. It is only
  116. * used for linker to calculate size of stack sections, and assign
  117. * values to stack symbols later */
  118. .stack_dummy :
  119. {
  120. *(.stack)
  121. } > RAM
  122. /* Set stack top to end of RAM, and stack limit move down by
  123. * size of stack_dummy section */
  124. __StackTop = ORIGIN(RAM) + LENGTH(RAM);
  125. __StackLimit = __StackTop - SIZEOF(.stack_dummy);
  126. PROVIDE(__stack = __StackTop);
  127. PROVIDE(__heapLimit = __HeapLimit);
  128. PROVIDE(__stackSize = __StackTop - __HeapLimit);
  129. /* Area of memory, heap and stack, to fill on startup - 8 bytes at a time. */
  130. __FillStart = ALIGN(__end__, 8);
  131. /* Check if data + heap + stack exceeds RAM limit */
  132. ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
  133. /* Code can explicitly ask for data to be
  134. placed in these higher RAM banks where
  135. they will be left uninitialized.
  136. */
  137. .AHBSRAM0 (NOLOAD):
  138. {
  139. Image$$RW_IRAM2$$Base = . ;
  140. PROVIDE(__AHB0_block_start = .);
  141. *(AHBSRAM0)
  142. Image$$RW_IRAM2$$ZI$$Limit = .;
  143. PROVIDE(__AHB0_dyn_start = .);
  144. PROVIDE(__AHB0_end = ORIGIN(USB_RAM) + LENGTH(USB_RAM));
  145. } > USB_RAM
  146. .AHBSRAM1 (NOLOAD):
  147. {
  148. Image$$RW_IRAM3$$Base = . ;
  149. PROVIDE(__AHB1_block_start = .);
  150. *(AHBSRAM1)
  151. Image$$RW_IRAM3$$ZI$$Limit = .;
  152. PROVIDE(__AHB1_dyn_start = .);
  153. PROVIDE(__AHB1_end = ORIGIN(ETH_RAM) + LENGTH(ETH_RAM));
  154. } > ETH_RAM
  155. }