My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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lpc17xx_pwm.h 13KB

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  1. /**********************************************************************
  2. * $Id$ lpc17xx_pwm.h 2011-03-31
  3. *//**
  4. * @file lpc17xx_pwm.h
  5. * @brief Contains all macro definitions and function prototypes
  6. * support for PWM firmware library on LPC17xx
  7. * @version 2.1
  8. * @date 31. Mar. 2011
  9. * @author NXP MCU SW Application Team
  10. *
  11. * Copyright(C) 2011, NXP Semiconductor
  12. * All rights reserved.
  13. *
  14. ***********************************************************************
  15. * Software that is described herein is for illustrative purposes only
  16. * which provides customers with programming information regarding the
  17. * products. This software is supplied "AS IS" without any warranties.
  18. * NXP Semiconductors assumes no responsibility or liability for the
  19. * use of the software, conveys no license or title under any patent,
  20. * copyright, or mask work right to the product. NXP Semiconductors
  21. * reserves the right to make changes in the software without
  22. * notification. NXP Semiconductors also make no representation or
  23. * warranty that such application will be suitable for the specified
  24. * use without further testing or modification.
  25. * Permission to use, copy, modify, and distribute this software and its
  26. * documentation is hereby granted, under NXP Semiconductors'
  27. * relevant copyright in the software, without fee, provided that it
  28. * is used in conjunction with NXP Semiconductors microcontrollers. This
  29. * copyright, permission, and disclaimer notice must appear in all copies of
  30. * this code.
  31. **********************************************************************/
  32. /* Peripheral group ----------------------------------------------------------- */
  33. /** @defgroup PWM PWM (Pulse Width Modulator)
  34. * @ingroup LPC1700CMSIS_FwLib_Drivers
  35. * @{
  36. */
  37. #ifndef LPC17XX_PWM_H_
  38. #define LPC17XX_PWM_H_
  39. /* Includes ------------------------------------------------------------------- */
  40. #include "LPC17xx.h"
  41. #include "lpc_types.h"
  42. #ifdef __cplusplus
  43. extern "C"
  44. {
  45. #endif
  46. /* Private Macros ------------------------------------------------------------- */
  47. /** @defgroup PWM_Private_Macros PWM Private Macros
  48. * @{
  49. */
  50. /* --------------------- BIT DEFINITIONS -------------------------------------- */
  51. /**********************************************************************
  52. * IR register definitions
  53. **********************************************************************/
  54. /** Interrupt flag for PWM match channel for 6 channel */
  55. #define PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))
  56. /** Interrupt flag for capture input */
  57. #define PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4)))
  58. /** IR register mask */
  59. #define PWM_IR_BITMASK ((uint32_t)(0x0000073F))
  60. /**********************************************************************
  61. * TCR register definitions
  62. **********************************************************************/
  63. /** TCR register mask */
  64. #define PWM_TCR_BITMASK ((uint32_t)(0x0000000B))
  65. #define PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0)) /*!< PWM Counter Enable */
  66. #define PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1)) /*!< PWM Counter Reset */
  67. #define PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3)) /*!< PWM Enable */
  68. /**********************************************************************
  69. * CTCR register definitions
  70. **********************************************************************/
  71. /** CTCR register mask */
  72. #define PWM_CTCR_BITMASK ((uint32_t)(0x0000000F))
  73. /** PWM Counter-Timer Mode */
  74. #define PWM_CTCR_MODE(n) ((uint32_t)(n&0x03))
  75. /** PWM Capture input select */
  76. #define PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2))
  77. /**********************************************************************
  78. * MCR register definitions
  79. **********************************************************************/
  80. /** MCR register mask */
  81. #define PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF))
  82. /** generate a PWM interrupt when a MATCHn occurs */
  83. #define PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))
  84. /** reset the PWM when a MATCHn occurs */
  85. #define PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))
  86. /** stop the PWM when a MATCHn occurs */
  87. #define PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))
  88. /**********************************************************************
  89. * CCR register definitions
  90. **********************************************************************/
  91. /** CCR register mask */
  92. #define PWM_CCR_BITMASK ((uint32_t)(0x0000003F))
  93. /** PCAPn is rising edge sensitive */
  94. #define PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))
  95. /** PCAPn is falling edge sensitive */
  96. #define PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))
  97. /** PWM interrupt is generated on a PCAP event */
  98. #define PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))
  99. /**********************************************************************
  100. * PCR register definitions
  101. **********************************************************************/
  102. /** PCR register mask */
  103. #define PWM_PCR_BITMASK (uint32_t)0x00007E7C
  104. /** PWM output n is a single edge controlled output */
  105. #define PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))
  106. /** enable PWM output n */
  107. #define PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))
  108. /**********************************************************************
  109. * LER register definitions
  110. **********************************************************************/
  111. /** LER register mask*/
  112. #define PWM_LER_BITMASK ((uint32_t)(0x0000007F))
  113. /** PWM MATCHn register update control */
  114. #define PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0))
  115. /* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
  116. /** Macro to determine if it is valid PWM peripheral or not */
  117. #define PARAM_PWMx(n) (((uint32_t *)n)==((uint32_t *)LPC_PWM1))
  118. /** Macro check PWM1 match channel value */
  119. #define PARAM_PWM1_MATCH_CHANNEL(n) (n<=6)
  120. /** Macro check PWM1 channel value */
  121. #define PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6))
  122. /** Macro check PWM1 edge channel mode */
  123. #define PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6))
  124. /** Macro check PWM1 capture channel mode */
  125. #define PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1))
  126. /** Macro check PWM1 interrupt status type */
  127. #define PARAM_PWM_INTSTAT(n) ((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \
  128. || (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \
  129. || (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1))
  130. /**
  131. * @}
  132. */
  133. /* Public Types --------------------------------------------------------------- */
  134. /** @defgroup PWM_Public_Types PWM Public Types
  135. * @{
  136. */
  137. /** @brief Configuration structure in PWM TIMER mode */
  138. typedef struct {
  139. uint8_t PrescaleOption; /**< Prescale option, should be:
  140. - PWM_TIMER_PRESCALE_TICKVAL: Prescale in absolute value
  141. - PWM_TIMER_PRESCALE_USVAL: Prescale in microsecond value
  142. */
  143. uint8_t Reserved[3];
  144. uint32_t PrescaleValue; /**< Prescale value, 32-bit long, should be matched
  145. with PrescaleOption
  146. */
  147. } PWM_TIMERCFG_Type;
  148. /** @brief Configuration structure in PWM COUNTER mode */
  149. typedef struct {
  150. uint8_t CounterOption; /**< Counter Option, should be:
  151. - PWM_COUNTER_RISING: Rising Edge
  152. - PWM_COUNTER_FALLING: Falling Edge
  153. - PWM_COUNTER_ANY: Both rising and falling mode
  154. */
  155. uint8_t CountInputSelect; /**< Counter input select, should be:
  156. - PWM_COUNTER_PCAP1_0: PWM Counter input selected is PCAP1.0 pin
  157. - PWM_COUNTER_PCAP1_1: PWM Counter input selected is PCAP1.1 pin
  158. */
  159. uint8_t Reserved[2];
  160. } PWM_COUNTERCFG_Type;
  161. /** @brief PWM Match channel configuration structure */
  162. typedef struct {
  163. uint8_t MatchChannel; /**< Match channel, should be in range
  164. from 0..6 */
  165. uint8_t IntOnMatch; /**< Interrupt On match, should be:
  166. - ENABLE: Enable this function.
  167. - DISABLE: Disable this function.
  168. */
  169. uint8_t StopOnMatch; /**< Stop On match, should be:
  170. - ENABLE: Enable this function.
  171. - DISABLE: Disable this function.
  172. */
  173. uint8_t ResetOnMatch; /**< Reset On match, should be:
  174. - ENABLE: Enable this function.
  175. - DISABLE: Disable this function.
  176. */
  177. } PWM_MATCHCFG_Type;
  178. /** @brief PWM Capture Input configuration structure */
  179. typedef struct {
  180. uint8_t CaptureChannel; /**< Capture channel, should be in range
  181. from 0..1 */
  182. uint8_t RisingEdge; /**< caption rising edge, should be:
  183. - ENABLE: Enable rising edge.
  184. - DISABLE: Disable this function.
  185. */
  186. uint8_t FallingEdge; /**< caption falling edge, should be:
  187. - ENABLE: Enable falling edge.
  188. - DISABLE: Disable this function.
  189. */
  190. uint8_t IntOnCaption; /**< Interrupt On caption, should be:
  191. - ENABLE: Enable interrupt function.
  192. - DISABLE: Disable this function.
  193. */
  194. } PWM_CAPTURECFG_Type;
  195. /* Timer/Counter in PWM configuration type definition -----------------------------------*/
  196. /** @brief PMW TC mode select option */
  197. typedef enum {
  198. PWM_MODE_TIMER = 0, /*!< PWM using Timer mode */
  199. PWM_MODE_COUNTER /*!< PWM using Counter mode */
  200. } PWM_TC_MODE_OPT;
  201. #define PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))
  202. /** @brief PWM Timer/Counter prescale option */
  203. typedef enum
  204. {
  205. PWM_TIMER_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */
  206. PWM_TIMER_PRESCALE_USVAL /*!< Prescale in microsecond value */
  207. } PWM_TIMER_PRESCALE_OPT;
  208. #define PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))
  209. /** @brief PWM Input Select in counter mode */
  210. typedef enum {
  211. PWM_COUNTER_PCAP1_0 = 0, /*!< PWM Counter input selected is PCAP1.0 pin */
  212. PWM_COUNTER_PCAP1_1 /*!< PWM counter input selected is CAP1.1 pin */
  213. } PWM_COUNTER_INPUTSEL_OPT;
  214. #define PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))
  215. /** @brief PWM Input Edge Option in counter mode */
  216. typedef enum {
  217. PWM_COUNTER_RISING = 1, /*!< Rising edge mode */
  218. PWM_COUNTER_FALLING = 2, /*!< Falling edge mode */
  219. PWM_COUNTER_ANY = 3 /*!< Both rising and falling mode */
  220. } PWM_COUNTER_EDGE_OPT;
  221. #define PARAM_PWM_COUNTER_EDGE(n) ((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \
  222. || (n==PWM_COUNTER_ANY))
  223. /* PWM configuration type definition ----------------------------------------------------- */
  224. /** @brief PWM operating mode options */
  225. typedef enum {
  226. PWM_CHANNEL_SINGLE_EDGE, /*!< PWM Channel Single edge mode */
  227. PWM_CHANNEL_DUAL_EDGE /*!< PWM Channel Dual edge mode */
  228. } PWM_CHANNEL_EDGE_OPT;
  229. #define PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))
  230. /** @brief PWM update type */
  231. typedef enum {
  232. PWM_MATCH_UPDATE_NOW = 0, /**< PWM Match Channel Update Now */
  233. PWM_MATCH_UPDATE_NEXT_RST /**< PWM Match Channel Update on next
  234. PWM Counter resetting */
  235. } PWM_MATCH_UPDATE_OPT;
  236. #define PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))
  237. /** @brief PWM interrupt status type definition ----------------------------------------------------- */
  238. /** @brief PWM Interrupt status type */
  239. typedef enum
  240. {
  241. PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), /**< Interrupt flag for PWM match channel 0 */
  242. PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), /**< Interrupt flag for PWM match channel 1 */
  243. PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), /**< Interrupt flag for PWM match channel 2 */
  244. PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3), /**< Interrupt flag for PWM match channel 3 */
  245. PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), /**< Interrupt flag for capture input 0 */
  246. PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), /**< Interrupt flag for capture input 1 */
  247. PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), /**< Interrupt flag for PWM match channel 4 */
  248. PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5), /**< Interrupt flag for PWM match channel 5 */
  249. PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6) /**< Interrupt flag for PWM match channel 6 */
  250. }PWM_INTSTAT_TYPE;
  251. /** @brief Match update structure */
  252. typedef struct
  253. {
  254. uint32_t Matchvalue;
  255. FlagStatus Status;
  256. }PWM_Match_T;
  257. /**
  258. * @}
  259. */
  260. /* Public Functions ----------------------------------------------------------- */
  261. /** @defgroup PWM_Public_Functions PWM Public Functions
  262. * @{
  263. */
  264. void PWM_PinConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption);
  265. IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag);
  266. void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag);
  267. void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct);
  268. void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct);
  269. void PWM_DeInit (LPC_PWM_TypeDef *PWMx);
  270. void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState);
  271. void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState);
  272. void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx);
  273. void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct);
  274. void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct);
  275. uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel);
  276. void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \
  277. uint32_t MatchValue, uint8_t UpdateType);
  278. void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption);
  279. void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState);
  280. /**
  281. * @}
  282. */
  283. #ifdef __cplusplus
  284. }
  285. #endif
  286. #endif /* LPC17XX_PWM_H_ */
  287. /**
  288. * @}
  289. */
  290. /* --------------------------------- End Of File ------------------------------ */