My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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HAL_MinSerial.cpp 5.4KB

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  1. /**
  2. * Marlin 3D Printer Firmware
  3. * Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
  4. *
  5. * Based on Sprinter and grbl.
  6. * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
  7. * Copyright (c) 2017 Victor Perez
  8. *
  9. * This program is free software: you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation, either version 3 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program. If not, see <https://www.gnu.org/licenses/>.
  21. *
  22. */
  23. #if defined(ARDUINO_ARCH_STM32) && !defined(STM32GENERIC) && !defined(MAPLE_STM32F1)
  24. #include "../../inc/MarlinConfigPre.h"
  25. #if ENABLED(POSTMORTEM_DEBUGGING)
  26. #include "../shared/HAL_MinSerial.h"
  27. #include "watchdog.h"
  28. /* Instruction Synchronization Barrier */
  29. #define isb() __asm__ __volatile__ ("isb" : : : "memory")
  30. /* Data Synchronization Barrier */
  31. #define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
  32. // Dumb mapping over the registers of a USART device on STM32
  33. struct USARTMin {
  34. volatile uint32_t SR;
  35. volatile uint32_t DR;
  36. volatile uint32_t BRR;
  37. volatile uint32_t CR1;
  38. volatile uint32_t CR2;
  39. };
  40. #if WITHIN(SERIAL_PORT, 1, 6)
  41. // Depending on the CPU, the serial port is different for USART1
  42. static const uintptr_t regsAddr[] = {
  43. TERN(STM32F1xx, 0x40013800, 0x40011000), // USART1
  44. 0x40004400, // USART2
  45. 0x40004800, // USART3
  46. 0x40004C00, // UART4_BASE
  47. 0x40005000, // UART5_BASE
  48. 0x40011400 // USART6
  49. };
  50. static USARTMin * regs = (USARTMin*)regsAddr[SERIAL_PORT - 1];
  51. #endif
  52. static void TXBegin() {
  53. #if !WITHIN(SERIAL_PORT, 1, 6)
  54. #warning "Using POSTMORTEM_DEBUGGING requires a physical U(S)ART hardware in case of severe error."
  55. #warning "Disabling the severe error reporting feature currently because the used serial port is not a HW port."
  56. #else
  57. // This is common between STM32F1/STM32F2 and STM32F4
  58. const int nvicUART[] = { /* NVIC_USART1 */ 37, /* NVIC_USART2 */ 38, /* NVIC_USART3 */ 39, /* NVIC_UART4 */ 52, /* NVIC_UART5 */ 53, /* NVIC_USART6 */ 71 };
  59. int nvicIndex = nvicUART[SERIAL_PORT - 1];
  60. struct NVICMin {
  61. volatile uint32_t ISER[32];
  62. volatile uint32_t ICER[32];
  63. };
  64. NVICMin *nvicBase = (NVICMin*)0xE000E100;
  65. SBI32(nvicBase->ICER[nvicIndex >> 5], nvicIndex & 0x1F);
  66. // We NEED memory barriers to ensure Interrupts are actually disabled!
  67. // ( https://dzone.com/articles/nvic-disabling-interrupts-on-arm-cortex-m-and-the )
  68. dsb();
  69. isb();
  70. // Example for USART1 disable: (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
  71. // Too difficult to reimplement here, let's query the STM32duino macro here
  72. #if SERIAL_PORT == 1
  73. __HAL_RCC_USART1_CLK_DISABLE();
  74. __HAL_RCC_USART1_CLK_ENABLE();
  75. #elif SERIAL_PORT == 2
  76. __HAL_RCC_USART2_CLK_DISABLE();
  77. __HAL_RCC_USART2_CLK_ENABLE();
  78. #elif SERIAL_PORT == 3
  79. __HAL_RCC_USART3_CLK_DISABLE();
  80. __HAL_RCC_USART3_CLK_ENABLE();
  81. #elif SERIAL_PORT == 4
  82. __HAL_RCC_UART4_CLK_DISABLE(); // BEWARE: UART4 and not USART4 here
  83. __HAL_RCC_UART4_CLK_ENABLE();
  84. #elif SERIAL_PORT == 5
  85. __HAL_RCC_UART5_CLK_DISABLE(); // BEWARE: UART5 and not USART5 here
  86. __HAL_RCC_UART5_CLK_ENABLE();
  87. #elif SERIAL_PORT == 6
  88. __HAL_RCC_USART6_CLK_DISABLE();
  89. __HAL_RCC_USART6_CLK_ENABLE();
  90. #endif
  91. uint32_t brr = regs->BRR;
  92. regs->CR1 = 0; // Reset the USART
  93. regs->CR2 = 0; // 1 stop bit
  94. // If we don't touch the BRR (baudrate register), we don't need to recompute.
  95. regs->BRR = brr;
  96. regs->CR1 = _BV(3) | _BV(13); // 8 bits, no parity, 1 stop bit (TE | UE)
  97. #endif
  98. }
  99. // A SW memory barrier, to ensure GCC does not overoptimize loops
  100. #define sw_barrier() __asm__ volatile("": : :"memory");
  101. static void TX(char c) {
  102. #if WITHIN(SERIAL_PORT, 1, 6)
  103. constexpr uint32_t usart_sr_txe = _BV(7);
  104. while (!(regs->SR & usart_sr_txe)) {
  105. TERN_(USE_WATCHDOG, HAL_watchdog_refresh());
  106. sw_barrier();
  107. }
  108. regs->DR = c;
  109. #else
  110. // Let's hope a mystical guru will fix this, one day by writing interrupt-free USB CDC ACM code (or, at least, by polling the registers since interrupt will be queued but will never trigger)
  111. // For now, it's completely lost to oblivion.
  112. #endif
  113. }
  114. void install_min_serial() {
  115. HAL_min_serial_init = &TXBegin;
  116. HAL_min_serial_out = &TX;
  117. }
  118. #if DISABLED(DYNAMIC_VECTORTABLE) && DISABLED(STM32F0xx) // Cortex M0 can't jump to a symbol that's too far from the current function, so we work around this in exception_arm.cpp
  119. extern "C" {
  120. __attribute__((naked)) void JumpHandler_ASM() {
  121. __asm__ __volatile__ (
  122. "b CommonHandler_ASM\n"
  123. );
  124. }
  125. void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) HardFault_Handler();
  126. void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) BusFault_Handler();
  127. void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) UsageFault_Handler();
  128. void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) MemManage_Handler();
  129. void __attribute__((naked, alias("JumpHandler_ASM"), nothrow)) NMI_Handler();
  130. }
  131. #endif
  132. #endif // POSTMORTEM_DEBUGGING
  133. #endif // ARDUINO_ARCH_STM32