My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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lpc17xx_adc.h 12KB

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  1. /**********************************************************************
  2. * $Id$ lpc17xx_adc.h 2008-07-27
  3. *//**
  4. * @file lpc17xx_adc.h
  5. * @brief Contains the NXP ABL typedefs for C standard types.
  6. * It is intended to be used in ISO C conforming development
  7. * environments and checks for this insofar as it is possible
  8. * to do so.
  9. * @version 2.0
  10. * @date 27 Jul. 2008
  11. * @author NXP MCU SW Application Team
  12. *
  13. * Copyright(C) 2008, NXP Semiconductor
  14. * All rights reserved.
  15. *
  16. ***********************************************************************
  17. * Software that is described herein is for illustrative purposes only
  18. * which provides customers with programming information regarding the
  19. * products. This software is supplied "AS IS" without any warranties.
  20. * NXP Semiconductors assumes no responsibility or liability for the
  21. * use of the software, conveys no license or title under any patent,
  22. * copyright, or mask work right to the product. NXP Semiconductors
  23. * reserves the right to make changes in the software without
  24. * notification. NXP Semiconductors also make no representation or
  25. * warranty that such application will be suitable for the specified
  26. * use without further testing or modification.
  27. * Permission to use, copy, modify, and distribute this software and its
  28. * documentation is hereby granted, under NXP Semiconductors'
  29. * relevant copyright in the software, without fee, provided that it
  30. * is used in conjunction with NXP Semiconductors microcontrollers. This
  31. * copyright, permission, and disclaimer notice must appear in all copies of
  32. * this code.
  33. **********************************************************************/
  34. /* Peripheral group ----------------------------------------------------------- */
  35. /** @defgroup ADC ADC (Analog-to-Digital Converter)
  36. * @ingroup LPC1700CMSIS_FwLib_Drivers
  37. * @{
  38. */
  39. #ifndef LPC17XX_ADC_H_
  40. #define LPC17XX_ADC_H_
  41. /* Includes ------------------------------------------------------------------- */
  42. #include "LPC17xx.h"
  43. #include "lpc_types.h"
  44. #ifdef __cplusplus
  45. extern "C"
  46. {
  47. #endif
  48. /* Private macros ------------------------------------------------------------- */
  49. /** @defgroup ADC_Private_Macros ADC Private Macros
  50. * @{
  51. */
  52. /* -------------------------- BIT DEFINITIONS ----------------------------------- */
  53. /*********************************************************************//**
  54. * Macro defines for ADC control register
  55. **********************************************************************/
  56. /** Selects which of the AD0.0:7 pins is (are) to be sampled and converted */
  57. #define ADC_CR_CH_SEL(n) ((1UL << n))
  58. /** The APB clock (PCLK) is divided by (this value plus one)
  59. * to produce the clock for the A/D */
  60. #define ADC_CR_CLKDIV(n) ((n<<8))
  61. /** Repeated conversions A/D enable bit */
  62. #define ADC_CR_BURST ((1UL<<16))
  63. /** ADC convert in power down mode */
  64. #define ADC_CR_PDN ((1UL<<21))
  65. /** Start mask bits */
  66. #define ADC_CR_START_MASK ((7UL<<24))
  67. /** Select Start Mode */
  68. #define ADC_CR_START_MODE_SEL(SEL) ((SEL<<24))
  69. /** Start conversion now */
  70. #define ADC_CR_START_NOW ((1UL<<24))
  71. /** Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0 */
  72. #define ADC_CR_START_EINT0 ((2UL<<24))
  73. /** Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1 */
  74. #define ADC_CR_START_CAP01 ((3UL<<24))
  75. /** Start conversion when the edge selected by bit 27 occurs on MAT0.1 */
  76. #define ADC_CR_START_MAT01 ((4UL<<24))
  77. /** Start conversion when the edge selected by bit 27 occurs on MAT0.3 */
  78. #define ADC_CR_START_MAT03 ((5UL<<24))
  79. /** Start conversion when the edge selected by bit 27 occurs on MAT1.0 */
  80. #define ADC_CR_START_MAT10 ((6UL<<24))
  81. /** Start conversion when the edge selected by bit 27 occurs on MAT1.1 */
  82. #define ADC_CR_START_MAT11 ((7UL<<24))
  83. /** Start conversion on a falling edge on the selected CAP/MAT signal */
  84. #define ADC_CR_EDGE ((1UL<<27))
  85. /*********************************************************************//**
  86. * Macro defines for ADC Global Data register
  87. **********************************************************************/
  88. /** When DONE is 1, this field contains result value of ADC conversion */
  89. #define ADC_GDR_RESULT(n) (((n>>4)&0xFFF))
  90. /** These bits contain the channel from which the LS bits were converted */
  91. #define ADC_GDR_CH(n) (((n>>24)&0x7))
  92. /** This bit is 1 in burst mode if the results of one or
  93. * more conversions was (were) lost */
  94. #define ADC_GDR_OVERRUN_FLAG ((1UL<<30))
  95. /** This bit is set to 1 when an A/D conversion completes */
  96. #define ADC_GDR_DONE_FLAG ((1UL<<31))
  97. /** This bits is used to mask for Channel */
  98. #define ADC_GDR_CH_MASK ((7UL<<24))
  99. /*********************************************************************//**
  100. * Macro defines for ADC Interrupt register
  101. **********************************************************************/
  102. /** These bits allow control over which A/D channels generate
  103. * interrupts for conversion completion */
  104. #define ADC_INTEN_CH(n) ((1UL<<n))
  105. /** When 1, enables the global DONE flag in ADDR to generate an interrupt */
  106. #define ADC_INTEN_GLOBAL ((1UL<<8))
  107. /*********************************************************************//**
  108. * Macro defines for ADC Data register
  109. **********************************************************************/
  110. /** When DONE is 1, this field contains result value of ADC conversion */
  111. #define ADC_DR_RESULT(n) (((n>>4)&0xFFF))
  112. /** These bits mirror the OVERRRUN status flags that appear in the
  113. * result register for each A/D channel */
  114. #define ADC_DR_OVERRUN_FLAG ((1UL<<30))
  115. /** This bit is set to 1 when an A/D conversion completes. It is cleared
  116. * when this register is read */
  117. #define ADC_DR_DONE_FLAG ((1UL<<31))
  118. /*********************************************************************//**
  119. * Macro defines for ADC Status register
  120. **********************************************************************/
  121. /** These bits mirror the DONE status flags that appear in the result
  122. * register for each A/D channel */
  123. #define ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF))
  124. /** These bits mirror the OVERRRUN status flags that appear in the
  125. * result register for each A/D channel */
  126. #define ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF))
  127. /** This bit is the A/D interrupt flag */
  128. #define ADC_STAT_INT_FLAG ((1UL<<16))
  129. /*********************************************************************//**
  130. * Macro defines for ADC Trim register
  131. **********************************************************************/
  132. /** Offset trim bits for ADC operation */
  133. #define ADC_ADCOFFS(n) (((n&0xF)<<4))
  134. /** Written to boot code*/
  135. #define ADC_TRIM(n) (((n&0xF)<<8))
  136. /* ------------------- CHECK PARAM DEFINITIONS ------------------------- */
  137. /** Check ADC parameter */
  138. #define PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC))
  139. /** Check ADC state parameter */
  140. #define PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
  141. /** Check ADC state parameter */
  142. #define PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
  143. /** Check ADC rate parameter */
  144. #define PARAM_ADC_RATE(rate) ((rate>0)&&(rate<=200000))
  145. /** Check ADC channel selection parameter */
  146. #define PARAM_ADC_CHANNEL_SELECTION(SEL) ((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\
  147. ||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\
  148. ||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\
  149. ||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7))
  150. /** Check ADC start option parameter */
  151. #define PARAM_ADC_START_OPT(OPT) ((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\
  152. ||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\
  153. ||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\
  154. ||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11))
  155. /** Check ADC interrupt type parameter */
  156. #define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
  157. ||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
  158. ||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
  159. ||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
  160. ||(OPT == ADC_ADGINTEN))
  161. /**
  162. * @}
  163. */
  164. /* Public Types --------------------------------------------------------------- */
  165. /** @defgroup ADC_Public_Types ADC Public Types
  166. * @{
  167. */
  168. /*********************************************************************//**
  169. * @brief ADC enumeration
  170. **********************************************************************/
  171. /** @brief Channel Selection */
  172. typedef enum
  173. {
  174. ADC_CHANNEL_0 = 0, /*!< Channel 0 */
  175. ADC_CHANNEL_1, /*!< Channel 1 */
  176. ADC_CHANNEL_2, /*!< Channel 2 */
  177. ADC_CHANNEL_3, /*!< Channel 3 */
  178. ADC_CHANNEL_4, /*!< Channel 4 */
  179. ADC_CHANNEL_5, /*!< Channel 5 */
  180. ADC_CHANNEL_6, /*!< Channel 6 */
  181. ADC_CHANNEL_7 /*!< Channel 7 */
  182. }ADC_CHANNEL_SELECTION;
  183. /** @brief Type of start option */
  184. typedef enum
  185. {
  186. ADC_START_CONTINUOUS =0, /*!< Continuous mode */
  187. ADC_START_NOW, /*!< Start conversion now */
  188. ADC_START_ON_EINT0, /*!< Start conversion when the edge selected
  189. * by bit 27 occurs on P2.10/EINT0 */
  190. ADC_START_ON_CAP01, /*!< Start conversion when the edge selected
  191. * by bit 27 occurs on P1.27/CAP0.1 */
  192. ADC_START_ON_MAT01, /*!< Start conversion when the edge selected
  193. * by bit 27 occurs on MAT0.1 */
  194. ADC_START_ON_MAT03, /*!< Start conversion when the edge selected
  195. * by bit 27 occurs on MAT0.3 */
  196. ADC_START_ON_MAT10, /*!< Start conversion when the edge selected
  197. * by bit 27 occurs on MAT1.0 */
  198. ADC_START_ON_MAT11 /*!< Start conversion when the edge selected
  199. * by bit 27 occurs on MAT1.1 */
  200. } ADC_START_OPT;
  201. /** @brief Type of edge when start conversion on the selected CAP/MAT signal */
  202. typedef enum
  203. {
  204. ADC_START_ON_RISING = 0, /*!< Start conversion on a rising edge
  205. *on the selected CAP/MAT signal */
  206. ADC_START_ON_FALLING /*!< Start conversion on a falling edge
  207. *on the selected CAP/MAT signal */
  208. } ADC_START_ON_EDGE_OPT;
  209. /** @brief* ADC type interrupt enum */
  210. typedef enum
  211. {
  212. ADC_ADINTEN0 = 0, /*!< Interrupt channel 0 */
  213. ADC_ADINTEN1, /*!< Interrupt channel 1 */
  214. ADC_ADINTEN2, /*!< Interrupt channel 2 */
  215. ADC_ADINTEN3, /*!< Interrupt channel 3 */
  216. ADC_ADINTEN4, /*!< Interrupt channel 4 */
  217. ADC_ADINTEN5, /*!< Interrupt channel 5 */
  218. ADC_ADINTEN6, /*!< Interrupt channel 6 */
  219. ADC_ADINTEN7, /*!< Interrupt channel 7 */
  220. ADC_ADGINTEN /*!< Individual channel/global flag done generate an interrupt */
  221. }ADC_TYPE_INT_OPT;
  222. /** @brief ADC Data status */
  223. typedef enum
  224. {
  225. ADC_DATA_BURST = 0, /*Burst bit*/
  226. ADC_DATA_DONE /*Done bit*/
  227. }ADC_DATA_STATUS;
  228. /**
  229. * @}
  230. */
  231. /* Public Functions ----------------------------------------------------------- */
  232. /** @defgroup ADC_Public_Functions ADC Public Functions
  233. * @{
  234. */
  235. /* Init/DeInit ADC peripheral ----------------*/
  236. void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate);
  237. void ADC_DeInit(LPC_ADC_TypeDef *ADCx);
  238. /* Enable/Disable ADC functions --------------*/
  239. void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
  240. void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
  241. void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode);
  242. void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState);
  243. /* Configure ADC functions -------------------*/
  244. void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption);
  245. void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState);
  246. /* Get ADC information functions -------------------*/
  247. uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel);
  248. FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType);
  249. uint32_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx);
  250. FlagStatus ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType);
  251. /**
  252. * @}
  253. */
  254. #ifdef __cplusplus
  255. }
  256. #endif
  257. #endif /* LPC17XX_ADC_H_ */
  258. /**
  259. * @}
  260. */
  261. /* --------------------------------- End Of File ------------------------------ */