My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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mmc_ssp.c 22KB

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  1. /*------------------------------------------------------------------------*/
  2. /* LPCXpresso176x: MMCv3/SDv1/SDv2 (SPI mode) control module */
  3. /*------------------------------------------------------------------------*/
  4. /*
  5. / Copyright (C) 2015, ChaN, all right reserved.
  6. /
  7. / * This software is a free software and there is NO WARRANTY.
  8. / * No restriction on use. You can use, modify and redistribute it for
  9. / personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
  10. / * Redistributions of source code must retain the above copyright notice.
  11. /
  12. /-------------------------------------------------------------------------*/
  13. #include "lpc17xx_ssp.h"
  14. #include "lpc17xx_clkpwr.h"
  15. #include "LPC176x.h"
  16. #define SSP_CH 1 /* SSP channel to use (0:SSP0, 1:SSP1) */
  17. #define SCLK_FAST 25000000UL /* SCLK frequency under normal operation [Hz] */
  18. #define SCLK_SLOW 400000UL /* SCLK frequency under initialization [Hz] */
  19. //#define MMC_CD (!(FIO2PIN1 & _BV(1))) /* Card detect (yes:true, no:false, default:true) */
  20. #define MMC_WP 0 /* Write protected (yes:true, no:false, default:false) */
  21. #if SSP_CH == 0
  22. #define SSPxDR SSP0DR
  23. #define SSPxSR SSP0SR
  24. #define SSPxCR0 SSP0CR0
  25. #define SSPxCR1 SSP0CR1
  26. #define SSPxCPSR SSP0CPSR
  27. #define CS_LOW() {FIO0CLR2 = _BV(0);} /* Set P0.16 low */
  28. #define CS_HIGH() {FIO0SET2 = _BV(0);} /* Set P0.16 high */
  29. #define PCSSPx PCSSP0
  30. #define PCLKSSPx PCLK_SSP0
  31. #define ATTACH_SSP() {\
  32. __set_PINSEL(0, 15, 2); /* SCK0 */\
  33. __set_PINSEL(0, 17, 2); /* MISO0 */\
  34. __set_PINSEL(0, 18, 2); /* MOSI0 */\
  35. FIO0DIR |= _BV(16); /* CS# (P0.16) */\
  36. }
  37. #elif SSP_CH == 1
  38. #define SSPxDR SSP1DR
  39. #define SSPxSR SSP1SR
  40. #define SSPxCR0 SSP1CR0
  41. #define SSPxCR1 SSP1CR1
  42. #define SSPxCPSR SSP1CPSR
  43. #define CS_LOW() {FIO0CLR0 = _BV(6);} /* Set P0.6 low */
  44. #define CS_HIGH() {FIO0SET0 = _BV(6);} /* Set P0.6 high */
  45. #define PCSSPx PCSSP1
  46. #define PCLKSSPx PCLK_SSP1
  47. #define ATTACH_SSP() {\
  48. __set_PINSEL(0, 7, 2); /* SCK1 */\
  49. __set_PINSEL(0, 8, 2); /* MISO1 */\
  50. __set_PINSEL(0, 9, 2); /* MOSI1 */\
  51. FIO0DIR |= _BV(6); /* CS# (P0.6) */\
  52. }
  53. #endif
  54. #define PCLKDIV_SSP PCLKDIV_2
  55. static void set_spi_clock(uint32_t target_clock)
  56. {
  57. uint32_t prescale, cr0_div, cmp_clk, ssp_clk;
  58. /* The SSP clock is derived from the (main system oscillator / 2),
  59. so compute the best divider from that clock */
  60. #if SSP_CH == 0
  61. ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP0);
  62. #elif SSP_CH == 1
  63. ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP1);
  64. #endif
  65. /* Find closest divider to get at or under the target frequency.
  66. Use smallest prescale possible and rely on the divider to get
  67. the closest target frequency */
  68. cr0_div = 0;
  69. cmp_clk = 0xFFFFFFFF;
  70. prescale = 2;
  71. while (cmp_clk > target_clock)
  72. {
  73. cmp_clk = ssp_clk / ((cr0_div + 1) * prescale);
  74. if (cmp_clk > target_clock)
  75. {
  76. cr0_div++;
  77. if (cr0_div > 0xFF)
  78. {
  79. cr0_div = 0;
  80. prescale += 2;
  81. }
  82. }
  83. }
  84. /* Write computed prescaler and divider back to register */
  85. SSPxCR0 &= (~SSP_CR0_SCR(0xFF)) & SSP_CR0_BITMASK;
  86. SSPxCR0 |= (SSP_CR0_SCR(cr0_div)) & SSP_CR0_BITMASK;
  87. SSPxCPSR = prescale & SSP_CPSR_BITMASK;
  88. }
  89. #define FCLK_FAST() set_spi_clock(SCLK_FAST)
  90. #define FCLK_SLOW() set_spi_clock(SCLK_SLOW)
  91. /*--------------------------------------------------------------------------
  92. Module Private Functions
  93. ---------------------------------------------------------------------------*/
  94. #include "diskio.h"
  95. /* MMC/SD command */
  96. #define CMD0 (0) /* GO_IDLE_STATE */
  97. #define CMD1 (1) /* SEND_OP_COND (MMC) */
  98. #define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
  99. #define CMD8 (8) /* SEND_IF_COND */
  100. #define CMD9 (9) /* SEND_CSD */
  101. #define CMD10 (10) /* SEND_CID */
  102. #define CMD12 (12) /* STOP_TRANSMISSION */
  103. #define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
  104. #define CMD16 (16) /* SET_BLOCKLEN */
  105. #define CMD17 (17) /* READ_SINGLE_BLOCK */
  106. #define CMD18 (18) /* READ_MULTIPLE_BLOCK */
  107. #define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
  108. #define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
  109. #define CMD24 (24) /* WRITE_BLOCK */
  110. #define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
  111. #define CMD32 (32) /* ERASE_ER_BLK_START */
  112. #define CMD33 (33) /* ERASE_ER_BLK_END */
  113. #define CMD38 (38) /* ERASE */
  114. #define CMD48 (48) /* READ_EXTR_SINGLE */
  115. #define CMD49 (49) /* WRITE_EXTR_SINGLE */
  116. #define CMD55 (55) /* APP_CMD */
  117. #define CMD58 (58) /* READ_OCR */
  118. static volatile
  119. DSTATUS Stat = STA_NOINIT; /* Physical drive status */
  120. static volatile
  121. UINT Timer1, Timer2; /* 1kHz decrement timer stopped at zero (disk_timerproc()) */
  122. static
  123. BYTE CardType; /* Card type flags */
  124. /*-----------------------------------------------------------------------*/
  125. /* Send/Receive data to the MMC (Platform dependent) */
  126. /*-----------------------------------------------------------------------*/
  127. /* Exchange a byte */
  128. static
  129. BYTE xchg_spi (
  130. BYTE dat /* Data to send */
  131. )
  132. {
  133. SSPxDR = dat;
  134. while (SSPxSR & 0x10) ;
  135. return SSPxDR;
  136. }
  137. /* Receive multiple byte */
  138. static
  139. void rcvr_spi_multi (
  140. BYTE *buff, /* Pointer to data buffer */
  141. UINT btr /* Number of bytes to receive (16, 64 or 512) */
  142. )
  143. {
  144. UINT n;
  145. WORD d;
  146. SSPxCR0 |= 0x000F; /* Select 16-bit mode */
  147. for (n = 0; n < 8; n++) /* Push 8 frames into pipeline */
  148. SSPxDR = 0xFFFF;
  149. btr -= 16;
  150. while (btr >= 2) { /* Receive the data block into buffer */
  151. btr -= 2;
  152. while (!(SSPxSR & _BV(2))) ; /* Wait for any data in receive FIFO */
  153. d = SSPxDR;
  154. SSPxDR = 0xFFFF;
  155. *buff++ = d >> 8;
  156. *buff++ = d;
  157. }
  158. for (n = 0; n < 8; n++) { /* Pop remaining frames from pipeline */
  159. while (!(SSPxSR & _BV(2))) ;
  160. d = SSPxDR;
  161. *buff++ = d >> 8;
  162. *buff++ = d;
  163. }
  164. SSPxCR0 &= 0xFFF7; /* Select 8-bit mode */
  165. }
  166. #if _DISKIO_WRITE
  167. /* Send multiple byte */
  168. static
  169. void xmit_spi_multi (
  170. const BYTE *buff, /* Pointer to the data */
  171. UINT btx /* Number of bytes to send (multiple of 16) */
  172. )
  173. {
  174. UINT n;
  175. WORD d;
  176. SSPxCR0 |= 0x000F; /* Select 16-bit mode */
  177. for (n = 0; n < 8; n++) { /* Push 8 frames into pipeline */
  178. d = *buff++;
  179. d = d << 8 | *buff++;
  180. SSPxDR = d;
  181. }
  182. btx -= 16;
  183. while (btx >= 2) { /* Transmit data block */
  184. btx -= 2;
  185. d = *buff++;
  186. d = d << 8 | *buff++;
  187. while (!(SSPxSR & _BV(2))) ; /* Wait for any data in receive FIFO */
  188. SSPxDR; SSPxDR = d;
  189. }
  190. for (n = 0; n < 8; n++) { /* Flush pipeline */
  191. while (!(SSPxSR & _BV(2))) ;
  192. SSPxDR;
  193. }
  194. SSPxCR0 &= 0xFFF7; /* Select 8-bit mode */
  195. }
  196. #endif
  197. /*-----------------------------------------------------------------------*/
  198. /* Wait for card ready */
  199. /*-----------------------------------------------------------------------*/
  200. static
  201. int wait_ready ( /* 1:Ready, 0:Timeout */
  202. UINT wt /* Timeout [ms] */
  203. )
  204. {
  205. BYTE d;
  206. Timer2 = wt;
  207. do {
  208. d = xchg_spi(0xFF);
  209. /* This loop takes a time. Insert rot_rdq() here for multitask envilonment. */
  210. } while (d != 0xFF && Timer2); /* Wait for card goes ready or timeout */
  211. return (d == 0xFF) ? 1 : 0;
  212. }
  213. /*-----------------------------------------------------------------------*/
  214. /* Deselect card and release SPI */
  215. /*-----------------------------------------------------------------------*/
  216. static
  217. void deselect (void)
  218. {
  219. CS_HIGH(); /* CS = H */
  220. xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
  221. }
  222. /*-----------------------------------------------------------------------*/
  223. /* Select card and wait for ready */
  224. /*-----------------------------------------------------------------------*/
  225. static
  226. int select (void) /* 1:OK, 0:Timeout */
  227. {
  228. CS_LOW(); /* CS = L */
  229. xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
  230. if (wait_ready(500)) return 1; /* Leading busy check: Wait for card ready */
  231. deselect(); /* Timeout */
  232. return 0;
  233. }
  234. /*-----------------------------------------------------------------------*/
  235. /* Control SPI module (Platform dependent) */
  236. /*-----------------------------------------------------------------------*/
  237. static
  238. void power_on (void) /* Enable SSP module and attach it to I/O pads */
  239. {
  240. __set_PCONP(PCSSPx, 1); /* Enable SSP module */
  241. __set_PCLKSEL(PCLKSSPx, PCLKDIV_SSP); /* Select PCLK frequency for SSP */
  242. SSPxCR0 = 0x0007; /* Set mode: SPI mode 0, 8-bit */
  243. SSPxCR1 = 0x2; /* Enable SSP with Master */
  244. ATTACH_SSP(); /* Attach SSP module to I/O pads */
  245. CS_HIGH(); /* Set CS# high */
  246. for (Timer1 = 10; Timer1; ) ; /* 10ms */
  247. }
  248. static
  249. void power_off (void) /* Disable SPI function */
  250. {
  251. select(); /* Wait for card ready */
  252. deselect();
  253. }
  254. /*-----------------------------------------------------------------------*/
  255. /* Receive a data packet from the MMC */
  256. /*-----------------------------------------------------------------------*/
  257. static
  258. int rcvr_datablock ( /* 1:OK, 0:Error */
  259. BYTE *buff, /* Data buffer */
  260. UINT btr /* Data block length (byte) */
  261. )
  262. {
  263. BYTE token;
  264. Timer1 = 200;
  265. do { /* Wait for DataStart token in timeout of 200ms */
  266. token = xchg_spi(0xFF);
  267. /* This loop will take a time. Insert rot_rdq() here for multitask envilonment. */
  268. } while ((token == 0xFF) && Timer1);
  269. if(token != 0xFE) return 0; /* Function fails if invalid DataStart token or timeout */
  270. rcvr_spi_multi(buff, btr); /* Store trailing data to the buffer */
  271. xchg_spi(0xFF); xchg_spi(0xFF); /* Discard CRC */
  272. return 1; /* Function succeeded */
  273. }
  274. /*-----------------------------------------------------------------------*/
  275. /* Send a data packet to the MMC */
  276. /*-----------------------------------------------------------------------*/
  277. #if _DISKIO_WRITE
  278. static
  279. int xmit_datablock ( /* 1:OK, 0:Failed */
  280. const BYTE *buff, /* Ponter to 512 byte data to be sent */
  281. BYTE token /* Token */
  282. )
  283. {
  284. BYTE resp;
  285. if (!wait_ready(500)) return 0; /* Leading busy check: Wait for card ready to accept data block */
  286. xchg_spi(token); /* Send token */
  287. if (token == 0xFD) return 1; /* Do not send data if token is StopTran */
  288. xmit_spi_multi(buff, 512); /* Data */
  289. xchg_spi(0xFF); xchg_spi(0xFF); /* Dummy CRC */
  290. resp = xchg_spi(0xFF); /* Receive data resp */
  291. return (resp & 0x1F) == 0x05 ? 1 : 0; /* Data was accepted or not */
  292. /* Busy check is done at next transmission */
  293. }
  294. #endif
  295. /*-----------------------------------------------------------------------*/
  296. /* Send a command packet to the MMC */
  297. /*-----------------------------------------------------------------------*/
  298. static
  299. BYTE send_cmd ( /* Return value: R1 resp (bit7==1:Failed to send) */
  300. BYTE cmd, /* Command index */
  301. DWORD arg /* Argument */
  302. )
  303. {
  304. BYTE n, res;
  305. if (cmd & 0x80) { /* Send a CMD55 prior to ACMD<n> */
  306. cmd &= 0x7F;
  307. res = send_cmd(CMD55, 0);
  308. if (res > 1) return res;
  309. }
  310. /* Select the card and wait for ready except to stop multiple block read */
  311. if (cmd != CMD12) {
  312. deselect();
  313. if (!select()) return 0xFF;
  314. }
  315. /* Send command packet */
  316. xchg_spi(0x40 | cmd); /* Start + command index */
  317. xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
  318. xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
  319. xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
  320. xchg_spi((BYTE)arg); /* Argument[7..0] */
  321. n = 0x01; /* Dummy CRC + Stop */
  322. if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) */
  323. if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) */
  324. xchg_spi(n);
  325. /* Receive command resp */
  326. if (cmd == CMD12) xchg_spi(0xFF); /* Diacard following one byte when CMD12 */
  327. n = 10; /* Wait for response (10 bytes max) */
  328. do
  329. res = xchg_spi(0xFF);
  330. while ((res & 0x80) && --n);
  331. return res; /* Return received response */
  332. }
  333. /*--------------------------------------------------------------------------
  334. Public Functions
  335. ---------------------------------------------------------------------------*/
  336. /*-----------------------------------------------------------------------*/
  337. /* Initialize disk drive */
  338. /*-----------------------------------------------------------------------*/
  339. DSTATUS disk_initialize (
  340. BYTE drv /* Physical drive number (0) */
  341. )
  342. {
  343. BYTE n, cmd, ty, ocr[4];
  344. if (drv) return STA_NOINIT; /* Supports only drive 0 */
  345. power_on(); /* Initialize SPI */
  346. if (Stat & STA_NODISK) return Stat; /* Is a card existing in the soket? */
  347. FCLK_SLOW();
  348. for (n = 10; n; n--) xchg_spi(0xFF); /* Send 80 dummy clocks */
  349. ty = 0;
  350. if (send_cmd(CMD0, 0) == 1) { /* Put the card SPI state */
  351. Timer1 = 1000; /* Initialization timeout = 1 sec */
  352. if (send_cmd(CMD8, 0x1AA) == 1) { /* Is the catd SDv2? */
  353. for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get 32 bit return value of R7 resp */
  354. if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* Does the card support 2.7-3.6V? */
  355. while (Timer1 && send_cmd(ACMD41, 1UL << 30)) ; /* Wait for end of initialization with ACMD41(HCS) */
  356. if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
  357. for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
  358. ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* Check if the card is SDv2 */
  359. }
  360. }
  361. } else { /* Not an SDv2 card */
  362. if (send_cmd(ACMD41, 0) <= 1) { /* SDv1 or MMCv3? */
  363. ty = CT_SD1; cmd = ACMD41; /* SDv1 (ACMD41(0)) */
  364. } else {
  365. ty = CT_MMC; cmd = CMD1; /* MMCv3 (CMD1(0)) */
  366. }
  367. while (Timer1 && send_cmd(cmd, 0)) ; /* Wait for the card leaves idle state */
  368. if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set block length: 512 */
  369. ty = 0;
  370. }
  371. }
  372. CardType = ty; /* Card type */
  373. deselect();
  374. if (ty) { /* OK */
  375. FCLK_FAST(); /* Set fast clock */
  376. Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */
  377. } else { /* Failed */
  378. power_off();
  379. Stat = STA_NOINIT;
  380. }
  381. return Stat;
  382. }
  383. /*-----------------------------------------------------------------------*/
  384. /* Get disk status */
  385. /*-----------------------------------------------------------------------*/
  386. DSTATUS disk_status (
  387. BYTE drv /* Physical drive number (0) */
  388. )
  389. {
  390. if (drv) return STA_NOINIT; /* Supports only drive 0 */
  391. return Stat; /* Return disk status */
  392. }
  393. /*-----------------------------------------------------------------------*/
  394. /* Read sector(s) */
  395. /*-----------------------------------------------------------------------*/
  396. DRESULT disk_read (
  397. BYTE drv, /* Physical drive number (0) */
  398. BYTE *buff, /* Pointer to the data buffer to store read data */
  399. DWORD sector, /* Start sector number (LBA) */
  400. UINT count /* Number of sectors to read (1..128) */
  401. )
  402. {
  403. BYTE cmd;
  404. if (drv || !count) return RES_PARERR; /* Check parameter */
  405. if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
  406. if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ot BA conversion (byte addressing cards) */
  407. cmd = count > 1 ? CMD18 : CMD17; /* READ_MULTIPLE_BLOCK : READ_SINGLE_BLOCK */
  408. if (send_cmd(cmd, sector) == 0) {
  409. do {
  410. if (!rcvr_datablock(buff, 512)) break;
  411. buff += 512;
  412. } while (--count);
  413. if (cmd == CMD18) send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
  414. }
  415. deselect();
  416. return count ? RES_ERROR : RES_OK; /* Return result */
  417. }
  418. /*-----------------------------------------------------------------------*/
  419. /* Write sector(s) */
  420. /*-----------------------------------------------------------------------*/
  421. #if _DISKIO_WRITE
  422. DRESULT disk_write (
  423. BYTE drv, /* Physical drive number (0) */
  424. const BYTE *buff, /* Ponter to the data to write */
  425. DWORD sector, /* Start sector number (LBA) */
  426. UINT count /* Number of sectors to write (1..128) */
  427. )
  428. {
  429. if (drv || !count) return RES_PARERR; /* Check parameter */
  430. if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check drive status */
  431. if (Stat & STA_PROTECT) return RES_WRPRT; /* Check write protect */
  432. if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ==> BA conversion (byte addressing cards) */
  433. if (count == 1) { /* Single sector write */
  434. if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
  435. && xmit_datablock(buff, 0xFE)) {
  436. count = 0;
  437. }
  438. }
  439. else { /* Multiple sector write */
  440. if (CardType & CT_SDC) send_cmd(ACMD23, count); /* Predefine number of sectors */
  441. if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
  442. do {
  443. if (!xmit_datablock(buff, 0xFC)) break;
  444. buff += 512;
  445. } while (--count);
  446. if (!xmit_datablock(0, 0xFD)) count = 1; /* STOP_TRAN token */
  447. }
  448. }
  449. deselect();
  450. return count ? RES_ERROR : RES_OK; /* Return result */
  451. }
  452. #endif
  453. /*-----------------------------------------------------------------------*/
  454. /* Miscellaneous drive controls other than data read/write */
  455. /*-----------------------------------------------------------------------*/
  456. #if _DISKIO_IOCTL
  457. DRESULT disk_ioctl (
  458. BYTE drv, /* Physical drive number (0) */
  459. BYTE cmd, /* Control command code */
  460. void *buff /* Pointer to the conrtol data */
  461. )
  462. {
  463. DRESULT res;
  464. BYTE n, csd[16], *ptr = buff;
  465. DWORD *dp, st, ed, csize;
  466. #if _DISKIO_ISDIO
  467. SDIO_CMD *sdio = buff;
  468. BYTE rc, *buf;
  469. UINT dc;
  470. #endif
  471. if (drv) return RES_PARERR; /* Check parameter */
  472. if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
  473. res = RES_ERROR;
  474. switch (cmd) {
  475. case CTRL_SYNC: /* Wait for end of internal write process of the drive */
  476. if (select()) res = RES_OK;
  477. break;
  478. case GET_SECTOR_COUNT: /* Get drive capacity in unit of sector (DWORD) */
  479. if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
  480. if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
  481. csize = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
  482. *(DWORD*)buff = csize << 10;
  483. } else { /* SDC ver 1.XX or MMC ver 3 */
  484. n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
  485. csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
  486. *(DWORD*)buff = csize << (n - 9);
  487. }
  488. res = RES_OK;
  489. }
  490. break;
  491. case GET_BLOCK_SIZE: /* Get erase block size in unit of sector (DWORD) */
  492. if (CardType & CT_SD2) { /* SDC ver 2.00 */
  493. if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
  494. xchg_spi(0xFF);
  495. if (rcvr_datablock(csd, 16)) { /* Read partial block */
  496. for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
  497. *(DWORD*)buff = 16UL << (csd[10] >> 4);
  498. res = RES_OK;
  499. }
  500. }
  501. } else { /* SDC ver 1.XX or MMC */
  502. if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
  503. if (CardType & CT_SD1) { /* SDC ver 1.XX */
  504. *(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
  505. } else { /* MMC */
  506. *(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
  507. }
  508. res = RES_OK;
  509. }
  510. }
  511. break;
  512. case CTRL_TRIM: /* Erase a block of sectors (used when _USE_TRIM in ffconf.h is 1) */
  513. if (!(CardType & CT_SDC)) break; /* Check if the card is SDC */
  514. if (disk_ioctl(drv, MMC_GET_CSD, csd)) break; /* Get CSD */
  515. if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; /* Check if sector erase can be applied to the card */
  516. dp = buff; st = dp[0]; ed = dp[1]; /* Load sector block */
  517. if (!(CardType & CT_BLOCK)) {
  518. st *= 512; ed *= 512;
  519. }
  520. if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000)) { /* Erase sector block */
  521. res = RES_OK; /* FatFs does not check result of this command */
  522. }
  523. break;
  524. /* Following commands are never used by FatFs module */
  525. case MMC_GET_TYPE: /* Get MMC/SDC type (BYTE) */
  526. *ptr = CardType;
  527. res = RES_OK;
  528. break;
  529. case MMC_GET_CSD: /* Read CSD (16 bytes) */
  530. if (send_cmd(CMD9, 0) == 0 && rcvr_datablock(ptr, 16)) { /* READ_CSD */
  531. res = RES_OK;
  532. }
  533. break;
  534. case MMC_GET_CID: /* Read CID (16 bytes) */
  535. if (send_cmd(CMD10, 0) == 0 && rcvr_datablock(ptr, 16)) { /* READ_CID */
  536. res = RES_OK;
  537. }
  538. break;
  539. case MMC_GET_OCR: /* Read OCR (4 bytes) */
  540. if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
  541. for (n = 4; n; n--) *ptr++ = xchg_spi(0xFF);
  542. res = RES_OK;
  543. }
  544. break;
  545. case MMC_GET_SDSTAT: /* Read SD status (64 bytes) */
  546. if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
  547. xchg_spi(0xFF);
  548. if (rcvr_datablock(ptr, 64)) res = RES_OK;
  549. }
  550. break;
  551. #if _DISKIO_ISDIO
  552. case ISDIO_READ:
  553. sdio = buff;
  554. if (send_cmd(CMD48, 0x80000000 | sdio->func << 28 | sdio->addr << 9 | ((sdio->ndata - 1) & 0x1FF)) == 0) {
  555. for (Timer1 = 1000; (rc = xchg_spi(0xFF)) == 0xFF && Timer1; ) ;
  556. if (rc == 0xFE) {
  557. for (buf = sdio->data, dc = sdio->ndata; dc; dc--) *buf++ = xchg_spi(0xFF);
  558. for (dc = 514 - sdio->ndata; dc; dc--) xchg_spi(0xFF);
  559. res = RES_OK;
  560. }
  561. }
  562. break;
  563. case ISDIO_WRITE:
  564. sdio = buff;
  565. if (send_cmd(CMD49, 0x80000000 | sdio->func << 28 | sdio->addr << 9 | ((sdio->ndata - 1) & 0x1FF)) == 0) {
  566. xchg_spi(0xFF); xchg_spi(0xFE);
  567. for (buf = sdio->data, dc = sdio->ndata; dc; dc--) xchg_spi(*buf++);
  568. for (dc = 514 - sdio->ndata; dc; dc--) xchg_spi(0xFF);
  569. if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
  570. }
  571. break;
  572. case ISDIO_MRITE:
  573. sdio = buff;
  574. if (send_cmd(CMD49, 0x84000000 | sdio->func << 28 | sdio->addr << 9 | sdio->ndata >> 8) == 0) {
  575. xchg_spi(0xFF); xchg_spi(0xFE);
  576. xchg_spi(sdio->ndata);
  577. for (dc = 513; dc; dc--) xchg_spi(0xFF);
  578. if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
  579. }
  580. break;
  581. #endif
  582. default:
  583. res = RES_PARERR;
  584. }
  585. deselect();
  586. return res;
  587. }
  588. #endif
  589. /*-----------------------------------------------------------------------*/
  590. /* Device timer function */
  591. /*-----------------------------------------------------------------------*/
  592. /* This function must be called from timer interrupt routine in period
  593. / of 1 ms to generate card control timing.
  594. */
  595. void disk_timerproc (void)
  596. {
  597. WORD n;
  598. BYTE s;
  599. n = Timer1; /* 1kHz decrement timer stopped at 0 */
  600. if (n) Timer1 = --n;
  601. n = Timer2;
  602. if (n) Timer2 = --n;
  603. s = Stat;
  604. if (MMC_WP) { /* Write protected */
  605. s |= STA_PROTECT;
  606. } else { /* Write enabled */
  607. s &= ~STA_PROTECT;
  608. }
  609. //if (MMC_CD) { /* Card is in socket */
  610. s &= ~STA_NODISK;
  611. //} else { /* Socket empty */
  612. // s |= (STA_NODISK | STA_NOINIT);
  613. //}
  614. Stat = s;
  615. }