My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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mmc_ssp.c 21KB

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  1. /*------------------------------------------------------------------------*/
  2. /* LPCXpresso176x: MMCv3/SDv1/SDv2 (SPI mode) control module */
  3. /*------------------------------------------------------------------------*/
  4. /*
  5. / Copyright (C) 2015, ChaN, all right reserved.
  6. /
  7. / * This software is a free software and there is NO WARRANTY.
  8. / * No restriction on use. You can use, modify and redistribute it for
  9. / personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
  10. / * Redistributions of source code must retain the above copyright notice.
  11. /
  12. /-------------------------------------------------------------------------*/
  13. #define SSP_CH 1 /* SSP channel to use (0:SSP0, 1:SSP1) */
  14. #define CCLK 100000000UL /* cclk frequency [Hz] */
  15. #define PCLK_SSP 50000000UL /* PCLK frequency to be supplied for SSP [Hz] */
  16. #define SCLK_FAST 25000000UL /* SCLK frequency under normal operation [Hz] */
  17. #define SCLK_SLOW 400000UL /* SCLK frequency under initialization [Hz] */
  18. //#define MMC_CD (!(FIO2PIN1 & _BV(1))) /* Card detect (yes:true, no:false, default:true) */
  19. #define MMC_WP 0 /* Write protected (yes:true, no:false, default:false) */
  20. #if SSP_CH == 0
  21. #define SSPxDR SSP0DR
  22. #define SSPxSR SSP0SR
  23. #define SSPxCR0 SSP0CR0
  24. #define SSPxCR1 SSP0CR1
  25. #define SSPxCPSR SSP0CPSR
  26. #define CS_LOW() {FIO0CLR2 = _BV(0);} /* Set P0.16 low */
  27. #define CS_HIGH() {FIO0SET2 = _BV(0);} /* Set P0.16 high */
  28. #define PCSSPx PCSSP0
  29. #define PCLKSSPx PCLK_SSP0
  30. #define ATTACH_SSP() {\
  31. __set_PINSEL(0, 15, 2); /* SCK0 */\
  32. __set_PINSEL(0, 17, 2); /* MISO0 */\
  33. __set_PINSEL(0, 18, 2); /* MOSI0 */\
  34. FIO0DIR |= _BV(16); /* CS# (P0.16) */\
  35. }
  36. #elif SSP_CH == 1
  37. #define SSPxDR SSP1DR
  38. #define SSPxSR SSP1SR
  39. #define SSPxCR0 SSP1CR0
  40. #define SSPxCR1 SSP1CR1
  41. #define SSPxCPSR SSP1CPSR
  42. #define CS_LOW() {FIO0CLR0 = _BV(6);} /* Set P0.6 low */
  43. #define CS_HIGH() {FIO0SET0 = _BV(6);} /* Set P0.6 high */
  44. #define PCSSPx PCSSP1
  45. #define PCLKSSPx PCLK_SSP1
  46. #define ATTACH_SSP() {\
  47. __set_PINSEL(0, 7, 2); /* SCK1 */\
  48. __set_PINSEL(0, 8, 2); /* MISO1 */\
  49. __set_PINSEL(0, 9, 2); /* MOSI1 */\
  50. FIO0DIR |= _BV(6); /* CS# (P0.6) */\
  51. }
  52. #endif
  53. #if PCLK_SSP * 1 == CCLK
  54. #define PCLKDIV_SSP PCLKDIV_1
  55. #elif PCLK_SSP * 2 == CCLK
  56. #define PCLKDIV_SSP PCLKDIV_2
  57. #elif PCLK_SSP * 4 == CCLK
  58. #define PCLKDIV_SSP PCLKDIV_4
  59. #elif PCLK_SSP * 8 == CCLK
  60. #define PCLKDIV_SSP PCLKDIV_8
  61. #else
  62. #error Invalid CCLK:PCLK_SSP combination.
  63. #endif
  64. #define FCLK_FAST() { SSPxCR0 = (SSPxCR0 & 0x00FF) | ((PCLK_SSP / 2 / SCLK_FAST) - 1) << 8; }
  65. #define FCLK_SLOW() { SSPxCR0 = (SSPxCR0 & 0x00FF) | ((PCLK_SSP / 2 / SCLK_SLOW) - 1) << 8; }
  66. /*--------------------------------------------------------------------------
  67. Module Private Functions
  68. ---------------------------------------------------------------------------*/
  69. #include "LPC176x.h"
  70. #include "diskio.h"
  71. /* MMC/SD command */
  72. #define CMD0 (0) /* GO_IDLE_STATE */
  73. #define CMD1 (1) /* SEND_OP_COND (MMC) */
  74. #define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
  75. #define CMD8 (8) /* SEND_IF_COND */
  76. #define CMD9 (9) /* SEND_CSD */
  77. #define CMD10 (10) /* SEND_CID */
  78. #define CMD12 (12) /* STOP_TRANSMISSION */
  79. #define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
  80. #define CMD16 (16) /* SET_BLOCKLEN */
  81. #define CMD17 (17) /* READ_SINGLE_BLOCK */
  82. #define CMD18 (18) /* READ_MULTIPLE_BLOCK */
  83. #define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
  84. #define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
  85. #define CMD24 (24) /* WRITE_BLOCK */
  86. #define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
  87. #define CMD32 (32) /* ERASE_ER_BLK_START */
  88. #define CMD33 (33) /* ERASE_ER_BLK_END */
  89. #define CMD38 (38) /* ERASE */
  90. #define CMD48 (48) /* READ_EXTR_SINGLE */
  91. #define CMD49 (49) /* WRITE_EXTR_SINGLE */
  92. #define CMD55 (55) /* APP_CMD */
  93. #define CMD58 (58) /* READ_OCR */
  94. static volatile
  95. DSTATUS Stat = STA_NOINIT; /* Physical drive status */
  96. static volatile
  97. UINT Timer1, Timer2; /* 1kHz decrement timer stopped at zero (disk_timerproc()) */
  98. static
  99. BYTE CardType; /* Card type flags */
  100. /*-----------------------------------------------------------------------*/
  101. /* Send/Receive data to the MMC (Platform dependent) */
  102. /*-----------------------------------------------------------------------*/
  103. /* Exchange a byte */
  104. static
  105. BYTE xchg_spi (
  106. BYTE dat /* Data to send */
  107. )
  108. {
  109. SSPxDR = dat;
  110. while (SSPxSR & 0x10) ;
  111. return SSPxDR;
  112. }
  113. /* Receive multiple byte */
  114. static
  115. void rcvr_spi_multi (
  116. BYTE *buff, /* Pointer to data buffer */
  117. UINT btr /* Number of bytes to receive (16, 64 or 512) */
  118. )
  119. {
  120. UINT n;
  121. WORD d;
  122. SSPxCR0 |= 0x000F; /* Select 16-bit mode */
  123. for (n = 0; n < 8; n++) /* Push 8 frames into pipeline */
  124. SSPxDR = 0xFFFF;
  125. btr -= 16;
  126. while (btr >= 2) { /* Receive the data block into buffer */
  127. btr -= 2;
  128. while (!(SSPxSR & _BV(2))) ; /* Wait for any data in receive FIFO */
  129. d = SSPxDR;
  130. SSPxDR = 0xFFFF;
  131. *buff++ = d >> 8;
  132. *buff++ = d;
  133. }
  134. for (n = 0; n < 8; n++) { /* Pop remaining frames from pipeline */
  135. while (!(SSPxSR & _BV(2))) ;
  136. d = SSPxDR;
  137. *buff++ = d >> 8;
  138. *buff++ = d;
  139. }
  140. SSPxCR0 &= 0xFFF7; /* Select 8-bit mode */
  141. }
  142. #if _DISKIO_WRITE
  143. /* Send multiple byte */
  144. static
  145. void xmit_spi_multi (
  146. const BYTE *buff, /* Pointer to the data */
  147. UINT btx /* Number of bytes to send (multiple of 16) */
  148. )
  149. {
  150. UINT n;
  151. WORD d;
  152. SSPxCR0 |= 0x000F; /* Select 16-bit mode */
  153. for (n = 0; n < 8; n++) { /* Push 8 frames into pipeline */
  154. d = *buff++;
  155. d = d << 8 | *buff++;
  156. SSPxDR = d;
  157. }
  158. btx -= 16;
  159. while (btx >= 2) { /* Transmit data block */
  160. btx -= 2;
  161. d = *buff++;
  162. d = d << 8 | *buff++;
  163. while (!(SSPxSR & _BV(2))) ; /* Wait for any data in receive FIFO */
  164. SSPxDR; SSPxDR = d;
  165. }
  166. for (n = 0; n < 8; n++) { /* Flush pipeline */
  167. while (!(SSPxSR & _BV(2))) ;
  168. SSPxDR;
  169. }
  170. SSPxCR0 &= 0xFFF7; /* Select 8-bit mode */
  171. }
  172. #endif
  173. /*-----------------------------------------------------------------------*/
  174. /* Wait for card ready */
  175. /*-----------------------------------------------------------------------*/
  176. static
  177. int wait_ready ( /* 1:Ready, 0:Timeout */
  178. UINT wt /* Timeout [ms] */
  179. )
  180. {
  181. BYTE d;
  182. Timer2 = wt;
  183. do {
  184. d = xchg_spi(0xFF);
  185. /* This loop takes a time. Insert rot_rdq() here for multitask envilonment. */
  186. } while (d != 0xFF && Timer2); /* Wait for card goes ready or timeout */
  187. return (d == 0xFF) ? 1 : 0;
  188. }
  189. /*-----------------------------------------------------------------------*/
  190. /* Deselect card and release SPI */
  191. /*-----------------------------------------------------------------------*/
  192. static
  193. void deselect (void)
  194. {
  195. CS_HIGH(); /* CS = H */
  196. xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
  197. }
  198. /*-----------------------------------------------------------------------*/
  199. /* Select card and wait for ready */
  200. /*-----------------------------------------------------------------------*/
  201. static
  202. int select (void) /* 1:OK, 0:Timeout */
  203. {
  204. CS_LOW(); /* CS = L */
  205. xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
  206. if (wait_ready(500)) return 1; /* Leading busy check: Wait for card ready */
  207. deselect(); /* Timeout */
  208. return 0;
  209. }
  210. /*-----------------------------------------------------------------------*/
  211. /* Control SPI module (Platform dependent) */
  212. /*-----------------------------------------------------------------------*/
  213. static
  214. void power_on (void) /* Enable SSP module and attach it to I/O pads */
  215. {
  216. __set_PCONP(PCSSPx, 1); /* Enable SSP module */
  217. __set_PCLKSEL(PCLKSSPx, PCLKDIV_SSP); /* Select PCLK frequency for SSP */
  218. SSPxCPSR = 2; /* CPSDVSR=2 */
  219. SSPxCR0 = 0x0007; /* Set mode: SPI mode 0, 8-bit */
  220. SSPxCR1 = 0x2; /* Enable SSP with Master */
  221. ATTACH_SSP(); /* Attach SSP module to I/O pads */
  222. CS_HIGH(); /* Set CS# high */
  223. for (Timer1 = 10; Timer1; ) ; /* 10ms */
  224. }
  225. static
  226. void power_off (void) /* Disable SPI function */
  227. {
  228. select(); /* Wait for card ready */
  229. deselect();
  230. }
  231. /*-----------------------------------------------------------------------*/
  232. /* Receive a data packet from the MMC */
  233. /*-----------------------------------------------------------------------*/
  234. static
  235. int rcvr_datablock ( /* 1:OK, 0:Error */
  236. BYTE *buff, /* Data buffer */
  237. UINT btr /* Data block length (byte) */
  238. )
  239. {
  240. BYTE token;
  241. Timer1 = 200;
  242. do { /* Wait for DataStart token in timeout of 200ms */
  243. token = xchg_spi(0xFF);
  244. /* This loop will take a time. Insert rot_rdq() here for multitask envilonment. */
  245. } while ((token == 0xFF) && Timer1);
  246. if(token != 0xFE) return 0; /* Function fails if invalid DataStart token or timeout */
  247. rcvr_spi_multi(buff, btr); /* Store trailing data to the buffer */
  248. xchg_spi(0xFF); xchg_spi(0xFF); /* Discard CRC */
  249. return 1; /* Function succeeded */
  250. }
  251. /*-----------------------------------------------------------------------*/
  252. /* Send a data packet to the MMC */
  253. /*-----------------------------------------------------------------------*/
  254. #if _DISKIO_WRITE
  255. static
  256. int xmit_datablock ( /* 1:OK, 0:Failed */
  257. const BYTE *buff, /* Ponter to 512 byte data to be sent */
  258. BYTE token /* Token */
  259. )
  260. {
  261. BYTE resp;
  262. if (!wait_ready(500)) return 0; /* Leading busy check: Wait for card ready to accept data block */
  263. xchg_spi(token); /* Send token */
  264. if (token == 0xFD) return 1; /* Do not send data if token is StopTran */
  265. xmit_spi_multi(buff, 512); /* Data */
  266. xchg_spi(0xFF); xchg_spi(0xFF); /* Dummy CRC */
  267. resp = xchg_spi(0xFF); /* Receive data resp */
  268. return (resp & 0x1F) == 0x05 ? 1 : 0; /* Data was accepted or not */
  269. /* Busy check is done at next transmission */
  270. }
  271. #endif
  272. /*-----------------------------------------------------------------------*/
  273. /* Send a command packet to the MMC */
  274. /*-----------------------------------------------------------------------*/
  275. static
  276. BYTE send_cmd ( /* Return value: R1 resp (bit7==1:Failed to send) */
  277. BYTE cmd, /* Command index */
  278. DWORD arg /* Argument */
  279. )
  280. {
  281. BYTE n, res;
  282. if (cmd & 0x80) { /* Send a CMD55 prior to ACMD<n> */
  283. cmd &= 0x7F;
  284. res = send_cmd(CMD55, 0);
  285. if (res > 1) return res;
  286. }
  287. /* Select the card and wait for ready except to stop multiple block read */
  288. if (cmd != CMD12) {
  289. deselect();
  290. if (!select()) return 0xFF;
  291. }
  292. /* Send command packet */
  293. xchg_spi(0x40 | cmd); /* Start + command index */
  294. xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
  295. xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
  296. xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
  297. xchg_spi((BYTE)arg); /* Argument[7..0] */
  298. n = 0x01; /* Dummy CRC + Stop */
  299. if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) */
  300. if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) */
  301. xchg_spi(n);
  302. /* Receive command resp */
  303. if (cmd == CMD12) xchg_spi(0xFF); /* Diacard following one byte when CMD12 */
  304. n = 10; /* Wait for response (10 bytes max) */
  305. do
  306. res = xchg_spi(0xFF);
  307. while ((res & 0x80) && --n);
  308. return res; /* Return received response */
  309. }
  310. /*--------------------------------------------------------------------------
  311. Public Functions
  312. ---------------------------------------------------------------------------*/
  313. /*-----------------------------------------------------------------------*/
  314. /* Initialize disk drive */
  315. /*-----------------------------------------------------------------------*/
  316. DSTATUS disk_initialize (
  317. BYTE drv /* Physical drive number (0) */
  318. )
  319. {
  320. BYTE n, cmd, ty, ocr[4];
  321. if (drv) return STA_NOINIT; /* Supports only drive 0 */
  322. power_on(); /* Initialize SPI */
  323. if (Stat & STA_NODISK) return Stat; /* Is a card existing in the soket? */
  324. FCLK_SLOW();
  325. for (n = 10; n; n--) xchg_spi(0xFF); /* Send 80 dummy clocks */
  326. ty = 0;
  327. if (send_cmd(CMD0, 0) == 1) { /* Put the card SPI state */
  328. Timer1 = 1000; /* Initialization timeout = 1 sec */
  329. if (send_cmd(CMD8, 0x1AA) == 1) { /* Is the catd SDv2? */
  330. for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get 32 bit return value of R7 resp */
  331. if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* Does the card support 2.7-3.6V? */
  332. while (Timer1 && send_cmd(ACMD41, 1UL << 30)) ; /* Wait for end of initialization with ACMD41(HCS) */
  333. if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
  334. for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
  335. ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* Check if the card is SDv2 */
  336. }
  337. }
  338. } else { /* Not an SDv2 card */
  339. if (send_cmd(ACMD41, 0) <= 1) { /* SDv1 or MMCv3? */
  340. ty = CT_SD1; cmd = ACMD41; /* SDv1 (ACMD41(0)) */
  341. } else {
  342. ty = CT_MMC; cmd = CMD1; /* MMCv3 (CMD1(0)) */
  343. }
  344. while (Timer1 && send_cmd(cmd, 0)) ; /* Wait for the card leaves idle state */
  345. if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set block length: 512 */
  346. ty = 0;
  347. }
  348. }
  349. CardType = ty; /* Card type */
  350. deselect();
  351. if (ty) { /* OK */
  352. FCLK_FAST(); /* Set fast clock */
  353. Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */
  354. } else { /* Failed */
  355. power_off();
  356. Stat = STA_NOINIT;
  357. }
  358. return Stat;
  359. }
  360. /*-----------------------------------------------------------------------*/
  361. /* Get disk status */
  362. /*-----------------------------------------------------------------------*/
  363. DSTATUS disk_status (
  364. BYTE drv /* Physical drive number (0) */
  365. )
  366. {
  367. if (drv) return STA_NOINIT; /* Supports only drive 0 */
  368. return Stat; /* Return disk status */
  369. }
  370. /*-----------------------------------------------------------------------*/
  371. /* Read sector(s) */
  372. /*-----------------------------------------------------------------------*/
  373. DRESULT disk_read (
  374. BYTE drv, /* Physical drive number (0) */
  375. BYTE *buff, /* Pointer to the data buffer to store read data */
  376. DWORD sector, /* Start sector number (LBA) */
  377. UINT count /* Number of sectors to read (1..128) */
  378. )
  379. {
  380. BYTE cmd;
  381. if (drv || !count) return RES_PARERR; /* Check parameter */
  382. if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
  383. if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ot BA conversion (byte addressing cards) */
  384. cmd = count > 1 ? CMD18 : CMD17; /* READ_MULTIPLE_BLOCK : READ_SINGLE_BLOCK */
  385. if (send_cmd(cmd, sector) == 0) {
  386. do {
  387. if (!rcvr_datablock(buff, 512)) break;
  388. buff += 512;
  389. } while (--count);
  390. if (cmd == CMD18) send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
  391. }
  392. deselect();
  393. return count ? RES_ERROR : RES_OK; /* Return result */
  394. }
  395. /*-----------------------------------------------------------------------*/
  396. /* Write sector(s) */
  397. /*-----------------------------------------------------------------------*/
  398. #if _DISKIO_WRITE
  399. DRESULT disk_write (
  400. BYTE drv, /* Physical drive number (0) */
  401. const BYTE *buff, /* Ponter to the data to write */
  402. DWORD sector, /* Start sector number (LBA) */
  403. UINT count /* Number of sectors to write (1..128) */
  404. )
  405. {
  406. if (drv || !count) return RES_PARERR; /* Check parameter */
  407. if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check drive status */
  408. if (Stat & STA_PROTECT) return RES_WRPRT; /* Check write protect */
  409. if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ==> BA conversion (byte addressing cards) */
  410. if (count == 1) { /* Single sector write */
  411. if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
  412. && xmit_datablock(buff, 0xFE)) {
  413. count = 0;
  414. }
  415. }
  416. else { /* Multiple sector write */
  417. if (CardType & CT_SDC) send_cmd(ACMD23, count); /* Predefine number of sectors */
  418. if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
  419. do {
  420. if (!xmit_datablock(buff, 0xFC)) break;
  421. buff += 512;
  422. } while (--count);
  423. if (!xmit_datablock(0, 0xFD)) count = 1; /* STOP_TRAN token */
  424. }
  425. }
  426. deselect();
  427. return count ? RES_ERROR : RES_OK; /* Return result */
  428. }
  429. #endif
  430. /*-----------------------------------------------------------------------*/
  431. /* Miscellaneous drive controls other than data read/write */
  432. /*-----------------------------------------------------------------------*/
  433. #if _DISKIO_IOCTL
  434. DRESULT disk_ioctl (
  435. BYTE drv, /* Physical drive number (0) */
  436. BYTE cmd, /* Control command code */
  437. void *buff /* Pointer to the conrtol data */
  438. )
  439. {
  440. DRESULT res;
  441. BYTE n, csd[16], *ptr = buff;
  442. DWORD *dp, st, ed, csize;
  443. #if _DISKIO_ISDIO
  444. SDIO_CMD *sdio = buff;
  445. BYTE rc, *buf;
  446. UINT dc;
  447. #endif
  448. if (drv) return RES_PARERR; /* Check parameter */
  449. if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
  450. res = RES_ERROR;
  451. switch (cmd) {
  452. case CTRL_SYNC: /* Wait for end of internal write process of the drive */
  453. if (select()) res = RES_OK;
  454. break;
  455. case GET_SECTOR_COUNT: /* Get drive capacity in unit of sector (DWORD) */
  456. if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
  457. if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
  458. csize = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
  459. *(DWORD*)buff = csize << 10;
  460. } else { /* SDC ver 1.XX or MMC ver 3 */
  461. n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
  462. csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
  463. *(DWORD*)buff = csize << (n - 9);
  464. }
  465. res = RES_OK;
  466. }
  467. break;
  468. case GET_BLOCK_SIZE: /* Get erase block size in unit of sector (DWORD) */
  469. if (CardType & CT_SD2) { /* SDC ver 2.00 */
  470. if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
  471. xchg_spi(0xFF);
  472. if (rcvr_datablock(csd, 16)) { /* Read partial block */
  473. for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
  474. *(DWORD*)buff = 16UL << (csd[10] >> 4);
  475. res = RES_OK;
  476. }
  477. }
  478. } else { /* SDC ver 1.XX or MMC */
  479. if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
  480. if (CardType & CT_SD1) { /* SDC ver 1.XX */
  481. *(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
  482. } else { /* MMC */
  483. *(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
  484. }
  485. res = RES_OK;
  486. }
  487. }
  488. break;
  489. case CTRL_TRIM: /* Erase a block of sectors (used when _USE_TRIM in ffconf.h is 1) */
  490. if (!(CardType & CT_SDC)) break; /* Check if the card is SDC */
  491. if (disk_ioctl(drv, MMC_GET_CSD, csd)) break; /* Get CSD */
  492. if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; /* Check if sector erase can be applied to the card */
  493. dp = buff; st = dp[0]; ed = dp[1]; /* Load sector block */
  494. if (!(CardType & CT_BLOCK)) {
  495. st *= 512; ed *= 512;
  496. }
  497. if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000)) { /* Erase sector block */
  498. res = RES_OK; /* FatFs does not check result of this command */
  499. }
  500. break;
  501. /* Following commands are never used by FatFs module */
  502. case MMC_GET_TYPE: /* Get MMC/SDC type (BYTE) */
  503. *ptr = CardType;
  504. res = RES_OK;
  505. break;
  506. case MMC_GET_CSD: /* Read CSD (16 bytes) */
  507. if (send_cmd(CMD9, 0) == 0 && rcvr_datablock(ptr, 16)) { /* READ_CSD */
  508. res = RES_OK;
  509. }
  510. break;
  511. case MMC_GET_CID: /* Read CID (16 bytes) */
  512. if (send_cmd(CMD10, 0) == 0 && rcvr_datablock(ptr, 16)) { /* READ_CID */
  513. res = RES_OK;
  514. }
  515. break;
  516. case MMC_GET_OCR: /* Read OCR (4 bytes) */
  517. if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
  518. for (n = 4; n; n--) *ptr++ = xchg_spi(0xFF);
  519. res = RES_OK;
  520. }
  521. break;
  522. case MMC_GET_SDSTAT: /* Read SD status (64 bytes) */
  523. if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
  524. xchg_spi(0xFF);
  525. if (rcvr_datablock(ptr, 64)) res = RES_OK;
  526. }
  527. break;
  528. #if _DISKIO_ISDIO
  529. case ISDIO_READ:
  530. sdio = buff;
  531. if (send_cmd(CMD48, 0x80000000 | sdio->func << 28 | sdio->addr << 9 | ((sdio->ndata - 1) & 0x1FF)) == 0) {
  532. for (Timer1 = 1000; (rc = xchg_spi(0xFF)) == 0xFF && Timer1; ) ;
  533. if (rc == 0xFE) {
  534. for (buf = sdio->data, dc = sdio->ndata; dc; dc--) *buf++ = xchg_spi(0xFF);
  535. for (dc = 514 - sdio->ndata; dc; dc--) xchg_spi(0xFF);
  536. res = RES_OK;
  537. }
  538. }
  539. break;
  540. case ISDIO_WRITE:
  541. sdio = buff;
  542. if (send_cmd(CMD49, 0x80000000 | sdio->func << 28 | sdio->addr << 9 | ((sdio->ndata - 1) & 0x1FF)) == 0) {
  543. xchg_spi(0xFF); xchg_spi(0xFE);
  544. for (buf = sdio->data, dc = sdio->ndata; dc; dc--) xchg_spi(*buf++);
  545. for (dc = 514 - sdio->ndata; dc; dc--) xchg_spi(0xFF);
  546. if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
  547. }
  548. break;
  549. case ISDIO_MRITE:
  550. sdio = buff;
  551. if (send_cmd(CMD49, 0x84000000 | sdio->func << 28 | sdio->addr << 9 | sdio->ndata >> 8) == 0) {
  552. xchg_spi(0xFF); xchg_spi(0xFE);
  553. xchg_spi(sdio->ndata);
  554. for (dc = 513; dc; dc--) xchg_spi(0xFF);
  555. if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
  556. }
  557. break;
  558. #endif
  559. default:
  560. res = RES_PARERR;
  561. }
  562. deselect();
  563. return res;
  564. }
  565. #endif
  566. /*-----------------------------------------------------------------------*/
  567. /* Device timer function */
  568. /*-----------------------------------------------------------------------*/
  569. /* This function must be called from timer interrupt routine in period
  570. / of 1 ms to generate card control timing.
  571. */
  572. void disk_timerproc (void)
  573. {
  574. WORD n;
  575. BYTE s;
  576. n = Timer1; /* 1kHz decrement timer stopped at 0 */
  577. if (n) Timer1 = --n;
  578. n = Timer2;
  579. if (n) Timer2 = --n;
  580. s = Stat;
  581. if (MMC_WP) { /* Write protected */
  582. s |= STA_PROTECT;
  583. } else { /* Write enabled */
  584. s &= ~STA_PROTECT;
  585. }
  586. //if (MMC_CD) { /* Card is in socket */
  587. s &= ~STA_NODISK;
  588. //} else { /* Socket empty */
  589. // s |= (STA_NODISK | STA_NOINIT);
  590. //}
  591. Stat = s;
  592. }