My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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WInterrupts.c 6.6KB

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  1. /* -*- mode: jde; c-basic-offset: 2; indent-tabs-mode: nil -*- */
  2. /*
  3. Part of the Wiring project - http://wiring.uniandes.edu.co
  4. Copyright (c) 2004-05 Hernando Barragan
  5. This library is free software; you can redistribute it and/or
  6. modify it under the terms of the GNU Lesser General Public
  7. License as published by the Free Software Foundation; either
  8. version 2.1 of the License, or (at your option) any later version.
  9. This library is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. Lesser General Public License for more details.
  13. You should have received a copy of the GNU Lesser General
  14. Public License along with this library; if not, write to the
  15. Free Software Foundation, Inc., 59 Temple Place, Suite 330,
  16. Boston, MA 02111-1307 USA
  17. Modified 24 November 2006 by David A. Mellis
  18. Modified 1 August 2010 by Mark Sproul
  19. */
  20. #include <inttypes.h>
  21. #include <avr/io.h>
  22. #include <avr/interrupt.h>
  23. #include <avr/pgmspace.h>
  24. #include <stdio.h>
  25. #include "WConstants.h"
  26. #include "wiring_private.h"
  27. volatile static voidFuncPtr intFunc[EXTERNAL_NUM_INTERRUPTS];
  28. // volatile static voidFuncPtr twiIntFunc;
  29. void attachInterrupt(uint8_t interruptNum, void (*userFunc)(void), int mode) {
  30. if(interruptNum < EXTERNAL_NUM_INTERRUPTS) {
  31. intFunc[interruptNum] = userFunc;
  32. // Configure the interrupt mode (trigger on low input, any change, rising
  33. // edge, or falling edge). The mode constants were chosen to correspond
  34. // to the configuration bits in the hardware register, so we simply shift
  35. // the mode into place.
  36. // Enable the interrupt.
  37. switch (interruptNum) {
  38. #if defined(EICRA) && defined(EICRB) && defined(EIMSK)
  39. case 2:
  40. EICRA = (EICRA & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
  41. EIMSK |= (1 << INT0);
  42. break;
  43. case 3:
  44. EICRA = (EICRA & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
  45. EIMSK |= (1 << INT1);
  46. break;
  47. case 4:
  48. EICRA = (EICRA & ~((1 << ISC20) | (1 << ISC21))) | (mode << ISC20);
  49. EIMSK |= (1 << INT2);
  50. break;
  51. case 5:
  52. EICRA = (EICRA & ~((1 << ISC30) | (1 << ISC31))) | (mode << ISC30);
  53. EIMSK |= (1 << INT3);
  54. break;
  55. case 0:
  56. EICRB = (EICRB & ~((1 << ISC40) | (1 << ISC41))) | (mode << ISC40);
  57. EIMSK |= (1 << INT4);
  58. break;
  59. case 1:
  60. EICRB = (EICRB & ~((1 << ISC50) | (1 << ISC51))) | (mode << ISC50);
  61. EIMSK |= (1 << INT5);
  62. break;
  63. case 6:
  64. EICRB = (EICRB & ~((1 << ISC60) | (1 << ISC61))) | (mode << ISC60);
  65. EIMSK |= (1 << INT6);
  66. break;
  67. case 7:
  68. EICRB = (EICRB & ~((1 << ISC70) | (1 << ISC71))) | (mode << ISC70);
  69. EIMSK |= (1 << INT7);
  70. break;
  71. #else
  72. case 0:
  73. #if defined(EICRA) && defined(ISC00) && defined(EIMSK)
  74. EICRA = (EICRA & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
  75. EIMSK |= (1 << INT0);
  76. #elif defined(MCUCR) && defined(ISC00) && defined(GICR)
  77. MCUCR = (MCUCR & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
  78. GICR |= (1 << INT0);
  79. #elif defined(MCUCR) && defined(ISC00) && defined(GIMSK)
  80. MCUCR = (MCUCR & ~((1 << ISC00) | (1 << ISC01))) | (mode << ISC00);
  81. GIMSK |= (1 << INT0);
  82. #else
  83. #error attachInterrupt not finished for this CPU (case 0)
  84. #endif
  85. break;
  86. case 1:
  87. #if defined(EICRA) && defined(ISC10) && defined(ISC11) && defined(EIMSK)
  88. EICRA = (EICRA & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
  89. EIMSK |= (1 << INT1);
  90. #elif defined(MCUCR) && defined(ISC10) && defined(ISC11) && defined(GICR)
  91. MCUCR = (MCUCR & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
  92. GICR |= (1 << INT1);
  93. #elif defined(MCUCR) && defined(ISC10) && defined(GIMSK) && defined(GIMSK)
  94. MCUCR = (MCUCR & ~((1 << ISC10) | (1 << ISC11))) | (mode << ISC10);
  95. GIMSK |= (1 << INT1);
  96. #else
  97. #warning attachInterrupt may need some more work for this cpu (case 1)
  98. #endif
  99. break;
  100. #endif
  101. }
  102. }
  103. }
  104. void detachInterrupt(uint8_t interruptNum) {
  105. if(interruptNum < EXTERNAL_NUM_INTERRUPTS) {
  106. // Disable the interrupt. (We can't assume that interruptNum is equal
  107. // to the number of the EIMSK bit to clear, as this isn't true on the
  108. // ATmega8. There, INT0 is 6 and INT1 is 7.)
  109. switch (interruptNum) {
  110. #if defined(EICRA) && defined(EICRB) && defined(EIMSK)
  111. case 2:
  112. EIMSK &= ~(1 << INT0);
  113. break;
  114. case 3:
  115. EIMSK &= ~(1 << INT1);
  116. break;
  117. case 4:
  118. EIMSK &= ~(1 << INT2);
  119. break;
  120. case 5:
  121. EIMSK &= ~(1 << INT3);
  122. break;
  123. case 0:
  124. EIMSK &= ~(1 << INT4);
  125. break;
  126. case 1:
  127. EIMSK &= ~(1 << INT5);
  128. break;
  129. case 6:
  130. EIMSK &= ~(1 << INT6);
  131. break;
  132. case 7:
  133. EIMSK &= ~(1 << INT7);
  134. break;
  135. #else
  136. case 0:
  137. #if defined(EIMSK) && defined(INT0)
  138. EIMSK &= ~(1 << INT0);
  139. #elif defined(GICR) && defined(ISC00)
  140. GICR &= ~(1 << INT0); // atmega32
  141. #elif defined(GIMSK) && defined(INT0)
  142. GIMSK &= ~(1 << INT0);
  143. #else
  144. #error detachInterrupt not finished for this cpu
  145. #endif
  146. break;
  147. case 1:
  148. #if defined(EIMSK) && defined(INT1)
  149. EIMSK &= ~(1 << INT1);
  150. #elif defined(GICR) && defined(INT1)
  151. GICR &= ~(1 << INT1); // atmega32
  152. #elif defined(GIMSK) && defined(INT1)
  153. GIMSK &= ~(1 << INT1);
  154. #else
  155. #warning detachInterrupt may need some more work for this cpu (case 1)
  156. #endif
  157. break;
  158. #endif
  159. }
  160. intFunc[interruptNum] = 0;
  161. }
  162. }
  163. /*
  164. void attachInterruptTwi(void (*userFunc)(void) ) {
  165. twiIntFunc = userFunc;
  166. }
  167. */
  168. #if defined(EICRA) && defined(EICRB)
  169. SIGNAL(INT0_vect) {
  170. if(intFunc[EXTERNAL_INT_2])
  171. intFunc[EXTERNAL_INT_2]();
  172. }
  173. SIGNAL(INT1_vect) {
  174. if(intFunc[EXTERNAL_INT_3])
  175. intFunc[EXTERNAL_INT_3]();
  176. }
  177. SIGNAL(INT2_vect) {
  178. if(intFunc[EXTERNAL_INT_4])
  179. intFunc[EXTERNAL_INT_4]();
  180. }
  181. SIGNAL(INT3_vect) {
  182. if(intFunc[EXTERNAL_INT_5])
  183. intFunc[EXTERNAL_INT_5]();
  184. }
  185. SIGNAL(INT4_vect) {
  186. if(intFunc[EXTERNAL_INT_0])
  187. intFunc[EXTERNAL_INT_0]();
  188. }
  189. SIGNAL(INT5_vect) {
  190. if(intFunc[EXTERNAL_INT_1])
  191. intFunc[EXTERNAL_INT_1]();
  192. }
  193. SIGNAL(INT6_vect) {
  194. if(intFunc[EXTERNAL_INT_6])
  195. intFunc[EXTERNAL_INT_6]();
  196. }
  197. SIGNAL(INT7_vect) {
  198. if(intFunc[EXTERNAL_INT_7])
  199. intFunc[EXTERNAL_INT_7]();
  200. }
  201. #else
  202. SIGNAL(INT0_vect) {
  203. if(intFunc[EXTERNAL_INT_0])
  204. intFunc[EXTERNAL_INT_0]();
  205. }
  206. SIGNAL(INT1_vect) {
  207. if(intFunc[EXTERNAL_INT_1])
  208. intFunc[EXTERNAL_INT_1]();
  209. }
  210. #endif
  211. /*
  212. SIGNAL(SIG_2WIRE_SERIAL) {
  213. if(twiIntFunc)
  214. twiIntFunc();
  215. }
  216. */