My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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ultralcd_st7565_u8glib_VIKI.h 10KB

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  1. /**
  2. * Marlin 3D Printer Firmware
  3. * Copyright (C) 2016, 2017 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
  4. *
  5. * Based on Sprinter and grbl.
  6. * Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
  7. *
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  20. *
  21. */
  22. #ifndef ULCDST7565_H
  23. #define ULCDST7565_H
  24. #include <U8glib.h>
  25. #define ST7565_CLK_PIN DOGLCD_SCK
  26. #define ST7565_DAT_PIN DOGLCD_MOSI
  27. #define ST7565_CS_PIN DOGLCD_CS
  28. #define ST7565_A0_PIN DOGLCD_A0
  29. #define LCD_PIXEL_WIDTH 128
  30. #define LCD_PIXEL_HEIGHT 64
  31. #define PAGE_HEIGHT 8
  32. //set optimization so ARDUINO optimizes this file
  33. #pragma GCC optimize (3)
  34. // If you want you can define your own set of delays in Configuration.h
  35. //#define ST7565_DELAY_1 DELAY_0_NOP
  36. //#define ST7565_DELAY_2 DELAY_0_NOP
  37. //#define ST7565_DELAY_3 DELAY_0_NOP
  38. /*
  39. #define ST7565_DELAY_1 u8g_10MicroDelay()
  40. #define ST7565_DELAY_2 u8g_10MicroDelay()
  41. #define ST7565_DELAY_3 u8g_10MicroDelay()
  42. */
  43. #if F_CPU >= 20000000
  44. #define CPU_ST7565_DELAY_1 DELAY_0_NOP
  45. #define CPU_ST7565_DELAY_2 DELAY_0_NOP
  46. #define CPU_ST7565_DELAY_3 DELAY_1_NOP
  47. #elif (MOTHERBOARD == BOARD_3DRAG) || (MOTHERBOARD == BOARD_K8200) || (MOTHERBOARD == BOARD_K8400)
  48. #define CPU_ST7565_DELAY_1 DELAY_0_NOP
  49. #define CPU_ST7565_DELAY_2 DELAY_3_NOP
  50. #define CPU_ST7565_DELAY_3 DELAY_0_NOP
  51. #elif (MOTHERBOARD == BOARD_MINIRAMBO)
  52. #define CPU_ST7565_DELAY_1 DELAY_0_NOP
  53. #define CPU_ST7565_DELAY_2 DELAY_4_NOP
  54. #define CPU_ST7565_DELAY_3 DELAY_0_NOP
  55. #elif (MOTHERBOARD == BOARD_RAMBO)
  56. #define CPU_ST7565_DELAY_1 DELAY_0_NOP
  57. #define CPU_ST7565_DELAY_2 DELAY_0_NOP
  58. #define CPU_ST7565_DELAY_3 DELAY_0_NOP
  59. #elif F_CPU == 16000000
  60. #define CPU_ST7565_DELAY_1 DELAY_0_NOP
  61. #define CPU_ST7565_DELAY_2 DELAY_0_NOP
  62. #define CPU_ST7565_DELAY_3 DELAY_1_NOP
  63. #else
  64. #error "No valid condition for delays in 'ultralcd_st7565_u8glib_VIKI.h'"
  65. #endif
  66. #ifndef ST7565_DELAY_1
  67. #define ST7565_DELAY_1 CPU_ST7565_DELAY_1
  68. #endif
  69. #ifndef ST7565_DELAY_2
  70. #define ST7565_DELAY_2 CPU_ST7565_DELAY_2
  71. #endif
  72. #ifndef ST7565_DELAY_3
  73. #define ST7565_DELAY_3 CPU_ST7565_DELAY_3
  74. #endif
  75. #if ENABLED(SHARED_SPI) // Re-ARM requires that the LCD and the SD card share a single SPI
  76. #define ST7565_WRITE_BYTE(a) { spiSend((uint8_t)a); U8G_DELAY(); }
  77. #define ST7560_WriteSequence(count, pointer) { uint8_t *ptr = pointer; for (uint8_t i = 0; i < count; i++) {spiSend( *ptr++);} DELAY_10US; }
  78. #else
  79. #define ST7565_SND_BIT \
  80. WRITE(ST7565_CLK_PIN, LOW); ST7565_DELAY_1; \
  81. WRITE(ST7565_DAT_PIN, val & 0x80); ST7565_DELAY_2; \
  82. WRITE(ST7565_CLK_PIN, HIGH); ST7565_DELAY_3; \
  83. WRITE(ST7565_CLK_PIN, LOW);\
  84. val <<= 1
  85. static void ST7565_SWSPI_SND_8BIT(uint8_t val) {
  86. ST7565_SND_BIT; // 1
  87. ST7565_SND_BIT; // 2
  88. ST7565_SND_BIT; // 3
  89. ST7565_SND_BIT; // 4
  90. ST7565_SND_BIT; // 5
  91. ST7565_SND_BIT; // 6
  92. ST7565_SND_BIT; // 7
  93. ST7565_SND_BIT; // 8
  94. }
  95. #define ST7565_WRITE_BYTE(a) { ST7565_SWSPI_SND_8BIT((uint8_t)a); U8G_DELAY(); }
  96. #define ST7560_WriteSequence(count, pointer) { uint8_t *ptr = pointer; for (uint8_t i = 0; i < count; i++) {ST7565_SWSPI_SND_8BIT( *ptr++);} DELAY_10US; }
  97. #endif
  98. #if defined(DOGM_SPI_DELAY_US) && DOGM_SPI_DELAY_US > 0
  99. #define U8G_DELAY() delayMicroseconds(DOGM_SPI_DELAY_US)
  100. #else
  101. #define U8G_DELAY() u8g_10MicroDelay()
  102. #endif
  103. #define ST7565_CS() { WRITE(ST7565_CS_PIN,1); U8G_DELAY(); }
  104. #define ST7565_NCS() { WRITE(ST7565_CS_PIN,0); }
  105. #define ST7565_A0() { WRITE(ST7565_A0_PIN,1); U8G_DELAY(); }
  106. #define ST7565_NA0() { WRITE(ST7565_A0_PIN,0); }
  107. uint8_t u8g_dev_st7565_64128n_2x_VIKI_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
  108. switch (msg) {
  109. case U8G_DEV_MSG_INIT: {
  110. OUT_WRITE(ST7565_CS_PIN, LOW);
  111. #if ENABLED(SHARED_SPI)
  112. u8g_Delay(250);
  113. spiBegin();
  114. #ifndef SPI_SPEED
  115. #define SPI_SPEED SPI_FULL_SPEED // use same SPI speed as SD card
  116. #endif
  117. spiInit(SPI_SPEED);
  118. #else
  119. OUT_WRITE(ST7565_DAT_PIN, LOW);
  120. OUT_WRITE(ST7565_CLK_PIN, LOW);
  121. #endif
  122. OUT_WRITE(ST7565_A0_PIN, LOW);
  123. ST7565_CS(); /* disable chip */
  124. ST7565_NA0(); /* instruction mode */
  125. ST7565_NCS(); /* enable chip */
  126. ST7565_WRITE_BYTE(0x0A2); /* 0x0A2: LCD bias 1/9 (according to Displaytech 64128N datasheet) */
  127. ST7565_WRITE_BYTE(0x0A0); /* Normal ADC Select (according to Displaytech 64128N datasheet) */
  128. ST7565_WRITE_BYTE(0x0C8); /* common output mode: set scan direction normal operation/SHL Select; 0x0C0 --> SHL = 0; normal; 0x0C8 --> SHL = 1 */
  129. ST7565_WRITE_BYTE(0x040); /* Display start line for Displaytech 64128N */
  130. ST7565_WRITE_BYTE(0x028 | 0x04); /* power control: turn on voltage converter */
  131. //U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
  132. ST7565_WRITE_BYTE(0x028 | 0x06); /* power control: turn on voltage regulator */
  133. //U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
  134. ST7565_WRITE_BYTE(0x028 | 0x07); /* power control: turn on voltage follower */
  135. //U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
  136. ST7565_WRITE_BYTE(0x010); /* Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N */
  137. ST7565_WRITE_BYTE(0x0A6); /* display normal, bit val 0: LCD pixel off. */
  138. ST7565_WRITE_BYTE(0x081); /* set contrast */
  139. ST7565_WRITE_BYTE(0x01E); /* Contrast value. Setting for controlling brightness of Displaytech 64128N */
  140. ST7565_WRITE_BYTE(0x0AF); /* display on */
  141. U8G_ESC_DLY(100); /* delay 100 ms */
  142. ST7565_WRITE_BYTE(0x0A5); /* display all points; ST7565 */
  143. U8G_ESC_DLY(100); /* delay 100 ms */
  144. U8G_ESC_DLY(100); /* delay 100 ms */
  145. ST7565_WRITE_BYTE(0x0A4); /* normal display */
  146. ST7565_CS(); /* disable chip */
  147. } /* end of sequence */
  148. break;
  149. case U8G_DEV_MSG_STOP: break;
  150. case U8G_DEV_MSG_PAGE_NEXT: {
  151. u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
  152. ST7565_CS(); /* disable chip */
  153. ST7565_NA0(); /* instruction mode */
  154. ST7565_NCS(); /* enable chip */
  155. ST7565_WRITE_BYTE(0x010); /* set upper 4 bit of the col adr to 0x10 */
  156. ST7565_WRITE_BYTE(0x000); /* set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N */
  157. /* end of sequence */
  158. ST7565_WRITE_BYTE(0x0B0 | (2*pb->p.page));; /* select current page (ST7565R) */
  159. ST7565_A0(); /* data mode */
  160. ST7560_WriteSequence( (uint8_t) pb->width, (uint8_t *)pb->buf);
  161. ST7565_CS(); /* disable chip */
  162. ST7565_NA0(); /* instruction mode */
  163. ST7565_NCS(); /* enable chip */
  164. ST7565_WRITE_BYTE(0x010); /* set upper 4 bit of the col adr to 0x10 */
  165. ST7565_WRITE_BYTE(0x000); /* set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N */
  166. /* end of sequence */
  167. ST7565_WRITE_BYTE(0x0B0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
  168. ST7565_A0(); /* data mode */
  169. ST7560_WriteSequence( (uint8_t) pb->width, (uint8_t *)(pb->buf)+pb->width);
  170. ST7565_CS(); /* disable chip */
  171. }
  172. break;
  173. case U8G_DEV_MSG_CONTRAST:
  174. ST7565_NCS();
  175. ST7565_NA0(); /* instruction mode */
  176. ST7565_WRITE_BYTE(0x081);
  177. ST7565_WRITE_BYTE((*(uint8_t *)arg) >> 2);
  178. ST7565_CS(); /* disable chip */
  179. return 1;
  180. case U8G_DEV_MSG_SLEEP_ON:
  181. ST7565_NA0(); /* instruction mode */
  182. ST7565_NCS(); /* enable chip */
  183. ST7565_WRITE_BYTE(0x0AC); /* static indicator off */
  184. ST7565_WRITE_BYTE(0x000); /* indicator register set (not sure if this is required) */
  185. ST7565_WRITE_BYTE(0x0AE); /* display off */
  186. ST7565_WRITE_BYTE(0x0A5); /* all points on */
  187. ST7565_CS(); /* disable chip , bugfix 12 nov 2014 */
  188. /* end of sequence */
  189. return 1;
  190. case U8G_DEV_MSG_SLEEP_OFF:
  191. ST7565_NA0(); /* instruction mode */
  192. ST7565_NCS(); /* enable chip */
  193. ST7565_WRITE_BYTE(0x0A4); /* all points off */
  194. ST7565_WRITE_BYTE(0x0AF); /* display on */
  195. U8G_ESC_DLY(50); /* delay 50 ms */
  196. ST7565_CS(); /* disable chip , bugfix 12 nov 2014 */
  197. /* end of sequence */
  198. return 1;
  199. }
  200. return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
  201. }
  202. uint8_t u8g_dev_st7565_64128n_2x_VIKI_buf[LCD_PIXEL_WIDTH*2] U8G_NOCOMMON;
  203. u8g_pb_t u8g_dev_st7565_64128n_2x_VIKI_pb = {{16, LCD_PIXEL_HEIGHT, 0, 0, 0}, LCD_PIXEL_WIDTH, u8g_dev_st7565_64128n_2x_VIKI_buf};
  204. u8g_dev_t u8g_dev_st7565_64128n_2x_VIKI_sw_spi = {u8g_dev_st7565_64128n_2x_VIKI_fn, &u8g_dev_st7565_64128n_2x_VIKI_pb, &u8g_com_null_fn};
  205. class U8GLIB_ST7565_64128n_2x_VIKI : public U8GLIB {
  206. public:
  207. U8GLIB_ST7565_64128n_2x_VIKI(uint8_t dummy)
  208. : U8GLIB(&u8g_dev_st7565_64128n_2x_VIKI_sw_spi)
  209. { }
  210. U8GLIB_ST7565_64128n_2x_VIKI(uint8_t sck, uint8_t mosi, uint8_t cs, uint8_t a0, uint8_t reset = U8G_PIN_NONE)
  211. : U8GLIB(&u8g_dev_st7565_64128n_2x_VIKI_sw_spi)
  212. { }
  213. };
  214. #pragma GCC reset_options
  215. #endif // ULCDST7565_H