My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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G2_PWM.cpp 7.9KB

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  1. /**
  2. * Marlin 3D Printer Firmware
  3. * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
  4. *
  5. * Based on Sprinter and grbl.
  6. * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
  7. *
  8. * This program is free software: you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation, either version 3 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  20. *
  21. */
  22. /**
  23. * The PWM module is only used to generate interrupts at specified times. It
  24. * is NOT used to directly toggle pins. The ISR writes to the pin assigned to
  25. * that interrupt.
  26. *
  27. * All PWMs use the same repetition rate. The G2 needs about 10KHz min in order to
  28. * not have obvious ripple on the Vref signals.
  29. *
  30. * The data structures are setup to minimize the computation done by the ISR which
  31. * minimizes ISR execution time. Execution times are 0.8 to 1.1 microseconds.
  32. *
  33. * FIve PWM interrupt sources are used. Channel 0 sets the base period. All Vref
  34. * signals are set active when this counter overflows and resets to zero. The compare
  35. * values in channels 1-4 are set to give the desired duty cycle for that Vref pin.
  36. * When counter 0 matches the compare value then that channel generates an interrupt.
  37. * The ISR checks the source of the interrupt and sets the corresponding pin inactive.
  38. *
  39. * Some jitter in the Vref signal is OK so the interrupt priority is left at its default value.
  40. */
  41. #include "../../../inc/MarlinConfig.h"
  42. #if MB(PRINTRBOARD_G2)
  43. #include "G2_PWM.h"
  44. volatile uint32_t *SODR_A = &PIOA->PIO_SODR,
  45. *SODR_B = &PIOB->PIO_SODR,
  46. *CODR_A = &PIOA->PIO_CODR,
  47. *CODR_B = &PIOB->PIO_CODR;
  48. PWM_map ISR_table[NUM_PWMS] = PWM_MAP_INIT;
  49. void Stepper::digipot_init() {
  50. OUT_WRITE(MOTOR_CURRENT_PWM_X_PIN, 0); // init pins
  51. OUT_WRITE(MOTOR_CURRENT_PWM_Y_PIN, 0);
  52. OUT_WRITE(MOTOR_CURRENT_PWM_Z_PIN, 0);
  53. OUT_WRITE(MOTOR_CURRENT_PWM_E_PIN, 0);
  54. #define WPKEY (0x50574D << 8) // “PWM” in ASCII
  55. #define WPCMD_DIS_SW 0 // command to disable Write Protect SW
  56. #define WPRG_ALL (PWM_WPCR_WPRG0 | PWM_WPCR_WPRG1 | PWM_WPCR_WPRG2 | PWM_WPCR_WPRG3 | PWM_WPCR_WPRG4 | PWM_WPCR_WPRG5) // all Write Protect Groups
  57. #define PWM_CLOCK_F F_CPU / 1000000UL // set clock to 1MHz
  58. PMC->PMC_PCER1 = PMC_PCER1_PID36; // enable PWM controller clock (disabled on power up)
  59. PWM->PWM_WPCR = WPKEY | WPRG_ALL | WPCMD_DIS_SW; // enable setting of all PWM registers
  60. PWM->PWM_CLK = PWM_CLOCK_F; // enable CLK_A and set it to 1MHz, leave CLK_B disabled
  61. PWM->PWM_CH_NUM[0].PWM_CMR = 0b1011; // set channel 0 to Clock A input & to left aligned
  62. PWM->PWM_CH_NUM[1].PWM_CMR = 0b1011; // set channel 1 to Clock A input & to left aligned
  63. PWM->PWM_CH_NUM[2].PWM_CMR = 0b1011; // set channel 2 to Clock A input & to left aligned
  64. PWM->PWM_CH_NUM[3].PWM_CMR = 0b1011; // set channel 3 to Clock A input & to left aligned
  65. PWM->PWM_CH_NUM[4].PWM_CMR = 0b1011; // set channel 4 to Clock A input & to left aligned
  66. PWM->PWM_CH_NUM[0].PWM_CPRD = PWM_PERIOD_US; // set channel 0 Period
  67. PWM->PWM_IER2 = PWM_IER1_CHID0; // generate interrupt when counter0 overflows
  68. PWM->PWM_IER2 = PWM_IER2_CMPM0 | PWM_IER2_CMPM1 | PWM_IER2_CMPM2 | PWM_IER2_CMPM3 | PWM_IER2_CMPM4; // generate interrupt on compare event
  69. PWM->PWM_CMP[1].PWM_CMPV = 0x010000000LL | G2_VREF_COUNT(G2_VREF(motor_current_setting[0])); // interrupt when counter0 == CMPV - used to set Motor 1 PWM inactive
  70. PWM->PWM_CMP[2].PWM_CMPV = 0x010000000LL | G2_VREF_COUNT(G2_VREF(motor_current_setting[0])); // interrupt when counter0 == CMPV - used to set Motor 2 PWM inactive
  71. PWM->PWM_CMP[3].PWM_CMPV = 0x010000000LL | G2_VREF_COUNT(G2_VREF(motor_current_setting[1])); // interrupt when counter0 == CMPV - used to set Motor 3 PWM inactive
  72. PWM->PWM_CMP[4].PWM_CMPV = 0x010000000LL | G2_VREF_COUNT(G2_VREF(motor_current_setting[2])); // interrupt when counter0 == CMPV - used to set Motor 4 PWM inactive
  73. PWM->PWM_CMP[1].PWM_CMPM = 0x0001; // enable compare event
  74. PWM->PWM_CMP[2].PWM_CMPM = 0x0001; // enable compare event
  75. PWM->PWM_CMP[3].PWM_CMPM = 0x0001; // enable compare event
  76. PWM->PWM_CMP[4].PWM_CMPM = 0x0001; // enable compare event
  77. PWM->PWM_SCM = PWM_SCM_UPDM_MODE0 | PWM_SCM_SYNC0 | PWM_SCM_SYNC1 | PWM_SCM_SYNC2 | PWM_SCM_SYNC3 | PWM_SCM_SYNC4; // sync 1-4 with 0, use mode 0 for updates
  78. PWM->PWM_ENA = PWM_ENA_CHID0 | PWM_ENA_CHID1 | PWM_ENA_CHID2 | PWM_ENA_CHID3 | PWM_ENA_CHID4; // enable the channels used by G2
  79. PWM->PWM_IER1 = PWM_IER1_CHID0 | PWM_IER1_CHID1 | PWM_IER1_CHID2 | PWM_IER1_CHID3 | PWM_IER1_CHID4; // enable interrupts for the channels used by G2
  80. NVIC_EnableIRQ(PWM_IRQn); // Enable interrupt handler
  81. NVIC_SetPriority(PWM_IRQn, NVIC_EncodePriority(0, 10, 0)); // normal priority for PWM module (can stand some jitter on the Vref signals)
  82. }
  83. void Stepper::digipot_current(const uint8_t driver, const int16_t current) {
  84. if (!(PWM->PWM_CH_NUM[0].PWM_CPRD == PWM_PERIOD_US)) digipot_init(); // Init PWM system if needed
  85. switch (driver) {
  86. case 0: PWM->PWM_CMP[1].PWM_CMPVUPD = 0x010000000LL | G2_VREF_COUNT(G2_VREF(current)); // update X & Y
  87. PWM->PWM_CMP[2].PWM_CMPVUPD = 0x010000000LL | G2_VREF_COUNT(G2_VREF(current));
  88. PWM->PWM_CMP[1].PWM_CMPMUPD = 0x0001; // enable compare event
  89. PWM->PWM_CMP[2].PWM_CMPMUPD = 0x0001; // enable compare event
  90. PWM->PWM_SCUC = PWM_SCUC_UPDULOCK; // tell the PWM controller to update the values on the next cycle
  91. break;
  92. case 1: PWM->PWM_CMP[3].PWM_CMPVUPD = 0x010000000LL | G2_VREF_COUNT(G2_VREF(current)); // update Z
  93. PWM->PWM_CMP[3].PWM_CMPMUPD = 0x0001; // enable compare event
  94. PWM->PWM_SCUC = PWM_SCUC_UPDULOCK; // tell the PWM controller to update the values on the next cycle
  95. break;
  96. default:PWM->PWM_CMP[4].PWM_CMPVUPD = 0x010000000LL | G2_VREF_COUNT(G2_VREF(current)); // update E
  97. PWM->PWM_CMP[4].PWM_CMPMUPD = 0x0001; // enable compare event
  98. PWM->PWM_SCUC = PWM_SCUC_UPDULOCK; // tell the PWM controller to update the values on the next cycle
  99. break;
  100. }
  101. }
  102. volatile uint32_t PWM_ISR1_STATUS, PWM_ISR2_STATUS;
  103. void PWM_Handler() {
  104. PWM_ISR1_STATUS = PWM->PWM_ISR1;
  105. PWM_ISR2_STATUS = PWM->PWM_ISR2;
  106. if (PWM_ISR1_STATUS & PWM_IER1_CHID0) { // CHAN_0 interrupt
  107. *ISR_table[0].set_register = ISR_table[0].write_mask; // set X to active
  108. *ISR_table[1].set_register = ISR_table[1].write_mask; // set Y to active
  109. *ISR_table[2].set_register = ISR_table[2].write_mask; // set Z to active
  110. *ISR_table[3].set_register = ISR_table[3].write_mask; // set E to active
  111. }
  112. else {
  113. if (PWM_ISR2_STATUS & PWM_IER2_CMPM1) *ISR_table[0].clr_register = ISR_table[0].write_mask; // set X to inactive
  114. if (PWM_ISR2_STATUS & PWM_IER2_CMPM2) *ISR_table[1].clr_register = ISR_table[1].write_mask; // set Y to inactive
  115. if (PWM_ISR2_STATUS & PWM_IER2_CMPM3) *ISR_table[2].clr_register = ISR_table[2].write_mask; // set Z to inactive
  116. if (PWM_ISR2_STATUS & PWM_IER2_CMPM4) *ISR_table[3].clr_register = ISR_table[3].write_mask; // set E to inactive
  117. }
  118. return;
  119. }
  120. #endif // PRINTRBOARD_G2