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osci-video.kicad_pro 11KB

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  13. "courtyard_line_width": 0.049999999999999996,
  14. "dimension_precision": 4,
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  16. "dimensions": {
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  70. "diff_pair_uncoupled_length_too_long": "error",
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  76. "hole_clearance": "error",
  77. "hole_near_hole": "error",
  78. "invalid_outline": "error",
  79. "isolated_copper": "warning",
  80. "item_on_disabled_layer": "error",
  81. "items_not_allowed": "error",
  82. "length_out_of_range": "error",
  83. "lib_footprint_issues": "warning",
  84. "lib_footprint_mismatch": "warning",
  85. "malformed_courtyard": "error",
  86. "microvia_drill_out_of_range": "error",
  87. "missing_courtyard": "ignore",
  88. "missing_footprint": "warning",
  89. "net_conflict": "warning",
  90. "npth_inside_courtyard": "ignore",
  91. "padstack": "warning",
  92. "pth_inside_courtyard": "ignore",
  93. "shorting_items": "error",
  94. "silk_edge_clearance": "warning",
  95. "silk_over_copper": "warning",
  96. "silk_overlap": "warning",
  97. "skew_out_of_range": "error",
  98. "solder_mask_bridge": "error",
  99. "starved_thermal": "error",
  100. "text_height": "warning",
  101. "text_thickness": "warning",
  102. "through_hole_pad_without_hole": "error",
  103. "too_many_vias": "error",
  104. "track_dangling": "warning",
  105. "track_width": "error",
  106. "tracks_crossing": "error",
  107. "unconnected_items": "error",
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  109. "via_dangling": "warning",
  110. "zones_intersect": "error"
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  176. 1.0
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  183. ],
  184. "zones_allow_external_fillets": false
  185. },
  186. "layer_presets": [],
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  188. },
  189. "boards": [],
  190. "cvpcb": {
  191. "equivalence_files": []
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  193. "erc": {
  194. "erc_exclusions": [],
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  368. "rule_severities": {
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  370. "bus_entry_needed": "error",
  371. "bus_to_bus_conflict": "error",
  372. "bus_to_net_conflict": "error",
  373. "conflicting_netclasses": "error",
  374. "different_unit_footprint": "error",
  375. "different_unit_net": "error",
  376. "duplicate_reference": "error",
  377. "duplicate_sheet_names": "error",
  378. "endpoint_off_grid": "warning",
  379. "extra_units": "error",
  380. "global_label_dangling": "warning",
  381. "hier_label_mismatch": "error",
  382. "label_dangling": "error",
  383. "lib_symbol_issues": "warning",
  384. "missing_bidi_pin": "warning",
  385. "missing_input_pin": "warning",
  386. "missing_power_pin": "error",
  387. "missing_unit": "warning",
  388. "multiple_net_names": "warning",
  389. "net_not_bus_member": "warning",
  390. "no_connect_connected": "warning",
  391. "no_connect_dangling": "warning",
  392. "pin_not_connected": "error",
  393. "pin_not_driven": "error",
  394. "pin_to_pin": "warning",
  395. "power_pin_not_driven": "error",
  396. "similar_labels": "warning",
  397. "simulation_model_issue": "ignore",
  398. "unannotated": "error",
  399. "unit_value_mismatch": "error",
  400. "unresolved_variable": "error",
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  403. },
  404. "libraries": {
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  406. "pinned_symbol_libs": []
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  408. "meta": {
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  410. "version": 1
  411. },
  412. "net_settings": {
  413. "classes": [
  414. {
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  416. "clearance": 0.2,
  417. "diff_pair_gap": 0.25,
  418. "diff_pair_via_gap": 0.25,
  419. "diff_pair_width": 0.2,
  420. "line_style": 0,
  421. "microvia_diameter": 0.3,
  422. "microvia_drill": 0.1,
  423. "name": "Default",
  424. "pcb_color": "rgba(0, 0, 0, 0.000)",
  425. "schematic_color": "rgba(0, 0, 0, 0.000)",
  426. "track_width": 0.25,
  427. "via_diameter": 0.8,
  428. "via_drill": 0.4,
  429. "wire_width": 6
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  431. ],
  432. "meta": {
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  435. "net_colors": null,
  436. "netclass_assignments": null,
  437. "netclass_patterns": []
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  439. "pcbnew": {
  440. "last_paths": {
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  442. "idf": "",
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  444. "specctra_dsn": "",
  445. "step": "",
  446. "vrml": ""
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  448. "page_layout_descr_file": ""
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  450. "schematic": {
  451. "annotate_start_num": 0,
  452. "drawing": {
  453. "dashed_lines_dash_length_ratio": 12.0,
  454. "dashed_lines_gap_length_ratio": 3.0,
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  456. "default_text_size": 50.0,
  457. "field_names": [],
  458. "intersheets_ref_own_page": false,
  459. "intersheets_ref_prefix": "",
  460. "intersheets_ref_short": false,
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  465. "pin_symbol_size": 25.0,
  466. "text_offset_ratio": 0.15
  467. },
  468. "legacy_lib_dir": "",
  469. "legacy_lib_list": [],
  470. "meta": {
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  473. "net_format_name": "",
  474. "page_layout_descr_file": "",
  475. "plot_directory": "./",
  476. "spice_current_sheet_as_root": false,
  477. "spice_external_command": "spice \"%I\"",
  478. "spice_model_current_sheet_as_root": true,
  479. "spice_save_all_currents": false,
  480. "spice_save_all_voltages": false,
  481. "subpart_first_id": 65,
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  484. "sheets": [
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