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main.c 17KB

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  1. /**
  2. * Copyright (c) 2022 Brian Starkey <stark3y@gmail.com>
  3. * Copyright (c) 2023 Thomas Buck <thomas@xythobuz.de>
  4. *
  5. * Based on the Pico W tcp_server example:
  6. * Copyright (c) 2022 Raspberry Pi (Trading) Ltd.
  7. *
  8. * SPDX-License-Identifier: BSD-3-Clause
  9. */
  10. #include <string.h>
  11. #include <stdlib.h>
  12. #include "RP2040.h"
  13. #include "pico/critical_section.h"
  14. #include "pico/time.h"
  15. #include "pico/util/queue.h"
  16. #include "hardware/dma.h"
  17. #include "hardware/flash.h"
  18. #include "hardware/structs/dma.h"
  19. #include "hardware/structs/watchdog.h"
  20. #include "hardware/gpio.h"
  21. #include "hardware/resets.h"
  22. #include "hardware/uart.h"
  23. #include "hardware/watchdog.h"
  24. #include "pico/stdlib.h"
  25. #include "pico/cyw43_arch.h"
  26. #include "tcp_comm.h"
  27. #include "picowota/reboot.h"
  28. #ifdef DEBUG
  29. #include <stdio.h>
  30. #include <stdarg.h>
  31. #include "pico/stdio_usb.h"
  32. #endif
  33. #if PICOWOTA_WIFI_AP == 1
  34. #include "dhcpserver.h"
  35. static dhcp_server_t dhcp_server;
  36. #endif
  37. #define QUOTE(name) #name
  38. #define STR(macro) QUOTE(macro)
  39. #ifndef PICOWOTA_WIFI_SSID
  40. #warning "PICOWOTA_WIFI_SSID not defined"
  41. #else
  42. const char *wifi_ssid = STR(PICOWOTA_WIFI_SSID);
  43. #endif
  44. #ifndef PICOWOTA_WIFI_PASS
  45. #warning "PICOWOTA_WIFI_PASS not defined"
  46. #else
  47. const char *wifi_pass = STR(PICOWOTA_WIFI_PASS);
  48. #endif
  49. critical_section_t critical_section;
  50. #define EVENT_QUEUE_LENGTH 8
  51. queue_t event_queue;
  52. enum event_type {
  53. EVENT_TYPE_REBOOT = 1,
  54. EVENT_TYPE_GO,
  55. EVENT_TYPE_SERVER_DONE,
  56. };
  57. struct event {
  58. enum event_type type;
  59. union {
  60. struct {
  61. bool to_bootloader;
  62. } reboot;
  63. struct {
  64. uint32_t vtor;
  65. } go;
  66. };
  67. };
  68. #define BOOTLOADER_ENTRY_PIN 15
  69. #define TCP_PORT 4242
  70. struct image_header app_image_header;
  71. #define IMAGE_HEADER_ADDR ((uint32_t)&app_image_header)
  72. #define IMAGE_HEADER_OFFSET (IMAGE_HEADER_ADDR - XIP_BASE)
  73. #define WRITE_ADDR_MIN (IMAGE_HEADER_ADDR + FLASH_SECTOR_SIZE)
  74. #define ERASE_ADDR_MIN (IMAGE_HEADER_ADDR)
  75. #define FLASH_ADDR_MAX (XIP_BASE + PICO_FLASH_SIZE_BYTES)
  76. #define CMD_SYNC (('S' << 0) | ('Y' << 8) | ('N' << 16) | ('C' << 24))
  77. #define RSP_SYNC (('W' << 0) | ('O' << 8) | ('T' << 16) | ('A' << 24))
  78. #define CMD_INFO (('I' << 0) | ('N' << 8) | ('F' << 16) | ('O' << 24))
  79. #define CMD_READ (('R' << 0) | ('E' << 8) | ('A' << 16) | ('D' << 24))
  80. #define CMD_CSUM (('C' << 0) | ('S' << 8) | ('U' << 16) | ('M' << 24))
  81. #define CMD_CRC (('C' << 0) | ('R' << 8) | ('C' << 16) | ('C' << 24))
  82. #define CMD_ERASE (('E' << 0) | ('R' << 8) | ('A' << 16) | ('S' << 24))
  83. #define CMD_WRITE (('W' << 0) | ('R' << 8) | ('I' << 16) | ('T' << 24))
  84. #define CMD_SEAL (('S' << 0) | ('E' << 8) | ('A' << 16) | ('L' << 24))
  85. #define CMD_GO (('G' << 0) | ('O' << 8) | ('G' << 16) | ('O' << 24))
  86. #define CMD_REBOOT (('B' << 0) | ('O' << 8) | ('O' << 16) | ('T' << 24))
  87. static uint32_t last_print_state = 0;
  88. void __attribute__((weak)) picowota_printf_init(void)
  89. {
  90. #ifdef DEBUG
  91. stdio_usb_init();
  92. #endif
  93. }
  94. void __attribute__((weak)) picowota_printf(const char* format, ...)
  95. {
  96. #ifdef DEBUG
  97. va_list args;
  98. va_start(args, format);
  99. vprintf(format, args);
  100. va_end(args);
  101. #endif
  102. }
  103. static uint32_t handle_sync(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  104. {
  105. if (last_print_state != CMD_SYNC) {
  106. picowota_printf("sync cmd\n");
  107. last_print_state = CMD_SYNC;
  108. }
  109. return RSP_SYNC;
  110. }
  111. const struct comm_command sync_cmd = {
  112. .opcode = CMD_SYNC,
  113. .nargs = 0,
  114. .resp_nargs = 0,
  115. .size = NULL,
  116. .handle = &handle_sync,
  117. };
  118. static uint32_t size_read(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  119. {
  120. uint32_t size = args_in[1];
  121. if (size > TCP_COMM_MAX_DATA_LEN) {
  122. return TCP_COMM_RSP_ERR;
  123. }
  124. // TODO: Validate address
  125. *data_len_out = 0;
  126. *resp_data_len_out = size;
  127. return TCP_COMM_RSP_OK;
  128. }
  129. static uint32_t handle_read(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  130. {
  131. uint32_t addr = args_in[0];
  132. uint32_t size = args_in[1];
  133. if (last_print_state != CMD_READ) {
  134. picowota_printf("read cmd 0x%08X %d\n", addr, size);
  135. last_print_state = CMD_READ;
  136. }
  137. memcpy(resp_data_out, (void *)addr, size);
  138. return TCP_COMM_RSP_OK;
  139. }
  140. const struct comm_command read_cmd = {
  141. // READ addr len
  142. // OKOK [data]
  143. .opcode = CMD_READ,
  144. .nargs = 2,
  145. .resp_nargs = 0,
  146. .size = &size_read,
  147. .handle = &handle_read,
  148. };
  149. static uint32_t size_csum(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  150. {
  151. uint32_t addr = args_in[0];
  152. uint32_t size = args_in[1];
  153. if ((addr & 0x3) || (size & 0x3)) {
  154. // Must be aligned
  155. return TCP_COMM_RSP_ERR;
  156. }
  157. // TODO: Validate address
  158. *data_len_out = 0;
  159. *resp_data_len_out = 0;
  160. return TCP_COMM_RSP_OK;
  161. }
  162. static uint32_t handle_csum(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  163. {
  164. uint32_t dummy_dest;
  165. uint32_t addr = args_in[0];
  166. uint32_t size = args_in[1];
  167. if (last_print_state != CMD_CSUM) {
  168. picowota_printf("csum cmd 0x%08X %d\n", addr, size);
  169. last_print_state = CMD_CSUM;
  170. }
  171. int channel = dma_claim_unused_channel(true);
  172. dma_channel_config c = dma_channel_get_default_config(channel);
  173. channel_config_set_transfer_data_size(&c, DMA_SIZE_32);
  174. channel_config_set_read_increment(&c, true);
  175. channel_config_set_write_increment(&c, false);
  176. channel_config_set_sniff_enable(&c, true);
  177. dma_hw->sniff_data = 0;
  178. dma_sniffer_enable(channel, 0xf, true);
  179. dma_channel_configure(channel, &c, &dummy_dest, (void *)addr, size / 4, true);
  180. dma_channel_wait_for_finish_blocking(channel);
  181. dma_sniffer_disable();
  182. dma_channel_unclaim(channel);
  183. *resp_args_out = dma_hw->sniff_data;
  184. return TCP_COMM_RSP_OK;
  185. }
  186. struct comm_command csum_cmd = {
  187. // CSUM addr len
  188. // OKOK csum
  189. .opcode = CMD_CSUM,
  190. .nargs = 2,
  191. .resp_nargs = 1,
  192. .size = &size_csum,
  193. .handle = &handle_csum,
  194. };
  195. static uint32_t size_crc(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  196. {
  197. uint32_t addr = args_in[0];
  198. uint32_t size = args_in[1];
  199. if ((addr & 0x3) || (size & 0x3)) {
  200. // Must be aligned
  201. return TCP_COMM_RSP_ERR;
  202. }
  203. // TODO: Validate address
  204. *data_len_out = 0;
  205. *resp_data_len_out = 0;
  206. return TCP_COMM_RSP_OK;
  207. }
  208. // ptr must be 4-byte aligned and len must be a multiple of 4
  209. static uint32_t calc_crc32(void *ptr, uint32_t len)
  210. {
  211. uint32_t dummy_dest, crc;
  212. int channel = dma_claim_unused_channel(true);
  213. dma_channel_config c = dma_channel_get_default_config(channel);
  214. channel_config_set_transfer_data_size(&c, DMA_SIZE_32);
  215. channel_config_set_read_increment(&c, true);
  216. channel_config_set_write_increment(&c, false);
  217. channel_config_set_sniff_enable(&c, true);
  218. // Seed the CRC calculation
  219. dma_hw->sniff_data = 0xffffffff;
  220. // Mode 1, then bit-reverse the result gives the same result as
  221. // golang's IEEE802.3 implementation
  222. dma_sniffer_enable(channel, 0x1, true);
  223. dma_hw->sniff_ctrl |= DMA_SNIFF_CTRL_OUT_REV_BITS;
  224. dma_channel_configure(channel, &c, &dummy_dest, ptr, len / 4, true);
  225. dma_channel_wait_for_finish_blocking(channel);
  226. // Read the result before resetting
  227. crc = dma_hw->sniff_data ^ 0xffffffff;
  228. dma_sniffer_disable();
  229. dma_channel_unclaim(channel);
  230. return crc;
  231. }
  232. static uint32_t handle_crc(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  233. {
  234. uint32_t addr = args_in[0];
  235. uint32_t size = args_in[1];
  236. if (last_print_state != CMD_CRC) {
  237. picowota_printf("crc cmd 0x%08X %d\n", addr, size);
  238. last_print_state = CMD_CRC;
  239. }
  240. resp_args_out[0] = calc_crc32((void *)addr, size);
  241. return TCP_COMM_RSP_OK;
  242. }
  243. struct comm_command crc_cmd = {
  244. // CRCC addr len
  245. // OKOK crc
  246. .opcode = CMD_CRC,
  247. .nargs = 2,
  248. .resp_nargs = 1,
  249. .size = &size_crc,
  250. .handle = &handle_crc,
  251. };
  252. static uint32_t handle_erase(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  253. {
  254. uint32_t addr = args_in[0];
  255. uint32_t size = args_in[1];
  256. if (last_print_state != CMD_ERASE) {
  257. picowota_printf("erase cmd 0x%08X %d\n", addr, size);
  258. last_print_state = CMD_ERASE;
  259. }
  260. if ((addr < ERASE_ADDR_MIN) || (addr + size >= FLASH_ADDR_MAX)) {
  261. // Outside flash
  262. return TCP_COMM_RSP_ERR;
  263. }
  264. if ((addr & (FLASH_SECTOR_SIZE - 1)) || (size & (FLASH_SECTOR_SIZE - 1))) {
  265. // Must be aligned
  266. return TCP_COMM_RSP_ERR;
  267. }
  268. critical_section_enter_blocking(&critical_section);
  269. flash_range_erase(addr - XIP_BASE, size);
  270. critical_section_exit(&critical_section);
  271. return TCP_COMM_RSP_OK;
  272. }
  273. struct comm_command erase_cmd = {
  274. // ERAS addr len
  275. // OKOK
  276. .opcode = CMD_ERASE,
  277. .nargs = 2,
  278. .resp_nargs = 0,
  279. .size = NULL,
  280. .handle = &handle_erase,
  281. };
  282. static uint32_t size_write(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  283. {
  284. uint32_t addr = args_in[0];
  285. uint32_t size = args_in[1];
  286. if ((addr < WRITE_ADDR_MIN) || (addr + size >= FLASH_ADDR_MAX)) {
  287. // Outside flash
  288. return TCP_COMM_RSP_ERR;
  289. }
  290. if ((addr & (FLASH_PAGE_SIZE - 1)) || (size & (FLASH_PAGE_SIZE -1))) {
  291. // Must be aligned
  292. return TCP_COMM_RSP_ERR;
  293. }
  294. if (size > TCP_COMM_MAX_DATA_LEN) {
  295. return TCP_COMM_RSP_ERR;
  296. }
  297. // TODO: Validate address
  298. *data_len_out = size;
  299. *resp_data_len_out = 0;
  300. return TCP_COMM_RSP_OK;
  301. }
  302. static uint32_t handle_write(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  303. {
  304. uint32_t addr = args_in[0];
  305. uint32_t size = args_in[1];
  306. if (last_print_state != CMD_WRITE) {
  307. picowota_printf("write cmd 0x%08X %d\n", addr, size);
  308. last_print_state = CMD_WRITE;
  309. }
  310. critical_section_enter_blocking(&critical_section);
  311. flash_range_program(addr - XIP_BASE, data_in, size);
  312. critical_section_exit(&critical_section);
  313. resp_args_out[0] = calc_crc32((void *)addr, size);
  314. return TCP_COMM_RSP_OK;
  315. }
  316. struct comm_command write_cmd = {
  317. // WRIT addr len [data]
  318. // OKOK crc
  319. .opcode = CMD_WRITE,
  320. .nargs = 2,
  321. .resp_nargs = 1,
  322. .size = &size_write,
  323. .handle = &handle_write,
  324. };
  325. struct image_header {
  326. uint32_t vtor;
  327. uint32_t size;
  328. uint32_t crc;
  329. uint8_t pad[FLASH_PAGE_SIZE - (3 * 4)];
  330. };
  331. static_assert(sizeof(struct image_header) == FLASH_PAGE_SIZE, "image_header must be FLASH_PAGE_SIZE bytes");
  332. static bool image_header_ok(struct image_header *hdr, bool check_crc)
  333. {
  334. uint32_t *vtor = (uint32_t *)hdr->vtor;
  335. uint32_t calc = calc_crc32((void *)hdr->vtor, hdr->size);
  336. // CRC has to match after flashing
  337. if (check_crc && (calc != hdr->crc)) {
  338. return false;
  339. }
  340. // Stack pointer needs to be in RAM
  341. if (vtor[0] < SRAM_BASE) {
  342. return false;
  343. }
  344. // Reset vector should be in the image, and thumb (bit 0 set)
  345. if ((vtor[1] < hdr->vtor) || (vtor[1] > hdr->vtor + hdr->size) || !(vtor[1] & 1)) {
  346. return false;
  347. }
  348. // Looks OK.
  349. return true;
  350. }
  351. static uint32_t handle_seal(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  352. {
  353. if (last_print_state != CMD_SEAL) {
  354. picowota_printf("seal cmd\n");
  355. last_print_state = CMD_SEAL;
  356. }
  357. struct image_header hdr = {
  358. .vtor = args_in[0],
  359. .size = args_in[1],
  360. .crc = args_in[2],
  361. };
  362. if ((hdr.vtor & 0xff) || (hdr.size & 0x3)) {
  363. // Must be aligned
  364. return TCP_COMM_RSP_ERR;
  365. }
  366. if (!image_header_ok(&hdr, true)) {
  367. return TCP_COMM_RSP_ERR;
  368. }
  369. critical_section_enter_blocking(&critical_section);
  370. flash_range_erase(IMAGE_HEADER_OFFSET, FLASH_SECTOR_SIZE);
  371. flash_range_program(IMAGE_HEADER_OFFSET, (const uint8_t *)&hdr, sizeof(hdr));
  372. critical_section_exit(&critical_section);
  373. struct image_header *check = &app_image_header;
  374. if (memcmp(&hdr, check, sizeof(hdr))) {
  375. return TCP_COMM_RSP_ERR;
  376. }
  377. return TCP_COMM_RSP_OK;
  378. }
  379. struct comm_command seal_cmd = {
  380. // SEAL vtor len crc
  381. // OKOK
  382. .opcode = CMD_SEAL,
  383. .nargs = 3,
  384. .resp_nargs = 0,
  385. .size = NULL,
  386. .handle = &handle_seal,
  387. };
  388. static void disable_interrupts(void)
  389. {
  390. SysTick->CTRL &= ~1;
  391. NVIC->ICER[0] = 0xFFFFFFFF;
  392. NVIC->ICPR[0] = 0xFFFFFFFF;
  393. }
  394. static void reset_peripherals(void)
  395. {
  396. reset_block(~(
  397. RESETS_RESET_IO_QSPI_BITS |
  398. RESETS_RESET_PADS_QSPI_BITS |
  399. RESETS_RESET_SYSCFG_BITS |
  400. RESETS_RESET_PLL_SYS_BITS
  401. ));
  402. }
  403. static void jump_to_vtor(uint32_t vtor)
  404. {
  405. // Derived from the Leaf Labs Cortex-M3 bootloader.
  406. // Copyright (c) 2010 LeafLabs LLC.
  407. // Modified 2021 Brian Starkey <stark3y@gmail.com>
  408. // Originally under The MIT License
  409. uint32_t reset_vector = *(volatile uint32_t *)(vtor + 0x04);
  410. SCB->VTOR = (volatile uint32_t)(vtor);
  411. asm volatile("msr msp, %0"::"g"
  412. (*(volatile uint32_t *)vtor));
  413. asm volatile("bx %0"::"r" (reset_vector));
  414. }
  415. static uint32_t handle_go(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  416. {
  417. if (last_print_state != CMD_GO) {
  418. picowota_printf("go cmd\n");
  419. last_print_state = CMD_GO;
  420. }
  421. struct event ev = {
  422. .type = EVENT_TYPE_GO,
  423. .go = {
  424. .vtor = args_in[0],
  425. },
  426. };
  427. if (!queue_try_add(&event_queue, &ev)) {
  428. return TCP_COMM_RSP_ERR;
  429. }
  430. return TCP_COMM_RSP_OK;
  431. }
  432. struct comm_command go_cmd = {
  433. // GOGO vtor
  434. // NO RESPONSE
  435. .opcode = CMD_GO,
  436. .nargs = 1,
  437. .resp_nargs = 0,
  438. .size = NULL,
  439. .handle = &handle_go,
  440. };
  441. static uint32_t handle_info(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  442. {
  443. if (last_print_state != CMD_INFO) {
  444. picowota_printf("info cmd\n");
  445. last_print_state = CMD_INFO;
  446. }
  447. resp_args_out[0] = WRITE_ADDR_MIN;
  448. resp_args_out[1] = (XIP_BASE + PICO_FLASH_SIZE_BYTES) - WRITE_ADDR_MIN;
  449. resp_args_out[2] = FLASH_SECTOR_SIZE;
  450. resp_args_out[3] = FLASH_PAGE_SIZE;
  451. resp_args_out[4] = TCP_COMM_MAX_DATA_LEN;
  452. return TCP_COMM_RSP_OK;
  453. }
  454. const struct comm_command info_cmd = {
  455. // INFO
  456. // OKOK flash_start flash_size erase_size write_size max_data_len
  457. .opcode = CMD_INFO,
  458. .nargs = 0,
  459. .resp_nargs = 5,
  460. .size = NULL,
  461. .handle = &handle_info,
  462. };
  463. static uint32_t size_reboot(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  464. {
  465. *data_len_out = 0;
  466. *resp_data_len_out = 0;
  467. return TCP_COMM_RSP_OK;
  468. }
  469. static uint32_t handle_reboot(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  470. {
  471. if (last_print_state != CMD_REBOOT) {
  472. picowota_printf("reboot cmd\n");
  473. last_print_state = CMD_REBOOT;
  474. }
  475. struct event ev = {
  476. .type = EVENT_TYPE_REBOOT,
  477. .reboot = {
  478. .to_bootloader = !!args_in[0],
  479. },
  480. };
  481. if (!queue_try_add(&event_queue, &ev)) {
  482. return TCP_COMM_RSP_ERR;
  483. }
  484. return TCP_COMM_RSP_OK;
  485. }
  486. struct comm_command reboot_cmd = {
  487. // BOOT to_bootloader
  488. // NO RESPONSE
  489. .opcode = CMD_REBOOT,
  490. .nargs = 1,
  491. .resp_nargs = 0,
  492. .size = &size_reboot,
  493. .handle = &handle_reboot,
  494. };
  495. static bool should_stay_in_bootloader()
  496. {
  497. bool wd_says_so = (watchdog_hw->scratch[5] == PICOWOTA_BOOTLOADER_ENTRY_MAGIC) &&
  498. (watchdog_hw->scratch[6] == ~PICOWOTA_BOOTLOADER_ENTRY_MAGIC);
  499. return !gpio_get(BOOTLOADER_ENTRY_PIN) || wd_says_so;
  500. }
  501. int __attribute__((weak)) picowota_init(void)
  502. {
  503. if (cyw43_arch_init()) {
  504. picowota_printf("failed to initialise\n");
  505. return 1;
  506. }
  507. #if PICOWOTA_WIFI_AP == 1
  508. cyw43_arch_enable_ap_mode(wifi_ssid, wifi_pass, CYW43_AUTH_WPA2_AES_PSK);
  509. picowota_printf("Enabled the WiFi AP.\n");
  510. ip4_addr_t gw, mask;
  511. IP4_ADDR(&gw, 192, 168, 4, 1);
  512. IP4_ADDR(&mask, 255, 255, 255, 0);
  513. dhcp_server_init(&dhcp_server, &gw, &mask);
  514. picowota_printf("Started the DHCP server.\n");
  515. #else
  516. cyw43_arch_enable_sta_mode();
  517. picowota_printf("Connecting to WiFi...\n");
  518. if (cyw43_arch_wifi_connect_timeout_ms(wifi_ssid, wifi_pass, CYW43_AUTH_WPA2_AES_PSK, 30000)) {
  519. picowota_printf("failed to connect.\n");
  520. return 1;
  521. } else {
  522. picowota_printf("Connected.\n");
  523. }
  524. #endif
  525. return 0;
  526. }
  527. void __attribute__((weak)) picowota_deinit(void)
  528. {
  529. #if PICOWOTA_WIFI_AP == 1
  530. dhcp_server_deinit(&dhcp_server);
  531. #endif
  532. cyw43_arch_deinit();
  533. }
  534. void __attribute__((weak)) picowota_poll(void)
  535. {
  536. cyw43_arch_poll();
  537. }
  538. int main()
  539. {
  540. err_t err;
  541. gpio_init(BOOTLOADER_ENTRY_PIN);
  542. gpio_pull_up(BOOTLOADER_ENTRY_PIN);
  543. gpio_set_dir(BOOTLOADER_ENTRY_PIN, 0);
  544. sleep_ms(10);
  545. if (!should_stay_in_bootloader() && image_header_ok(&app_image_header, false)) {
  546. uint32_t vtor = *(uint32_t *)IMAGE_HEADER_ADDR;
  547. disable_interrupts();
  548. reset_peripherals();
  549. jump_to_vtor(vtor);
  550. }
  551. picowota_printf_init();
  552. queue_init(&event_queue, sizeof(struct event), EVENT_QUEUE_LENGTH);
  553. int n = picowota_init();
  554. if (n != 0) {
  555. picowota_printf("init error %d\n", n);
  556. return n;
  557. }
  558. critical_section_init(&critical_section);
  559. const struct comm_command *cmds[] = {
  560. &sync_cmd,
  561. &read_cmd,
  562. &csum_cmd,
  563. &crc_cmd,
  564. &erase_cmd,
  565. &write_cmd,
  566. &seal_cmd,
  567. &go_cmd,
  568. &info_cmd,
  569. &reboot_cmd,
  570. };
  571. struct tcp_comm_ctx *tcp = tcp_comm_new(cmds, sizeof(cmds) / sizeof(cmds[0]), CMD_SYNC);
  572. struct event ev = {
  573. .type = EVENT_TYPE_SERVER_DONE,
  574. };
  575. queue_add_blocking(&event_queue, &ev);
  576. for ( ; ; ) {
  577. while (queue_try_remove(&event_queue, &ev)) {
  578. switch (ev.type) {
  579. case EVENT_TYPE_SERVER_DONE:
  580. err = tcp_comm_listen(tcp, TCP_PORT);
  581. if (err != ERR_OK) {
  582. picowota_printf("Failed to start server: %d\n", err);
  583. } else {
  584. picowota_printf("Listening on port %d\n", TCP_PORT);
  585. }
  586. break;
  587. case EVENT_TYPE_REBOOT:
  588. picowota_printf("reboot\n");
  589. tcp_comm_server_close(tcp);
  590. picowota_deinit();
  591. picowota_reboot(ev.reboot.to_bootloader);
  592. /* Should never get here */
  593. break;
  594. case EVENT_TYPE_GO:
  595. picowota_printf("go\n");
  596. tcp_comm_server_close(tcp);
  597. picowota_deinit();
  598. disable_interrupts();
  599. reset_peripherals();
  600. jump_to_vtor(ev.go.vtor);
  601. /* Should never get here */
  602. break;
  603. };
  604. }
  605. picowota_poll();
  606. }
  607. picowota_deinit();
  608. return 0;
  609. }