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main.c 15KB

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  1. /**
  2. * Copyright (c) 2022 Brian Starkey <stark3y@gmail.com>
  3. *
  4. * Based on the Pico W tcp_server example:
  5. * Copyright (c) 2022 Raspberry Pi (Trading) Ltd.
  6. *
  7. * SPDX-License-Identifier: BSD-3-Clause
  8. */
  9. #include <string.h>
  10. #include <stdlib.h>
  11. #include "RP2040.h"
  12. #include "pico/critical_section.h"
  13. #include "pico/time.h"
  14. #include "pico/util/queue.h"
  15. #include "hardware/dma.h"
  16. #include "hardware/flash.h"
  17. #include "hardware/structs/dma.h"
  18. #include "hardware/structs/watchdog.h"
  19. #include "hardware/gpio.h"
  20. #include "hardware/resets.h"
  21. #include "hardware/uart.h"
  22. #include "hardware/watchdog.h"
  23. #include "pico/stdlib.h"
  24. #include "pico/cyw43_arch.h"
  25. #include "tcp_comm.h"
  26. #include "picowota/reboot.h"
  27. #ifdef DEBUG
  28. #include <stdio.h>
  29. #include "pico/stdio_usb.h"
  30. #define DBG_PRINTF_INIT() stdio_usb_init()
  31. #define DBG_PRINTF(...) printf(__VA_ARGS__)
  32. #else
  33. #define DBG_PRINTF_INIT() { }
  34. #define DBG_PRINTF(...) { }
  35. #endif
  36. #if PICOWOTA_WIFI_AP == 1
  37. #include "dhcpserver.h"
  38. static dhcp_server_t dhcp_server;
  39. #endif
  40. #define QUOTE(name) #name
  41. #define STR(macro) QUOTE(macro)
  42. #ifndef PICOWOTA_WIFI_SSID
  43. #warning "PICOWOTA_WIFI_SSID not defined"
  44. #else
  45. const char *wifi_ssid = STR(PICOWOTA_WIFI_SSID);
  46. #endif
  47. #ifndef PICOWOTA_WIFI_PASS
  48. #warning "PICOWOTA_WIFI_PASS not defined"
  49. #else
  50. const char *wifi_pass = STR(PICOWOTA_WIFI_PASS);
  51. #endif
  52. critical_section_t critical_section;
  53. #define EVENT_QUEUE_LENGTH 8
  54. queue_t event_queue;
  55. enum event_type {
  56. EVENT_TYPE_REBOOT = 1,
  57. EVENT_TYPE_GO,
  58. EVENT_TYPE_SERVER_DONE,
  59. };
  60. struct event {
  61. enum event_type type;
  62. union {
  63. struct {
  64. bool to_bootloader;
  65. } reboot;
  66. struct {
  67. uint32_t vtor;
  68. } go;
  69. };
  70. };
  71. #define BOOTLOADER_ENTRY_PIN 15
  72. #define TCP_PORT 4242
  73. struct image_header app_image_header;
  74. #define IMAGE_HEADER_ADDR ((uint32_t)&app_image_header)
  75. #define IMAGE_HEADER_OFFSET (IMAGE_HEADER_ADDR - XIP_BASE)
  76. #define WRITE_ADDR_MIN (IMAGE_HEADER_ADDR + FLASH_SECTOR_SIZE)
  77. #define ERASE_ADDR_MIN (IMAGE_HEADER_ADDR)
  78. #define FLASH_ADDR_MAX (XIP_BASE + PICO_FLASH_SIZE_BYTES)
  79. #define CMD_SYNC (('S' << 0) | ('Y' << 8) | ('N' << 16) | ('C' << 24))
  80. #define RSP_SYNC (('W' << 0) | ('O' << 8) | ('T' << 16) | ('A' << 24))
  81. #define CMD_INFO (('I' << 0) | ('N' << 8) | ('F' << 16) | ('O' << 24))
  82. #define CMD_READ (('R' << 0) | ('E' << 8) | ('A' << 16) | ('D' << 24))
  83. #define CMD_CSUM (('C' << 0) | ('S' << 8) | ('U' << 16) | ('M' << 24))
  84. #define CMD_CRC (('C' << 0) | ('R' << 8) | ('C' << 16) | ('C' << 24))
  85. #define CMD_ERASE (('E' << 0) | ('R' << 8) | ('A' << 16) | ('S' << 24))
  86. #define CMD_WRITE (('W' << 0) | ('R' << 8) | ('I' << 16) | ('T' << 24))
  87. #define CMD_SEAL (('S' << 0) | ('E' << 8) | ('A' << 16) | ('L' << 24))
  88. #define CMD_GO (('G' << 0) | ('O' << 8) | ('G' << 16) | ('O' << 24))
  89. #define CMD_REBOOT (('B' << 0) | ('O' << 8) | ('O' << 16) | ('T' << 24))
  90. static uint32_t handle_sync(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  91. {
  92. return RSP_SYNC;
  93. }
  94. const struct comm_command sync_cmd = {
  95. .opcode = CMD_SYNC,
  96. .nargs = 0,
  97. .resp_nargs = 0,
  98. .size = NULL,
  99. .handle = &handle_sync,
  100. };
  101. static uint32_t size_read(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  102. {
  103. uint32_t size = args_in[1];
  104. if (size > TCP_COMM_MAX_DATA_LEN) {
  105. return TCP_COMM_RSP_ERR;
  106. }
  107. // TODO: Validate address
  108. *data_len_out = 0;
  109. *resp_data_len_out = size;
  110. return TCP_COMM_RSP_OK;
  111. }
  112. static uint32_t handle_read(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  113. {
  114. uint32_t addr = args_in[0];
  115. uint32_t size = args_in[1];
  116. memcpy(resp_data_out, (void *)addr, size);
  117. return TCP_COMM_RSP_OK;
  118. }
  119. const struct comm_command read_cmd = {
  120. // READ addr len
  121. // OKOK [data]
  122. .opcode = CMD_READ,
  123. .nargs = 2,
  124. .resp_nargs = 0,
  125. .size = &size_read,
  126. .handle = &handle_read,
  127. };
  128. static uint32_t size_csum(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  129. {
  130. uint32_t addr = args_in[0];
  131. uint32_t size = args_in[1];
  132. if ((addr & 0x3) || (size & 0x3)) {
  133. // Must be aligned
  134. return TCP_COMM_RSP_ERR;
  135. }
  136. // TODO: Validate address
  137. *data_len_out = 0;
  138. *resp_data_len_out = 0;
  139. return TCP_COMM_RSP_OK;
  140. }
  141. static uint32_t handle_csum(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  142. {
  143. uint32_t dummy_dest;
  144. uint32_t addr = args_in[0];
  145. uint32_t size = args_in[1];
  146. int channel = dma_claim_unused_channel(true);
  147. dma_channel_config c = dma_channel_get_default_config(channel);
  148. channel_config_set_transfer_data_size(&c, DMA_SIZE_32);
  149. channel_config_set_read_increment(&c, true);
  150. channel_config_set_write_increment(&c, false);
  151. channel_config_set_sniff_enable(&c, true);
  152. dma_hw->sniff_data = 0;
  153. dma_sniffer_enable(channel, 0xf, true);
  154. dma_channel_configure(channel, &c, &dummy_dest, (void *)addr, size / 4, true);
  155. dma_channel_wait_for_finish_blocking(channel);
  156. dma_sniffer_disable();
  157. dma_channel_unclaim(channel);
  158. *resp_args_out = dma_hw->sniff_data;
  159. return TCP_COMM_RSP_OK;
  160. }
  161. struct comm_command csum_cmd = {
  162. // CSUM addr len
  163. // OKOK csum
  164. .opcode = CMD_CSUM,
  165. .nargs = 2,
  166. .resp_nargs = 1,
  167. .size = &size_csum,
  168. .handle = &handle_csum,
  169. };
  170. static uint32_t size_crc(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  171. {
  172. uint32_t addr = args_in[0];
  173. uint32_t size = args_in[1];
  174. if ((addr & 0x3) || (size & 0x3)) {
  175. // Must be aligned
  176. return TCP_COMM_RSP_ERR;
  177. }
  178. // TODO: Validate address
  179. *data_len_out = 0;
  180. *resp_data_len_out = 0;
  181. return TCP_COMM_RSP_OK;
  182. }
  183. // ptr must be 4-byte aligned and len must be a multiple of 4
  184. static uint32_t calc_crc32(void *ptr, uint32_t len)
  185. {
  186. uint32_t dummy_dest, crc;
  187. int channel = dma_claim_unused_channel(true);
  188. dma_channel_config c = dma_channel_get_default_config(channel);
  189. channel_config_set_transfer_data_size(&c, DMA_SIZE_32);
  190. channel_config_set_read_increment(&c, true);
  191. channel_config_set_write_increment(&c, false);
  192. channel_config_set_sniff_enable(&c, true);
  193. // Seed the CRC calculation
  194. dma_hw->sniff_data = 0xffffffff;
  195. // Mode 1, then bit-reverse the result gives the same result as
  196. // golang's IEEE802.3 implementation
  197. dma_sniffer_enable(channel, 0x1, true);
  198. dma_hw->sniff_ctrl |= DMA_SNIFF_CTRL_OUT_REV_BITS;
  199. dma_channel_configure(channel, &c, &dummy_dest, ptr, len / 4, true);
  200. dma_channel_wait_for_finish_blocking(channel);
  201. // Read the result before resetting
  202. crc = dma_hw->sniff_data ^ 0xffffffff;
  203. dma_sniffer_disable();
  204. dma_channel_unclaim(channel);
  205. return crc;
  206. }
  207. static uint32_t handle_crc(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  208. {
  209. uint32_t addr = args_in[0];
  210. uint32_t size = args_in[1];
  211. resp_args_out[0] = calc_crc32((void *)addr, size);
  212. return TCP_COMM_RSP_OK;
  213. }
  214. struct comm_command crc_cmd = {
  215. // CRCC addr len
  216. // OKOK crc
  217. .opcode = CMD_CRC,
  218. .nargs = 2,
  219. .resp_nargs = 1,
  220. .size = &size_crc,
  221. .handle = &handle_crc,
  222. };
  223. static uint32_t handle_erase(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  224. {
  225. uint32_t addr = args_in[0];
  226. uint32_t size = args_in[1];
  227. if ((addr < ERASE_ADDR_MIN) || (addr + size >= FLASH_ADDR_MAX)) {
  228. // Outside flash
  229. return TCP_COMM_RSP_ERR;
  230. }
  231. if ((addr & (FLASH_SECTOR_SIZE - 1)) || (size & (FLASH_SECTOR_SIZE - 1))) {
  232. // Must be aligned
  233. return TCP_COMM_RSP_ERR;
  234. }
  235. critical_section_enter_blocking(&critical_section);
  236. flash_range_erase(addr - XIP_BASE, size);
  237. critical_section_exit(&critical_section);
  238. return TCP_COMM_RSP_OK;
  239. }
  240. struct comm_command erase_cmd = {
  241. // ERAS addr len
  242. // OKOK
  243. .opcode = CMD_ERASE,
  244. .nargs = 2,
  245. .resp_nargs = 0,
  246. .size = NULL,
  247. .handle = &handle_erase,
  248. };
  249. static uint32_t size_write(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  250. {
  251. uint32_t addr = args_in[0];
  252. uint32_t size = args_in[1];
  253. if ((addr < WRITE_ADDR_MIN) || (addr + size >= FLASH_ADDR_MAX)) {
  254. // Outside flash
  255. return TCP_COMM_RSP_ERR;
  256. }
  257. if ((addr & (FLASH_PAGE_SIZE - 1)) || (size & (FLASH_PAGE_SIZE -1))) {
  258. // Must be aligned
  259. return TCP_COMM_RSP_ERR;
  260. }
  261. if (size > TCP_COMM_MAX_DATA_LEN) {
  262. return TCP_COMM_RSP_ERR;
  263. }
  264. // TODO: Validate address
  265. *data_len_out = size;
  266. *resp_data_len_out = 0;
  267. return TCP_COMM_RSP_OK;
  268. }
  269. static uint32_t handle_write(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  270. {
  271. uint32_t addr = args_in[0];
  272. uint32_t size = args_in[1];
  273. critical_section_enter_blocking(&critical_section);
  274. flash_range_program(addr - XIP_BASE, data_in, size);
  275. critical_section_exit(&critical_section);
  276. resp_args_out[0] = calc_crc32((void *)addr, size);
  277. return TCP_COMM_RSP_OK;
  278. }
  279. struct comm_command write_cmd = {
  280. // WRIT addr len [data]
  281. // OKOK crc
  282. .opcode = CMD_WRITE,
  283. .nargs = 2,
  284. .resp_nargs = 1,
  285. .size = &size_write,
  286. .handle = &handle_write,
  287. };
  288. struct image_header {
  289. uint32_t vtor;
  290. uint32_t size;
  291. uint32_t crc;
  292. uint8_t pad[FLASH_PAGE_SIZE - (3 * 4)];
  293. };
  294. static_assert(sizeof(struct image_header) == FLASH_PAGE_SIZE, "image_header must be FLASH_PAGE_SIZE bytes");
  295. static bool image_header_ok(struct image_header *hdr)
  296. {
  297. uint32_t *vtor = (uint32_t *)hdr->vtor;
  298. uint32_t calc = calc_crc32((void *)hdr->vtor, hdr->size);
  299. // CRC has to match
  300. if (calc != hdr->crc) {
  301. return false;
  302. }
  303. // Stack pointer needs to be in RAM
  304. if (vtor[0] < SRAM_BASE) {
  305. return false;
  306. }
  307. // Reset vector should be in the image, and thumb (bit 0 set)
  308. if ((vtor[1] < hdr->vtor) || (vtor[1] > hdr->vtor + hdr->size) || !(vtor[1] & 1)) {
  309. return false;
  310. }
  311. // Looks OK.
  312. return true;
  313. }
  314. static uint32_t handle_seal(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  315. {
  316. struct image_header hdr = {
  317. .vtor = args_in[0],
  318. .size = args_in[1],
  319. .crc = args_in[2],
  320. };
  321. if ((hdr.vtor & 0xff) || (hdr.size & 0x3)) {
  322. // Must be aligned
  323. return TCP_COMM_RSP_ERR;
  324. }
  325. if (!image_header_ok(&hdr)) {
  326. return TCP_COMM_RSP_ERR;
  327. }
  328. critical_section_enter_blocking(&critical_section);
  329. flash_range_erase(IMAGE_HEADER_OFFSET, FLASH_SECTOR_SIZE);
  330. flash_range_program(IMAGE_HEADER_OFFSET, (const uint8_t *)&hdr, sizeof(hdr));
  331. critical_section_exit(&critical_section);
  332. struct image_header *check = &app_image_header;
  333. if (memcmp(&hdr, check, sizeof(hdr))) {
  334. return TCP_COMM_RSP_ERR;
  335. }
  336. return TCP_COMM_RSP_OK;
  337. }
  338. struct comm_command seal_cmd = {
  339. // SEAL vtor len crc
  340. // OKOK
  341. .opcode = CMD_SEAL,
  342. .nargs = 3,
  343. .resp_nargs = 0,
  344. .size = NULL,
  345. .handle = &handle_seal,
  346. };
  347. static void disable_interrupts(void)
  348. {
  349. SysTick->CTRL &= ~1;
  350. NVIC->ICER[0] = 0xFFFFFFFF;
  351. NVIC->ICPR[0] = 0xFFFFFFFF;
  352. }
  353. static void reset_peripherals(void)
  354. {
  355. reset_block(~(
  356. RESETS_RESET_IO_QSPI_BITS |
  357. RESETS_RESET_PADS_QSPI_BITS |
  358. RESETS_RESET_SYSCFG_BITS |
  359. RESETS_RESET_PLL_SYS_BITS
  360. ));
  361. }
  362. static void jump_to_vtor(uint32_t vtor)
  363. {
  364. // Derived from the Leaf Labs Cortex-M3 bootloader.
  365. // Copyright (c) 2010 LeafLabs LLC.
  366. // Modified 2021 Brian Starkey <stark3y@gmail.com>
  367. // Originally under The MIT License
  368. uint32_t reset_vector = *(volatile uint32_t *)(vtor + 0x04);
  369. SCB->VTOR = (volatile uint32_t)(vtor);
  370. asm volatile("msr msp, %0"::"g"
  371. (*(volatile uint32_t *)vtor));
  372. asm volatile("bx %0"::"r" (reset_vector));
  373. }
  374. static uint32_t handle_go(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  375. {
  376. struct event ev = {
  377. .type = EVENT_TYPE_GO,
  378. .go = {
  379. .vtor = args_in[0],
  380. },
  381. };
  382. if (!queue_try_add(&event_queue, &ev)) {
  383. return TCP_COMM_RSP_ERR;
  384. }
  385. return TCP_COMM_RSP_OK;
  386. }
  387. struct comm_command go_cmd = {
  388. // GOGO vtor
  389. // NO RESPONSE
  390. .opcode = CMD_GO,
  391. .nargs = 1,
  392. .resp_nargs = 0,
  393. .size = NULL,
  394. .handle = &handle_go,
  395. };
  396. static uint32_t handle_info(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  397. {
  398. resp_args_out[0] = WRITE_ADDR_MIN;
  399. resp_args_out[1] = (XIP_BASE + PICO_FLASH_SIZE_BYTES) - WRITE_ADDR_MIN;
  400. resp_args_out[2] = FLASH_SECTOR_SIZE;
  401. resp_args_out[3] = FLASH_PAGE_SIZE;
  402. resp_args_out[4] = TCP_COMM_MAX_DATA_LEN;
  403. return TCP_COMM_RSP_OK;
  404. }
  405. const struct comm_command info_cmd = {
  406. // INFO
  407. // OKOK flash_start flash_size erase_size write_size max_data_len
  408. .opcode = CMD_INFO,
  409. .nargs = 0,
  410. .resp_nargs = 5,
  411. .size = NULL,
  412. .handle = &handle_info,
  413. };
  414. static uint32_t size_reboot(uint32_t *args_in, uint32_t *data_len_out, uint32_t *resp_data_len_out)
  415. {
  416. *data_len_out = 0;
  417. *resp_data_len_out = 0;
  418. return TCP_COMM_RSP_OK;
  419. }
  420. static uint32_t handle_reboot(uint32_t *args_in, uint8_t *data_in, uint32_t *resp_args_out, uint8_t *resp_data_out)
  421. {
  422. struct event ev = {
  423. .type = EVENT_TYPE_REBOOT,
  424. .reboot = {
  425. .to_bootloader = !!args_in[0],
  426. },
  427. };
  428. if (!queue_try_add(&event_queue, &ev)) {
  429. return TCP_COMM_RSP_ERR;
  430. }
  431. return TCP_COMM_RSP_OK;
  432. }
  433. struct comm_command reboot_cmd = {
  434. // BOOT to_bootloader
  435. // NO RESPONSE
  436. .opcode = CMD_REBOOT,
  437. .nargs = 1,
  438. .resp_nargs = 0,
  439. .size = &size_reboot,
  440. .handle = &handle_reboot,
  441. };
  442. static bool should_stay_in_bootloader()
  443. {
  444. bool wd_says_so = (watchdog_hw->scratch[5] == PICOWOTA_BOOTLOADER_ENTRY_MAGIC) &&
  445. (watchdog_hw->scratch[6] == ~PICOWOTA_BOOTLOADER_ENTRY_MAGIC);
  446. return !gpio_get(BOOTLOADER_ENTRY_PIN) || wd_says_so;
  447. }
  448. static void network_deinit()
  449. {
  450. #if PICOWOTA_WIFI_AP == 1
  451. dhcp_server_deinit(&dhcp_server);
  452. #endif
  453. cyw43_arch_deinit();
  454. }
  455. int main()
  456. {
  457. err_t err;
  458. gpio_init(BOOTLOADER_ENTRY_PIN);
  459. gpio_pull_up(BOOTLOADER_ENTRY_PIN);
  460. gpio_set_dir(BOOTLOADER_ENTRY_PIN, 0);
  461. sleep_ms(10);
  462. if (!should_stay_in_bootloader() && image_header_ok(&app_image_header)) {
  463. uint32_t vtor = *(uint32_t *)IMAGE_HEADER_ADDR;
  464. disable_interrupts();
  465. reset_peripherals();
  466. jump_to_vtor(vtor);
  467. }
  468. DBG_PRINTF_INIT();
  469. queue_init(&event_queue, sizeof(struct event), EVENT_QUEUE_LENGTH);
  470. if (cyw43_arch_init()) {
  471. DBG_PRINTF("failed to initialise\n");
  472. return 1;
  473. }
  474. #if PICOWOTA_WIFI_AP == 1
  475. cyw43_arch_enable_ap_mode(wifi_ssid, wifi_pass, CYW43_AUTH_WPA2_AES_PSK);
  476. DBG_PRINTF("Enabled the WiFi AP.\n");
  477. ip4_addr_t gw, mask;
  478. IP4_ADDR(&gw, 192, 168, 4, 1);
  479. IP4_ADDR(&mask, 255, 255, 255, 0);
  480. dhcp_server_t dhcp_server;
  481. dhcp_server_init(&dhcp_server, &gw, &mask);
  482. DBG_PRINTF("Started the DHCP server.\n");
  483. #else
  484. cyw43_arch_enable_sta_mode();
  485. DBG_PRINTF("Connecting to WiFi...\n");
  486. if (cyw43_arch_wifi_connect_timeout_ms(wifi_ssid, wifi_pass, CYW43_AUTH_WPA2_AES_PSK, 30000)) {
  487. DBG_PRINTF("failed to connect.\n");
  488. return 1;
  489. } else {
  490. DBG_PRINTF("Connected.\n");
  491. }
  492. #endif
  493. critical_section_init(&critical_section);
  494. const struct comm_command *cmds[] = {
  495. &sync_cmd,
  496. &read_cmd,
  497. &csum_cmd,
  498. &crc_cmd,
  499. &erase_cmd,
  500. &write_cmd,
  501. &seal_cmd,
  502. &go_cmd,
  503. &info_cmd,
  504. &reboot_cmd,
  505. };
  506. struct tcp_comm_ctx *tcp = tcp_comm_new(cmds, sizeof(cmds) / sizeof(cmds[0]), CMD_SYNC);
  507. struct event ev = {
  508. .type = EVENT_TYPE_SERVER_DONE,
  509. };
  510. queue_add_blocking(&event_queue, &ev);
  511. for ( ; ; ) {
  512. while (queue_try_remove(&event_queue, &ev)) {
  513. switch (ev.type) {
  514. case EVENT_TYPE_SERVER_DONE:
  515. err = tcp_comm_listen(tcp, TCP_PORT);
  516. if (err != ERR_OK) {
  517. DBG_PRINTF("Failed to start server: %d\n", err);
  518. }
  519. break;
  520. case EVENT_TYPE_REBOOT:
  521. tcp_comm_server_close(tcp);
  522. network_deinit();
  523. picowota_reboot(ev.reboot.to_bootloader);
  524. /* Should never get here */
  525. break;
  526. case EVENT_TYPE_GO:
  527. tcp_comm_server_close(tcp);
  528. network_deinit();
  529. disable_interrupts();
  530. reset_peripherals();
  531. jump_to_vtor(ev.go.vtor);
  532. /* Should never get here */
  533. break;
  534. };
  535. }
  536. cyw43_arch_poll();
  537. sleep_ms(5);
  538. }
  539. network_deinit();
  540. return 0;
  541. }