Naze32 clone with Frysky receiver
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serial_device.h 5.8KB

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  1. /*
  2. * serial_device.h
  3. *
  4. * Copyright (c) 2012, 2013, Thomas Buck <xythobuz@me.com>
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. *
  11. * - Redistributions of source code must retain the above copyright notice,
  12. * this list of conditions and the following disclaimer.
  13. *
  14. * - Redistributions in binary form must reproduce the above copyright
  15. * notice, this list of conditions and the following disclaimer in the
  16. * documentation and/or other materials provided with the distribution.
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  20. * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  21. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
  22. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  23. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  24. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  25. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  26. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  27. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #ifndef _serial_device_h
  31. #define _serial_device_h
  32. /** \addtogroup uart UART Library
  33. * UART Library enabling you to control all available
  34. * UART Modules. With XON/XOFF Flow Control and buffered
  35. * Receiving and Transmitting.
  36. * @{
  37. */
  38. /** \file serial_device.h
  39. * UART Library device-specific configuration.
  40. * Contains Register and Bit Positions for different AVR devices.
  41. */
  42. #if defined(__AVR_ATmega8__) || defined(__AVR_ATmega16__) || defined(__AVR_ATmega32__) \
  43. || defined(__AVR_ATmega8515__) || defined(__AVR_ATmega8535__) \
  44. || defined(__AVR_ATmega323__)
  45. #define UART_COUNT 1
  46. #define UART_REGISTERS 6
  47. #define UART_BITS 7
  48. volatile uint8_t *serialRegisters[UART_COUNT][UART_REGISTERS] = {{
  49. &UDR,
  50. &UCSRB,
  51. &UCSRC,
  52. &UCSRA,
  53. &UBRRH,
  54. &UBRRL
  55. }};
  56. #define SERIALBAUDBIT 8
  57. uint8_t serialBits[UART_COUNT][UART_BITS] = {{
  58. UCSZ0,
  59. UCSZ1,
  60. RXCIE,
  61. RXEN,
  62. TXEN,
  63. UDRIE,
  64. UDRE
  65. }};
  66. #define SERIALRECIEVEINTERRUPT USART_RXC_vect
  67. #define SERIALTRANSMITINTERRUPT USART_UDRE_vect
  68. #elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega328__) \
  69. || defined(__AVR_ATmega48__) || defined(__AVR_ATmega88__) \
  70. || defined(__AVR_ATmega168P__) || defined(__AVR_ATmega328P__) \
  71. || defined(__AVR_ATmega48P__) || defined(__AVR_ATmega88P__)
  72. #define UART_COUNT 1
  73. #define UART_REGISTERS 5
  74. #define UART_BITS 7
  75. volatile uint8_t *serialRegisters[UART_COUNT][UART_REGISTERS] = {{
  76. &UDR0,
  77. &UCSR0B,
  78. &UCSR0C,
  79. &UCSR0A
  80. }};
  81. #define SERIALBAUDBIT 16
  82. volatile uint16_t *serialBaudRegisters[UART_COUNT] = {
  83. &UBRR0
  84. };
  85. uint8_t serialBits[UART_COUNT][UART_BITS] = {{
  86. UCSZ00,
  87. UCSZ01,
  88. RXCIE0,
  89. RXEN0,
  90. TXEN0,
  91. UDRIE0,
  92. UDRE0
  93. }};
  94. #define SERIALRECIEVEINTERRUPT USART_RX_vect
  95. #define SERIALTRANSMITINTERRUPT USART_UDRE_vect
  96. #elif defined(__AVR_ATmega2561__) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega1284P__)
  97. #define UART_COUNT 2
  98. #define UART_REGISTERS 4
  99. #define UART_BITS 7
  100. volatile uint8_t *serialRegisters[UART_COUNT][UART_REGISTERS] = {
  101. {
  102. &UDR0,
  103. &UCSR0B,
  104. &UCSR0C,
  105. &UCSR0A
  106. },
  107. {
  108. &UDR1,
  109. &UCSR1B,
  110. &UCSR1C,
  111. &UCSR1A
  112. }
  113. };
  114. #define SERIALBAUDBIT 16
  115. volatile uint16_t *serialBaudRegisters[UART_COUNT] = {
  116. &UBRR0, &UBRR1
  117. };
  118. uint8_t serialBits[UART_COUNT][UART_BITS] = {
  119. {
  120. UCSZ00,
  121. UCSZ01,
  122. RXCIE0,
  123. RXEN0,
  124. TXEN0,
  125. UDRIE0,
  126. UDRE0
  127. },
  128. {
  129. UCSZ10,
  130. UCSZ11,
  131. RXCIE1,
  132. RXEN1,
  133. TXEN1,
  134. UDRIE1,
  135. UDRE1
  136. }
  137. };
  138. #define SERIALRECIEVEINTERRUPT USART0_RX_vect
  139. #define SERIALTRANSMITINTERRUPT USART0_UDRE_vect
  140. #define SERIALRECIEVEINTERRUPT1 USART1_RX_vect
  141. #define SERIALTRANSMITINTERRUPT1 USART1_UDRE_vect
  142. #elif defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1280__) \
  143. || defined(__AVR_ATmega640__)
  144. #define UART_COUNT 4
  145. #define UART_REGISTERS 4
  146. #define UART_BITS 7
  147. volatile uint8_t *serialRegisters[UART_COUNT][UART_REGISTERS] = {
  148. {
  149. &UDR0,
  150. &UCSR0B,
  151. &UCSR0C,
  152. &UCSR0A
  153. },
  154. {
  155. &UDR1,
  156. &UCSR1B,
  157. &UCSR1C,
  158. &UCSR1A
  159. },
  160. {
  161. &UDR2,
  162. &UCSR2B,
  163. &UCSR2C,
  164. &UCSR2A
  165. },
  166. {
  167. &UDR3,
  168. &UCSR3B,
  169. &UCSR3C,
  170. &UCSR3A
  171. }
  172. };
  173. #define SERIALBAUDBIT 16
  174. volatile uint16_t *serialBaudRegisters[UART_COUNT] = {
  175. &UBRR0, &UBRR1, &UBRR2, &UBRR3
  176. };
  177. uint8_t serialBits[UART_COUNT][UART_BITS] = {
  178. {
  179. UCSZ00,
  180. UCSZ01,
  181. RXCIE0,
  182. RXEN0,
  183. TXEN0,
  184. UDRIE0,
  185. UDRE0
  186. },
  187. {
  188. UCSZ10,
  189. UCSZ11,
  190. RXCIE1,
  191. RXEN1,
  192. TXEN1,
  193. UDRIE1,
  194. UDRE1
  195. },
  196. {
  197. UCSZ20,
  198. UCSZ21,
  199. RXCIE2,
  200. RXEN2,
  201. TXEN2,
  202. UDRIE2,
  203. UDRE2
  204. },
  205. {
  206. UCSZ30,
  207. UCSZ31,
  208. RXCIE3,
  209. RXEN3,
  210. TXEN3,
  211. UDRIE3,
  212. UDRE3
  213. }
  214. };
  215. #define SERIALRECIEVEINTERRUPT USART0_RX_vect
  216. #define SERIALTRANSMITINTERRUPT USART0_UDRE_vect
  217. #define SERIALRECIEVEINTERRUPT1 USART1_RX_vect
  218. #define SERIALTRANSMITINTERRUPT1 USART1_UDRE_vect
  219. #define SERIALRECIEVEINTERRUPT2 USART2_RX_vect
  220. #define SERIALTRANSMITINTERRUPT2 USART2_UDRE_vect
  221. #define SERIALRECIEVEINTERRUPT3 USART3_RX_vect
  222. #define SERIALTRANSMITINTERRUPT3 USART3_UDRE_vect
  223. #else
  224. #error "AvrSerialLibrary not compatible with your MCU!"
  225. #endif
  226. #endif // _serial_device_h
  227. /** @} */