Naze32 clone with Frysky receiver
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system_LPC17xx.h 1.8KB

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  1. /******************************************************************************
  2. * @file: system_LPC17xx.h
  3. * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File
  4. * for the NXP LPC17xx Device Series
  5. * @version: V1.02
  6. * @date: 27. July 2009
  7. *----------------------------------------------------------------------------
  8. *
  9. * Copyright (C) 2009 ARM Limited. All rights reserved.
  10. *
  11. * ARM Limited (ARM) is supplying this software for use with Cortex-M3
  12. * processor based microcontrollers. This file can be freely distributed
  13. * within development tools that are supporting such ARM based processors.
  14. *
  15. * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  16. * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  18. * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  19. * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  20. *
  21. ******************************************************************************/
  22. #ifndef __SYSTEM_LPC17xx_H
  23. #define __SYSTEM_LPC17xx_H
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27. extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
  28. /**
  29. * Initialize the system
  30. *
  31. * @param none
  32. * @return none
  33. *
  34. * @brief Setup the microcontroller system.
  35. * Initialize the System and update the SystemCoreClock variable.
  36. */
  37. extern void SystemInit (void);
  38. /**
  39. * Update SystemCoreClock variable
  40. *
  41. * @param none
  42. * @return none
  43. *
  44. * @brief Updates the SystemCoreClock with current core Clock
  45. * retrieved from cpu registers.
  46. */
  47. extern void SystemCoreClockUpdate (void);
  48. #ifdef __cplusplus
  49. }
  50. #endif
  51. #endif /* __SYSTEM_LPC17xx_H */