Naze32 clone with Frysky receiver
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  1. /* mbed Microcontroller Library
  2. * Copyright (c) 2006-2013 ARM Limited
  3. *
  4. * Licensed under the Apache License, Version 2.0 (the "License");
  5. * you may not use this file except in compliance with the License.
  6. * You may obtain a copy of the License at
  7. *
  8. * http://www.apache.org/licenses/LICENSE-2.0
  9. *
  10. * Unless required by applicable law or agreed to in writing, software
  11. * distributed under the License is distributed on an "AS IS" BASIS,
  12. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13. * See the License for the specific language governing permissions and
  14. * limitations under the License.
  15. */
  16. #ifndef MBED_SPI_API_H
  17. #define MBED_SPI_API_H
  18. #include "device.h"
  19. #include "dma_api.h"
  20. #include "buffer.h"
  21. #if DEVICE_SPI
  22. #define SPI_EVENT_ERROR (1 << 1)
  23. #define SPI_EVENT_COMPLETE (1 << 2)
  24. #define SPI_EVENT_RX_OVERFLOW (1 << 3)
  25. #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
  26. #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
  27. #define SPI_FILL_WORD (0xFFFF)
  28. #if DEVICE_SPI_ASYNCH
  29. /** Asynch spi hal structure
  30. */
  31. typedef struct {
  32. struct spi_s spi; /**< Target specific spi structure */
  33. struct buffer_s tx_buff; /**< Tx buffer */
  34. struct buffer_s rx_buff; /**< Rx buffer */
  35. } spi_t;
  36. #else
  37. /** Non-asynch spi hal structure
  38. */
  39. typedef struct spi_s spi_t;
  40. #endif
  41. #ifdef __cplusplus
  42. extern "C" {
  43. #endif
  44. /**
  45. * \defgroup GeneralSPI SPI Configuration Functions
  46. * @{
  47. */
  48. /** Initialize the SPI peripheral
  49. *
  50. * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
  51. * @param[out] obj The SPI object to initialize
  52. * @param[in] mosi The pin to use for MOSI
  53. * @param[in] miso The pin to use for MISO
  54. * @param[in] sclk The pin to use for SCLK
  55. * @param[in] ssel The pin to use for SSEL
  56. */
  57. void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
  58. /** Release a SPI object
  59. *
  60. * TODO: spi_free is currently unimplemented
  61. * This will require reference counting at the C++ level to be safe
  62. *
  63. * Return the pins owned by the SPI object to their reset state
  64. * Disable the SPI peripheral
  65. * Disable the SPI clock
  66. * @param[in] obj The SPI object to deinitialize
  67. */
  68. void spi_free(spi_t *obj);
  69. /** Configure the SPI format
  70. *
  71. * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
  72. * @param[in,out] obj The SPI object to configure
  73. * @param[in] bits The number of bits per frame
  74. * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
  75. * @param[in] slave Zero for master mode or non-zero for slave mode
  76. */
  77. void spi_format(spi_t *obj, int bits, int mode, int slave);
  78. /** Set the SPI baud rate
  79. *
  80. * Actual frequency may differ from the desired frequency due to available dividers and bus clock
  81. * Configures the SPI peripheral's baud rate
  82. * @param[in,out] obj The SPI object to configure
  83. * @param[in] hz The baud rate in Hz
  84. */
  85. void spi_frequency(spi_t *obj, int hz);
  86. /**@}*/
  87. /**
  88. * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
  89. * @{
  90. */
  91. /** Write a byte out in master mode and receive a value
  92. *
  93. * @param[in] obj The SPI peripheral to use for sending
  94. * @param[in] value The value to send
  95. * @return Returns the value received during send
  96. */
  97. int spi_master_write(spi_t *obj, int value);
  98. /** Check if a value is available to read
  99. *
  100. * @param[in] obj The SPI peripheral to check
  101. * @return non-zero if a value is available
  102. */
  103. int spi_slave_receive(spi_t *obj);
  104. /** Get a received value out of the SPI receive buffer in slave mode
  105. *
  106. * Blocks until a value is available
  107. * @param[in] obj The SPI peripheral to read
  108. * @return The value received
  109. */
  110. int spi_slave_read(spi_t *obj);
  111. /** Write a value to the SPI peripheral in slave mode
  112. *
  113. * Blocks until the SPI peripheral can be written to
  114. * @param[in] obj The SPI peripheral to write
  115. * @param[in] value The value to write
  116. */
  117. void spi_slave_write(spi_t *obj, int value);
  118. /** Checks if the specified SPI peripheral is in use
  119. *
  120. * @param[in] obj The SPI peripheral to check
  121. * @return non-zero if the peripheral is currently transmitting
  122. */
  123. int spi_busy(spi_t *obj);
  124. /** Get the module number
  125. *
  126. * @param[in] obj The SPI peripheral to check
  127. * @return The module number
  128. */
  129. uint8_t spi_get_module(spi_t *obj);
  130. /**@}*/
  131. #if DEVICE_SPI_ASYNCH
  132. /**
  133. * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
  134. * @{
  135. */
  136. /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
  137. *
  138. * @param[in] obj The SPI object which holds the transfer information
  139. * @param[in] tx The buffer to send
  140. * @param[in] tx_length The number of words to transmit
  141. * @param[in] rx The buffer to receive
  142. * @param[in] rx_length The number of words to receive
  143. * @param[in] bit_width The bit width of buffer words
  144. * @param[in] event The logical OR of events to be registered
  145. * @param[in] handler SPI interrupt handler
  146. * @param[in] hint A suggestion for how to use DMA with this transfer
  147. */
  148. void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
  149. /** The asynchronous IRQ handler
  150. *
  151. * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
  152. * conditions, such as buffer overflows or transfer complete.
  153. * @param[in] obj The SPI object which holds the transfer information
  154. * @return event flags if a transfer termination condition was met or 0 otherwise.
  155. */
  156. uint32_t spi_irq_handler_asynch(spi_t *obj);
  157. /** Attempts to determine if the SPI peripheral is already in use.
  158. *
  159. * If a temporary DMA channel has been allocated, peripheral is in use.
  160. * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
  161. * channel were allocated.
  162. * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
  163. * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
  164. * there are any bytes in the FIFOs.
  165. * @param[in] obj The SPI object to check for activity
  166. * @return non-zero if the SPI port is active or zero if it is not.
  167. */
  168. uint8_t spi_active(spi_t *obj);
  169. /** Abort an SPI transfer
  170. *
  171. * @param obj The SPI peripheral to stop
  172. */
  173. void spi_abort_asynch(spi_t *obj);
  174. #endif
  175. /**@}*/
  176. #ifdef __cplusplus
  177. }
  178. #endif // __cplusplus
  179. #endif // SPI_DEVICE
  180. #endif // MBED_SPI_API_H