|
@@ -240,7 +240,7 @@
|
240
|
240
|
}
|
241
|
241
|
|
242
|
242
|
// all the others
|
243
|
|
- static uint32_t spiDelayCyclesX4 = 4 * (F_CPU) / 1000000; // 4µs => 125khz
|
|
243
|
+ static uint16_t spiDelayNS = 4000; // 4000ns => 125khz
|
244
|
244
|
|
245
|
245
|
static uint8_t spiTransferX(uint8_t b) { // using Mode 0
|
246
|
246
|
int bits = 8;
|
|
@@ -249,12 +249,12 @@
|
249
|
249
|
b <<= 1; // little setup time
|
250
|
250
|
|
251
|
251
|
WRITE(SD_SCK_PIN, HIGH);
|
252
|
|
- DELAY_CYCLES(spiDelayCyclesX4);
|
|
252
|
+ DELAY_NS(spiDelayNS);
|
253
|
253
|
|
254
|
254
|
b |= (READ(SD_MISO_PIN) != 0);
|
255
|
255
|
|
256
|
256
|
WRITE(SD_SCK_PIN, LOW);
|
257
|
|
- DELAY_CYCLES(spiDelayCyclesX4);
|
|
257
|
+ DELAY_NS(spiDelayNS);
|
258
|
258
|
} while (--bits);
|
259
|
259
|
return b;
|
260
|
260
|
}
|
|
@@ -510,7 +510,7 @@
|
510
|
510
|
spiRxBlock = (pfnSpiRxBlock)spiRxBlockX;
|
511
|
511
|
break;
|
512
|
512
|
default:
|
513
|
|
- spiDelayCyclesX4 = ((F_CPU) / 1000000) >> (6 - spiRate) << 2; // spiRate of 2 gives the maximum error with current CPU
|
|
513
|
+ spiDelayNS = 4000 >> (6 - spiRate); // spiRate of 2 gives the maximum error with current CPU
|
514
|
514
|
spiTransferTx = (pfnSpiTransfer)spiTransferX;
|
515
|
515
|
spiTransferRx = (pfnSpiTransfer)spiTransferX;
|
516
|
516
|
spiTxBlock = (pfnSpiTxBlock)spiTxBlockX;
|