My Marlin configs for Fabrikator Mini and CTC i3 Pro B
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sysclk.h 8.4KB

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  1. /**
  2. * \file
  3. *
  4. * \brief Chip-specific system clock management functions.
  5. *
  6. * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved.
  7. *
  8. * \asf_license_start
  9. *
  10. * \page License
  11. *
  12. * Redistribution and use in source and binary forms, with or without
  13. * modification, are permitted provided that the following conditions are met:
  14. *
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. *
  18. * 2. Redistributions in binary form must reproduce the above copyright notice,
  19. * this list of conditions and the following disclaimer in the documentation
  20. * and/or other materials provided with the distribution.
  21. *
  22. * 3. The name of Atmel may not be used to endorse or promote products derived
  23. * from this software without specific prior written permission.
  24. *
  25. * 4. This software may only be redistributed and used in connection with an
  26. * Atmel microcontroller product.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
  29. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  30. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
  31. * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
  32. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  36. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37. * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGE.
  39. *
  40. * \asf_license_stop
  41. *
  42. */
  43. /*
  44. * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
  45. */
  46. #ifndef CHIP_SYSCLK_H_INCLUDED
  47. #define CHIP_SYSCLK_H_INCLUDED
  48. #include "osc.h"
  49. #include "pll.h"
  50. /**
  51. * \page sysclk_quickstart Quick Start Guide for the System Clock Management service (SAM3A)
  52. *
  53. * This is the quick start guide for the \ref sysclk_group "System Clock Management"
  54. * service, with step-by-step instructions on how to configure and use the service for
  55. * specific use cases.
  56. *
  57. * \section sysclk_quickstart_usecases System Clock Management use cases
  58. * - \ref sysclk_quickstart_basic
  59. *
  60. * \section sysclk_quickstart_basic Basic usage of the System Clock Management service
  61. * This section will present a basic use case for the System Clock Management service.
  62. * This use case will configure the main system clock to 84MHz, using an internal PLL
  63. * module to multiply the frequency of a crystal attached to the microcontroller.
  64. *
  65. * \subsection sysclk_quickstart_use_case_1_prereq Prerequisites
  66. * - None
  67. *
  68. * \subsection sysclk_quickstart_use_case_1_setup_steps Initialization code
  69. * Add to the application initialization code:
  70. * \code
  71. sysclk_init();
  72. \endcode
  73. *
  74. * \subsection sysclk_quickstart_use_case_1_setup_steps_workflow Workflow
  75. * -# Configure the system clocks according to the settings in conf_clock.h:
  76. * \code sysclk_init(); \endcode
  77. *
  78. * \subsection sysclk_quickstart_use_case_1_example_code Example code
  79. * Add or uncomment the following in your conf_clock.h header file, commenting out all other
  80. * definitions of the same symbol(s):
  81. * \code
  82. #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK
  83. // Fpll0 = (Fclk * PLL_mul) / PLL_div
  84. #define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL
  85. #define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL)
  86. #define CONFIG_PLL0_DIV 1
  87. // Fbus = Fsys / BUS_div
  88. #define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
  89. \endcode
  90. *
  91. * \subsection sysclk_quickstart_use_case_1_example_workflow Workflow
  92. * -# Configure the main system clock to use the output of the PLL module as its source:
  93. * \code #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK \endcode
  94. * -# Configure the PLL module to use the fast external fast crystal oscillator as its source:
  95. * \code #define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL \endcode
  96. * -# Configure the PLL module to multiply the external fast crystal oscillator frequency up to 84MHz:
  97. * \code
  98. #define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL)
  99. #define CONFIG_PLL0_DIV 1
  100. \endcode
  101. * \note For user boards, \c BOARD_FREQ_MAINCK_XTAL should be defined in the board \c conf_board.h configuration
  102. * file as the frequency of the fast crystal attached to the microcontroller.
  103. * -# Configure the main clock to run at the full 84MHz, disable scaling of the main system clock speed:
  104. * \code
  105. #define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
  106. \endcode
  107. * \note Some dividers are powers of two, while others are integer division factors. Refer to the
  108. * formulas in the conf_clock.h template commented above each division define.
  109. */
  110. /// @cond 0
  111. /**INDENT-OFF**/
  112. #ifdef __cplusplus
  113. extern "C" {
  114. #endif
  115. /**INDENT-ON**/
  116. /// @endcond
  117. /**
  118. * \weakgroup sysclk_group
  119. * @{
  120. */
  121. //! \name Configuration Symbols
  122. //@{
  123. /**
  124. * \def CONFIG_SYSCLK_SOURCE
  125. * \brief Initial/static main system clock source
  126. *
  127. * The main system clock will be configured to use this clock during
  128. * initialization.
  129. */
  130. #ifndef CONFIG_SYSCLK_SOURCE
  131. # define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_4M_RC
  132. #endif
  133. /**
  134. * \def CONFIG_SYSCLK_PRES
  135. * \brief Initial CPU clock divider (mck)
  136. *
  137. * The MCK will run at
  138. * \f[
  139. * f_{MCK} = \frac{f_{sys}}{\mathrm{CONFIG\_SYSCLK\_PRES}}\,\mbox{Hz}
  140. * \f]
  141. * after initialization.
  142. */
  143. #ifndef CONFIG_SYSCLK_PRES
  144. # define CONFIG_SYSCLK_PRES 0
  145. #endif
  146. //@}
  147. //! \name Master Clock Sources (MCK)
  148. //@{
  149. #define SYSCLK_SRC_SLCK_RC 0 //!< Internal 32kHz RC oscillator as master source clock
  150. #define SYSCLK_SRC_SLCK_XTAL 1 //!< External 32kHz crystal oscillator as master source clock
  151. #define SYSCLK_SRC_SLCK_BYPASS 2 //!< External 32kHz bypass oscillator as master source clock
  152. #define SYSCLK_SRC_MAINCK_4M_RC 3 //!< Internal 4MHz RC oscillator as master source clock
  153. #define SYSCLK_SRC_MAINCK_8M_RC 4 //!< Internal 8MHz RC oscillator as master source clock
  154. #define SYSCLK_SRC_MAINCK_12M_RC 5 //!< Internal 12MHz RC oscillator as master source clock
  155. #define SYSCLK_SRC_MAINCK_XTAL 6 //!< External crystal oscillator as master source clock
  156. #define SYSCLK_SRC_MAINCK_BYPASS 7 //!< External bypass oscillator as master source clock
  157. #define SYSCLK_SRC_PLLACK 8 //!< Use PLLACK as master source clock
  158. #define SYSCLK_SRC_UPLLCK 9 //!< Use UPLLCK as master source clock
  159. //@}
  160. //! \name Master Clock Prescalers (MCK)
  161. //@{
  162. #define SYSCLK_PRES_1 PMC_MCKR_PRES_CLK_1 //!< Set master clock prescaler to 1
  163. #define SYSCLK_PRES_2 PMC_MCKR_PRES_CLK_2 //!< Set master clock prescaler to 2
  164. #define SYSCLK_PRES_4 PMC_MCKR_PRES_CLK_4 //!< Set master clock prescaler to 4
  165. #define SYSCLK_PRES_8 PMC_MCKR_PRES_CLK_8 //!< Set master clock prescaler to 8
  166. #define SYSCLK_PRES_16 PMC_MCKR_PRES_CLK_16 //!< Set master clock prescaler to 16
  167. #define SYSCLK_PRES_32 PMC_MCKR_PRES_CLK_32 //!< Set master clock prescaler to 32
  168. #define SYSCLK_PRES_64 PMC_MCKR_PRES_CLK_64 //!< Set master clock prescaler to 64
  169. #define SYSCLK_PRES_3 PMC_MCKR_PRES_CLK_3 //!< Set master clock prescaler to 3
  170. //@}
  171. //! \name USB Clock Sources
  172. //@{
  173. #define USBCLK_SRC_PLL0 0 //!< Use PLLA
  174. #define USBCLK_SRC_UPLL 1 //!< Use UPLL
  175. //@}
  176. /**
  177. * \def CONFIG_USBCLK_SOURCE
  178. * \brief Configuration symbol for the USB generic clock source
  179. *
  180. * Sets the clock source to use for the USB. The source must also be properly
  181. * configured.
  182. *
  183. * Define this to one of the \c USBCLK_SRC_xxx settings. Leave it undefined if
  184. * USB is not required.
  185. */
  186. #ifdef __DOXYGEN__
  187. # define CONFIG_USBCLK_SOURCE
  188. #endif
  189. /**
  190. * \def CONFIG_USBCLK_DIV
  191. * \brief Configuration symbol for the USB generic clock divider setting
  192. *
  193. * Sets the clock division for the USB generic clock. If a USB clock source is
  194. * selected with CONFIG_USBCLK_SOURCE, this configuration symbol must also be
  195. * defined.
  196. */
  197. #ifdef __DOXYGEN__
  198. # define CONFIG_USBCLK_DIV
  199. #endif
  200. extern void sysclk_enable_usb(void);
  201. extern void sysclk_disable_usb(void);
  202. //! @}
  203. /// @cond 0
  204. /**INDENT-OFF**/
  205. #ifdef __cplusplus
  206. }
  207. #endif
  208. /**INDENT-ON**/
  209. /// @endcond
  210. #endif /* CHIP_SYSCLK_H_INCLUDED */